gEDA-user: error Ngspice: level not spicified on line...using level 1

2009-04-13 Thread joseda
Hi all I'm trying to simulate and plot basic graphics with transistor (in particular with the Q2N) but i always get the warning level not spicified on line ... Using level 1 My netlist file is *== Begin SPICE netlist of main design V1 1 0 DC 1V Q1 3 2 0 Q2N

Re: gEDA-user: error Ngspice: level not spicified on line...using level 1

2009-04-13 Thread Yamazaki R2
Just as level = 1 to your model. All ngspice is stating is that there is no level parameter in your model statement its going to assume your model is level one and use the level 1 bjt parameters to solve the circuit. On Mon, Apr 13, 2009 at 9:34 AM, joseda josedaniel_marti...@yahoo.es wrote: Hi

Re: gEDA-user: error Ngspice: level not spicified on line...using level 1

2009-04-13 Thread joseda
Thank Yamazaki R2 for your answer!! but i can't understand you What's the level parameter? I added my model with its parameters but i don't know what is the level 1 bjt Regards Yamazaki R2 wrote: Just as level = 1 to your model. All ngspice is stating is that there is no level parameter

gEDA-user: ngspice: how to plot the transistor's characteristic curves

2009-04-13 Thread joseda
Hi, i'm trying to plot the transistor's characteristic curves but i can't. I can only plot one curve (for a specific base current). I would like to plot in a unique graph for several base currents. This is my netlist (with a current source in the base of the transistor and a voltage source of 0

Re: gEDA-user: error Ngspice: level not spicified on line...using level 1

2009-04-13 Thread John Doty
On Apr 13, 2009, at 12:12 PM, joseda wrote: What's the level parameter? I added my model with its parameters but i don't know what is the level 1 bjt Just change your model parameters to: .MODEL Q2N NPN (level=1 is=19f bf=150 vaf=100 ikf=0.18 ise=50p ne=2.5 br=7.5 + var=6.4 ikr=12m

gEDA-user: Luciani's silkscreen too thin?

2009-04-13 Thread Bill Gatliff
Guys: I'm using Luciani's 603 footprint, and the PCB design rule checker is complaining that 5 silk lines of element D301 are too thin. Is anyone else seeing this problem? Is this just a config issue with PCB, or is this a real problem? My minimum silk width is set to 10 mil. Thanks!

Re: gEDA-user: Luciani's silkscreen too thin?

2009-04-13 Thread Bill Gatliff
DJ Delorie wrote: My minimum silk width is set to 10 mil. What fab will you be using? The ones I use are happy with 5 mil silk. Advanced Circuits, a.k.a. 4pcb.com. b.g. -- Bill Gatliff b...@billgatliff.com ___ geda-user mailing list

Re: gEDA-user: Luciani's silkscreen too thin?

2009-04-13 Thread DJ Delorie
What fab will you be using? The ones I use are happy with 5 mil silk. Advanced Circuits, a.k.a. 4pcb.com. 10 mil is *way* bigger than they require. ___ geda-user mailing list geda-user@moria.seul.org