TI's sn74lvc1g240 part uses what appears dimensionally to be an ordinary
SOT25 package, but the pin numbering is different. Am I better off to
just construct my own footprint, or is there a way to deal with this at
the symbol level and still show the right pin numbers in the schematic?
I'm
I've been trying to compile gEDA for win32 using minipack, but it
keeps failing while downloading the packages. It successfully
downloads gettext and libiconv, but then all further packages have
this result:
Downloading jpeg from ftp://ftp.uu.net/graphics/jpeg/jpegsrc.v6b.tar.gz ...
--10:31:28--
On Wed, 08 Jul 2009 14:52:55 +1200, Anthony Blake wrote:
Unfortunately, some of the
usability issues such as existing tracks, are not very interesting
problems to work on.
This is why I keep assuring you, that a fix of these issues would be
greeted with an enthusiastic welcome by us users
I like to use separate power symbols for ICs. However, I constantly hit
the usability issues associated with this approach. Support for multi-
part symbols is quite fragile.
For example, gnetlist just checks the footprint attribute of the first
symbol it encounters. That is, the footprint
This sounds good to me.
If some of this code is used by the BOM utility then aggregating other
attributes by refdes could be useful. I have my own BOM script that
aggregates the attributes manufacturer and manufacturer_part_number,
in a hash, by refdes.
(* jcl *)
--
You
On Wed, 2009-07-08 at 12:18 +, Kai-Martin Knaak wrote:
My time schedule is a bit relaxed in the weeks to come. So I thought, I
might engage in contributing to the geda project by tweaking this aspect
a little.
This would be very nice. Indeed I had some trouble with missing
sub-parts
Duncan Drennan wrote:
TI's sn74lvc1g240 part uses what appears dimensionally to be an ordinary
SOT25 package, but the pin numbering is different. Am I better off to
just construct my own footprint, or is there a way to deal with this at
the symbol level and still show the right pin numbers in
On Wed, 08 Jul 2009 16:51:18 +0200, Stefan Salewski wrote:
Of course subparts may reside on different sheets, so maybe not every
one wants this.
You still have to make sure that the set of parts is complete and all
bear the same refdes. I figure, it is more reliable to move automatically
I would keep the footprint pin numbering consistent with the schematic
symbol
and datasheet pin numbering. If that means additional symbols and
footprints
then I would create them.
If there are differences between mfgs of the same part number then I
would attach a mfg suffix
Kai-Martin Knaak wrote:
1) gnetlist should look for a footprint in every instance of a refdes
Agreed. I use multiple symbols per part as well, but tend to put the
footprint= in just the power symbol. I also tend to group all my power
symbols onto one or two pages by themselves.
2)
John Luciani wrote:
aggregates the attributes manufacturer and manufacturer_part_number,
Are those two attributes a common convention? I've been using
manufacturer= and manufacturer_partnumber=. I've also been doing
vendor_partnumber_digikey= and vendor_partnumber_mouser=, but I'm not
On Wed, 08 Jul 2009 10:32:15 -0500, Bill Gatliff wrote:
Maybe what you need instead of a complete parts list is a depends-on
specification,
Sounds good. There is no change for the simple case, say opamp plus opamp
power symbol. And it will work for your more sophisticated strategy too.
6)
I looked around, and haven't seen anything documented for these
attributes.
http://www.gedasymbols.org/csv.html
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On Wed, Jul 8, 2009 at 2:08 PM, Bill Gatliff [1]b...@billgatliff.com
wrote:
John Luciani wrote:
aggregates the attributes manufacturer and
manufacturer_part_number,
Are those two attributes a common convention? I've been using
manufacturer= and
On Jul 8, 2009, at 12:25 PM, John Luciani wrote:
Putting vendor information into the schematic is not a good idea.
True, but...
Using your project symbols as capsules for that data is convenient
and easy. The error is using the library symbols directly: that's a
bad idea for all of
DJ Delorie wrote:
I looked around, and haven't seen anything documented for these
attributes.
http://www.gedasymbols.org/csv.html
Great!!
b.g.
--
Bill Gatliff
b...@billgatliff.com
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DJ Delorie wrote:
I looked around, and haven't seen anything documented for these
attributes.
http://www.gedasymbols.org/csv.html
How do you want to handle multiple vendors with different vendor part
numbers?
b.g.
--
Bill Gatliff
b...@billgatliff.com
John Luciani wrote:
On Wed, Jul 8, 2009 at 2:08 PM, Bill Gatliff [1]b...@billgatliff.com
wrote:
John Luciani wrote:
aggregates the attributes manufacturer and
manufacturer_part_number,
Are those two attributes a common convention? I've been using
On Wed, Jul 8, 2009 at 2:36 PM, John Doty [1]...@noqsi.com wrote:
On Jul 8, 2009, at 12:25 PM, John Luciani wrote:
Putting vendor information into the schematic is not a good idea.
True, but...
Using your project symbols as capsules for that data is convenient
How do you want to handle multiple vendors with different vendor part
numbers?
Separate tables.
In my dream world, symbols have values (like 2.32k) and a footprint
class (like 0603). Footprints can be defaulted (in the export step,
not the symbol) so I don't have to fill in 0603 for nearly
DJ Delorie d...@delorie.com wrote:
So, in my dream world, there's exactly one 2-NAND gate symbol, for
example. Mapping that to a specific gate in a specific part, with
pinning, power, manufacturer and vendor information, pricing, and
footprint infomation, is all done by a separate database
Kai-Martin Knaak wrote:
I like to use separate power symbols for ICs. However, I constantly hit
the usability issues associated with this approach. Support for multi-
part symbols is quite fragile.
For example, gnetlist just checks the footprint attribute of the first
symbol it
Hello all:
Stefan Salewski escribió:
On Sat, 2009-07-04 at 13:55 +0200, Rubén Gómez Antolí wrote:
Hello all.
In last months I think about is a good point to create specifics
language list
[...]
What you think about?
Is this really a good idea?
Well, this is the target, discussing
6) gschem should read the parts list and insert all parts at once.
Please clarify what this does. Are you saying that if I add one section
of a 74ls00 I get the other three automatically? That fails in the case
where I add a positive logic picture for sections A and B, and negative
logic
On Wed, 2009-07-08 at 13:49 -0700, Dave N6NZ wrote:
Well, then IMHO, KiCad sucks. :) Power belongs on a symbol by itself,
and that symbol belongs on an infrastructure page, not on the same page
as functional data flow. But that's just me. (And all other right
thinking people :)
Dave N6NZ wrote:
6) gschem should read the parts list and insert all parts at once.
Please clarify what this does. Are you saying that if I add one section
of a 74ls00 I get the other three automatically? That fails in the case
where I add a positive logic picture for sections A and B,
On Wed, 2009-07-08 at 14:33 -0700, Joerg wrote:
That makes hardcore analog stuff very hard to understand.
But you can do it with current gEDA: Put the functional symbol and the
corresponding power symbol close together. The same refdes indicate that
they belong together. There is not really
Stefan Salewski wrote:
On Wed, 2009-07-08 at 14:33 -0700, Joerg wrote:
That makes hardcore analog stuff very hard to understand.
But you can do it with current gEDA: Put the functional symbol and the
corresponding power symbol close together. The same refdes indicate that
they belong
Anthony Blake wrote:
I don't think it would be that hard to constrain a signal to be always
coupled to its return path.
If the return path is single, yes. What if it is just part of a ground plane?
How do you tell the router about imperfect conduction? That's not topology,
it's fields
Kai-Martin Knaak wrote:
it may not be too difficult for a low time
hacker like me. This is a list of sub goals for this little project:
1) gnetlist should look for a footprint in every instance of a refdes
2) add a known attribute parts that lists all symbols of a component
(should the
On Jul 8, 2009, at 3:38 PM, Stefan Salewski wrote:
On Wed, 2009-07-08 at 14:33 -0700, Joerg wrote:
That makes hardcore analog stuff very hard to understand.
But you can do it with current gEDA: Put the functional symbol and the
corresponding power symbol close together. The same refdes
Stefan Salewski wrote:
On Wed, 2009-07-08 at 13:49 -0700, Dave N6NZ wrote:
Well, then IMHO, KiCad sucks. :) Power belongs on a symbol by itself,
and that symbol belongs on an infrastructure page, not on the same page
as functional data flow. But that's just me. (And all other right
On Thu, Jun 18, 2009 at 8:12 AM, Levente Kovacsleventel...@gmail.com wrote:
Hi,
I've added capability to omit pins at the dip type. This enables to generate
footprints for reed relays.
type = dip
omitballs = 3,4,5,10,11,12
pins = 14
will generate something like that
* *
* *
Duncan Drennan wrote:
I've been trying to compile gEDA for win32 using minipack, but it
keeps failing while downloading the packages. It successfully
downloads gettext and libiconv, but then all further packages have
this result:
Downloading jpeg from
Steve Meier wrote:
Talking about gates and using the term slots is so 1980's.
Today's issues are how are pga's supported. How are multiple logic
levels, being able to define a pin as an input an output or
bi-directional or differential? How are the gates logic levels defined?
Let alone, how
On Wed, Jul 08, 2009 at 09:20:54PM -0700, Steve Meier wrote:
Let alone, how at the layout level we can do pin swapping and back
annotation.
I've thought about working on that, because I've dealt with that problem
in almost every project I've done with geda/pcb. I'd love to know how
the big
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