On 11/12/09, Bert Timmerman wrote:
> On 11/7/09, Chitlesh GOORAH wrote:
>> I like it as it will help me spin off a major release notes for FEL-13
>> based on it.
>> e.g for FEL-12
>> http://chitlesh.fedorapeople.org/papers/FEL12ReleaseNotes.pdf
>
> Hmm, AFAICT no mentioning/notes on pcb developme
On 11/12/09, Torsten Wagner wrote:
> like style with fancy pretty 3d windows (e.g., KDE) to a minimalistic design
> and the command-line (e.g., awesome wm).
My favourite is ratpoison.
> I killed more and more
> proprietary programs and replaced bloated GUI-programs by "KISS"(keep it
> simple stu
On 11/7/09, Chitlesh GOORAH wrote:
> I like it as it will help me spin off a major release notes for FEL-13
> based on it.
> e.g for FEL-12
> http://chitlesh.fedorapeople.org/papers/FEL12ReleaseNotes.pdf
Hmm, AFAICT no mentioning/notes on pcb developments (yet ?).
Kind regards,
BertTimmerman.
On 11/7/09, Chitlesh GOORAH wrote:
> Ok, I prefer to dump a pcb-doc package then. The thing is I have been
> receiving a lot of "complains" from people have a slow internet
> connection that FEL is way too big to download. So I think I'll trade
> it with a subpackage.
Yes, sizes of modern distrib
Dear gEDA community,
this is my first mail to the list, thus do not flame me if I ask silly
questions.
For the last days I was looking for a open source program for PCB design.
I came across KiCad and the gEDA package not mentioned some of the smaller
proggis around the web.
Here and there I pl
On 11/11/09, Stefan Salewski wrote:
> On Wed, 2009-11-11 at 20:21 +0100, Stefan Salewski wrote:
>> On Wed, 2009-11-11 at 19:09 +0100, michalwd1979 wrote:
>> http://www.ssalewski.de/tmp/t1.pcb
>>
>> Maybe related to your teardrops or area fill?
>>
>
> Reduced to
>
> http://www.ssalewski.de/tmp/t3.p
Hi guys,
(I've CC'd Harry, as git blame suggests that he wrote the relevant code
- or was the last to run "indent" on it ;)).
I distilled Michael's board into a small test-case..
It looks like the teardrop plugin's use of arbitrary angle arcs has
exposed a bug in the the intersection calculatio
On Wed, 2009-11-11 at 20:34 +0100, Stefan Salewski wrote:
> On Wed, 2009-11-11 at 20:21 +0100, Stefan Salewski wrote:
> > On Wed, 2009-11-11 at 19:09 +0100, michalwd1979 wrote:
> > > Hello,
> >
> > Really strange.
> >
> > By deleting parts of the board one can strip it down to this one:
> >
> >
On Wed, 2009-11-11 at 20:34 +0100, Stefan Salewski wrote:
>
> Seems related to arc elements?
>
If it is, it may be important for the toporouter.
I think Anthony reported about strange DRC errors with toporouter last
summer.
___
geda-user mailing l
On Wed, 2009-11-11 at 20:21 +0100, Stefan Salewski wrote:
> On Wed, 2009-11-11 at 19:09 +0100, michalwd1979 wrote:
> > Hello,
>
> Really strange.
>
> By deleting parts of the board one can strip it down to this one:
>
> http://www.ssalewski.de/tmp/t1.pcb
>
> Maybe related to your teardrops or a
On Wed, 2009-11-11 at 19:09 +0100, michalwd1979 wrote:
> Hello,
Really strange.
By deleting parts of the board one can strip it down to this one:
http://www.ssalewski.de/tmp/t1.pcb
Maybe related to your teardrops or area fill?
___
geda-user maili
On Wed, 2009-11-11 at 08:04 -0500, Ethan Swint wrote:
>
> On 11/10/2009 09:47 PM, Peter Clifton wrote:
> > On Tue, 2009-11-10 at 13:15 -0500, Ethan Swint wrote:
> >
> >> I just did a git fetch& build today from Peter's GL branch - many kudos
> >> again! - but I'm getting a few "features" in m
On Wed, 2009-11-11 at 15:25 +0100, michalwd1979 wrote:
> I can provide the pcb file to any person that is interested. If
> anybody wants to check this please let me know and I will send the
> board.
Can't hurt to have a look - I have a small bet with myself that I know
what the issue might be rel
On Wed, 2009-11-11 at 15:25 +0100, michalwd1979 wrote:
> > We have really smart people in this list, so someone may guess what
> your
> > problem is.
> >
> > What I would do to make life of these smart people easier:
> > Test with stable pcb snapshot.
>
> Tested with pcb 20091103 - exactly the sa
> We have really smart people in this list, so someone may guess what your
> problem is.
>
> What I would do to make life of these smart people easier:
> Test with stable pcb snapshot.
Tested with pcb 20091103 - exactly the same problem.
> Test with your last saved board without these problems.
On Wed, 2009-11-11 at 10:56 +0100, michalwd1979 wrote:
> they are not. Am I doing something wrong?
We have really smart people in this list, so someone may guess what your
problem is.
What I would do to make life of these smart people easier:
Test with stable pcb snapshot.
Test with your last sa
On 11/10/2009 09:47 PM, Peter Clifton wrote:
> On Tue, 2009-11-10 at 13:15 -0500, Ethan Swint wrote:
>
>> I just did a git fetch& build today from Peter's GL branch - many kudos
>> again! - but I'm getting a few "features" in my zooming activity. The
>> first is reproducible by
>> 1) open P
On 11/10/2009 05:26 PM, Kai-Martin Knaak wrote:
> On Tue, 10 Nov 2009 13:15:38 -0500, Ethan Swint wrote:
>
>
>> I just did a git fetch& build today from Peter's GL branch - many kudos
>> again! - but I'm getting a few "features" in my zooming activity. The
>> first is reproducible by
>> 1)
Mark Rages wrote:
>
> I thought the whole point
> of a Schmitt input was to give the input a little "snap" and therefore
> increase the rise/fall times.
It will.
In my setup, 2 channels each setup as I described. The relative phase
from one channel to the other remained pretty much constant th
Hello,
I'm using PCB opengl version from git. Today I've opened my last (finished)
project and I've got a strange warning after optimizing rat lines (O key):
Warning! net "unnamed_net103" is shorted to net "unnamed_net45"
There are about 20 warnings like this in total about some nets (seems rand
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