Hi,
On 5/26/10, Jared Casper jaredcas...@gmail.com wrote:
So since the only way to contribute to PCB seems to be to continually
spam the list with patches, here's three patches to fix bugs in the
bug tracker. Comments welcome.
Here are two more patches dealing with issues similar to
On Wed, May 26, 2010 at 11:49 PM, Ineiev ine...@gmail.com wrote:
On 5/26/10, Jared Casper jaredcas...@gmail.com wrote:
So since the only way to contribute to PCB seems to be to continually
spam the list with patches, here's three patches to fix bugs in the
bug tracker. Comments welcome.
I wrote:
I started working on stuff in the PCB source, and found that it uses a
typedef called 'Boolean' rather than the c99 bool type. Please find
three patches that transition PCB over to using the c99 bool ...
Ineiev wrote:
What are the advantages? is current implementation broken for
Jared Casper wrote:
If it makes it any easier. All five of these patches can be pulled from:
git://github.com/jaredcasper/pcb.git
Thank you. _I_ shall.
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Yo,
I wrote:
Advantages:
* Compiler is able to perform optimisations specific to the bool
type.
ineiev wrote:
Yes, it is. I don't think the gain will be noticeable, though.
PCB data are mostly ints, and pointers, and floats, and doubles.
The point is that there's this patch
I am just transitioning from gschem to pcb for a robot controller board
I am making. It spans several sheets, and has never successfully been
exported by gsch2pcb. One of the error messages is cannot find file
ROV_2010_analog.sch. This is one of the sheets in the overall
I was trying to make footprints for the screw terminals I am using in
my current project. They are on 5 mm spacing, not inches, so I was
hesitant to start with a different footprint and try to change it for
fear of getting the units mixed up and creating a mess. So I switched
PCB to
Could someone explain to me how to create a footprint in PCB with pins
and assign names/numbers to them? And what information is needed to get
gscht2pcb to correctly assign nets to pads?
http://www.delorie.com/pcb/docs/gs/
The second Your first board has that.
On 5/27/10 5:50 AM, Robert Spanton wrote:
Advantages:
* Compiler is able to perform optimisations specific to the bool
type.
I have it here but don't feel like digging through it, and it seems
like it's fresh in your mind so I'll ask...Is there anything in C99
that'd allow for
On May 27, 2010, at 10:51 AM, Mike Bushroe wrote:
Then I did a text
search through each schematic file and found only one occurrence of
ROV_2010_ananlog.sch in any of the schematic files, and that was part
of an 'input' symbol and was listed as 'source'.
That doesn't make any sense to
On Thu, 2010-05-27 at 13:23 -0400, Dave McGuire wrote:
I have it here but don't feel like digging through it, and it seems
like it's fresh in your mind so I'll ask...Is there anything in C99
that'd allow for packing bools into a byte or word value, a-la
Pascal's packed array of boolean?
I
On 5/27/10 12:51 PM, Robert Spanton wrote:
The key word being if. If and when the issue arises, then we fix it.
You'll also note that my patch doesn't include any things to make sure
that it compiles on a VAX ;) If and when someone has an issue compiling
it on a VAX, then it gets fixed, not
On 5/27/10 1:28 PM, Robert Spanton wrote:
On Thu, 2010-05-27 at 13:23 -0400, Dave McGuire wrote:
I have it here but don't feel like digging through it, and it seems
like it's fresh in your mind so I'll ask...Is there anything in C99
that'd allow for packing bools into a byte or word value,
On Thu, 2010-05-27 at 17:51 +0100, Robert Spanton wrote:
Yo,
I wrote:
Advantages:
* Compiler is able to perform optimisations specific to the bool
type.
ineiev wrote:
Yes, it is. I don't think the gain will be noticeable, though.
PCB data are mostly ints, and
Dave McGuire wrote:
I have it here but don't feel like digging through it, and it seems
like it's fresh in your mind so I'll ask...Is there anything in C99
that'd allow for packing bools into a byte or word value, a-la Pascal's
packed array of boolean?
What you are looking for is a
Thanks DJ. The first part of that looks familiar. I guess I never read
down far enough to get the footprint creation. I now realize that my
problem was that the menu did not indicate that converting the buffer
to an element converted vias to pins. I had no idea at all how the pin
Is there a way to change the pin numbers if you create the vias
in the wrong order?
The easiest way is to use a text editor.
And also how do you add names to the pins?
gsch2pcb and pcb's File-Import do that automatically, based on the
pin names in the schematic.
Which governs the
On May 27, 2010, at 2:13 PM, DJ Delorie wrote:
And what does the pin sequence number do?
It determines the order in which the pins are printed in the netlist.
Not really useful for PCB, but useful for simulation models.
Also needed for slotting.
John Doty Noqsi Aerospace,
On Thu, 2010-05-27 at 18:45 +0100, Peter Clifton wrote:
You forget all the development work which has not yet been merged, which
will now be presented with huge (and unnecessary) conflicts.
I didn't know that it was a significant amount. Now I do :)
If you had an automated script for
On 5/27/10 4:07 PM, Armin Faltl wrote:
I have it here but don't feel like digging through it, and it seems
like it's fresh in your mind so I'll ask...Is there anything in C99
that'd allow for packing bools into a byte or word value, a-la Pascal's
packed array of boolean?
What you are
On Thu, 2010-05-27 at 21:48 +0100, Robert Spanton wrote:
2. Run rename-bool.sh with the pcb source as the working dir. This
replaces switches all .c and .h files over to using bool, true,
and false. It then goes to work on the .y and .l files. My sed
fu is
John,
Thanks for the clarification. I checked and I have created a unique
'name':'number' for each net attribute, and matched input to output
names. If a net is formed for each unique name:number, and all inputs
and outputs with that unique name are combined together, then that
Dear,
I'm new in PCB, and PCB manual suggested use vendor file to specify
set of sizes for a PCB manufacturers. But I'd like to know how change
defaults of individual layers gerbers as: top layer: mirror; units:
mm, etc. and produce it? Too I'd like to know how to add options
Mike Bushroe wrote:
If a net is formed for each unique name:number, and all inputs
and outputs with that unique name are combined together, then
I believe it's more a symbol pinnumber to pinlabel correspondence
that matches up symbol pin to subschematic refdes name same as pin label.
On May 27, 2010, at 6:01 PM, John Griessen wrote:
I believe it's more a symbol pinnumber to pinlabel correspondence
that matches up symbol pin to subschematic refdes name same as pin label.
There's no number on a IO port symbol in a subschematic.
You're thinking hierarchy, but Mike's not
Thanks and DJ and John. Now I finally begin to feel comfortable with
creating footprints in PCB.
But I am still finding another problem with getting the whole pile to
translate. I have made or downloaded several custom symbols and
footprints. But not matter how many times I insert a
Here's one of my project files (for gsch2pcb):
-- laminator.prj --
m4-pcbdir /envy/dj/geda/share/pcb/m4
elements-dir /envy/dj/geda/gedasymbols/www/user/dj_delorie/footprints
elements-dir ./footprints
schematics laminator.sch
output-name laminator
--
I needed to do some logos, so everyone gets a logo tool :-)
PolyStitch is a PCB plugin to fix the output of pstoedit's pcbfill
output, when you have text with holes in it (like the letter d).
Pstoedit makes two polygons, one for the outside and one for the hole,
but what you really want in PCB
On Fri, May 28, 2010 at 12:33 AM, DJ Delorie d...@delorie.com wrote:
I needed to do some logos, so everyone gets a logo tool :-)
PolyStitch is a PCB plugin to fix the output of pstoedit's pcbfill
output, when you have text with holes in it (like the letter d).
Pstoedit makes two polygons,
Have you tried the -ssp option to pstoedit? This does the right
thing, when it doesn't segfault.
Predictably, it seg faulted on me.
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Hello,
Robert Spanton rspan...@zepler.net wrote:
The key word being if. If and when the issue arises, then we fix it.
In other words, you are willing to break it and won't fix.
2. Run rename-bool.sh with the pcb source as the working dir. This
replaces switches all .c and .h
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