On 05/27/2011 11:54 AM, DJ Delorie wrote:
This is more anecdotal than anything else...
I'm a Perl fan myself.
(shudder)
Javascript!
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disturbing the flow of the developer's list (which
i'm willing to do, but after reality checking for
community expectations and good manners).
if anyone can help me with the above points i'll
be grateful.
thanks,
jim
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Kai-Martin Knaak wrote:
On Tue, 08 Jun 2010 10:51:10 -0400, Jim wrote:
Oh, please make that change configurable without recompiling!
It is already configurable without recompiling. This is how:
1) locate the file gpcb-menu.res on your box.
2) copy the file to $HOME/.pcb
3) edit
hands to do things if it's
not absolutely necessary. I'll live without some other feature just to
have wheel zoom without a modifier.
Thanks for your efforts to make geda a better tool set!
I second that!
---)kaimartin(---
Jim
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it mandatory to first think about design
rules and default, don't allow any actions until those things are set.
Just because I didn't know about the right way doesn't mean I should
be punished much later in the process.
Jim.
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kai-martin knaak wrote:
Jim wrote:
While we're talking about vias, why is the default via size smaller than
the DRC checks for?
Everytime I generate a board and forget to reset the via size the vias
fail the DRC check.
How do you generate your boards in the first place
someone who knows what they are doing
could mention that in the tutorial?
Jim.
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Stefan Salewski wrote:
On Mon, 2010-05-10 at 08:45 -0400, Jim wrote:
Since a beginner at this most likely is following the tutorial and the
There are many tutorials, at least more than one.
The most recent and fine for beginners is from DJ -- he recommends
generating
to reset the via size the vias
fail the DRC check.
Thanks,
Jim.
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Stefan Salewski wrote:
On Thu, 2010-05-06 at 20:53 -0400, someone who called himself Jim wrote:
I'm not sure I'm saying that right. What I've done is generate a set of
pcb edge fingers using elongated pads,
How did you make the fingers? Just a guess, you may try to exchange
starting
Stefan Salewski wrote:
On Fri, 2010-05-07 at 13:53 -0400, Jim wrote:
Stefan Salewski wrote:
Manually with an editor. I tried exchanging, no help.
Interesting, and surprising for me.
It looked like the autorouter was attaching to the wrong end
, but they don't.
Jim.
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attempted to attach an image showing the problem.
Thanks,
Jim.
inline: pcb3.jpg
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configure I'll have a next try.
Regards, Armin
You have to install libtool. Search for libtool via your distro yum or
apt-cache for RPM or DEB distros. I have no idea how to do it for Windows.
Jim.
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an exception.
Wrong?
Armin
It's not impossible that mysql would quietly ignore an autoincrement
attribute for a foreign key. I agree it looks wrong.
Jim.
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of
them right now. ;)
Jim.
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The rule checker seems to think all is OK.
Thanks,
Jim.
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Ah! Thanks, I accidently moved a part over another and didn't see it.
Jim.
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. I gitted the
latest copy and recompiled xgsch2pcb into /usr/local/bin and it
demonstrated the same wierd behavior.
Any ideas?
Thanks,
Jim.
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Peter Clifton wrote:
On Sat, 2010-04-24 at 06:04 -0400, Jim wrote:
If I take my project.rc file and copy it to project.gsch2pcb and
change
the output-name to something else so I don't clobber my ongoing
development and run xgsch2pcb, pcb then gives me a bunch of errors
Did you copy
-
Other than Bob and Clippy is there anything of any kind that
is unique to or first appeared in Microsoft Windows?
John Eaton
I have yet to see anyone demonstrate the blue screen of death on Linux.
Black and white, yes but blue was unique.
Jim
Dave McGuire wrote:
On Apr 23, 2010, at 12:23 PM, Larry Doolittle wrote:
Lots of people speak Esperanto.
It's all relative. Compared to, say, Spanish?
I'm one of them. Multaj homoj parolas Esperanton. Mi estas unu el ili.
Very cool. Translation?
Come on, Dave. Pattern match.
Armin Faltl wrote:
Still, thanks for all the answers. I hope I don't stamp myself as troll
with this last post of mine on the subject.
Btw, where can I learn Jive?
Start here: http://www.youtube.com/watch?v=0bhTxvzrUFo
Armin
HTH
Jim
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execute to tell it put pin 1 of conn1 at X,
Y. Or would it be best to have a template that has a target in silk to
line the fingers up?
I'm open to the simplest solution.
Thanks,
Jim.
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Jim wrote:
I am designing a couple of boards (if successful more than 2) that
have the same form factor. That is they are the same physical size
and both (all) have fingers to plug into a card slot on a mother
board. So I don't have to worry about registration of the fingers
each time I
set to a unique value that is the
same as the net on an Input on another schematic. When the netlist is
generated the two components (Input and Output) are connected. The net
parameter seems to be the most important element. I'm not sure what the
netlist value does.
Jim
DJ Delorie wrote:
Settings - Only Names
Thank you!
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around something, or d) end up with a red x on a part and the
only thing I can do is draw red boxes.
So can someone give me a hint or two?
Thanks,
Jim.
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bus backplanes to overcome problems with ringing, I think. It's
been too long.
Thanks,
Jim.
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) and you'll probably
get more work done anyways. :-)
Thanks,
-Ales
Can you briefly outline what the purpose of this exercise is for those
of us who are somewhat new to gEDA? Or is it one of those things, If
you have to ask, you probably aren't interested?
Thanks,
Jim
, If
you have to ask :)
DJ I've not tried the new importer but if you'd provide a pointer to
instructions, I'll be glad to give it a try on the 4 boards I have in
development now.
Jim.
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Peter Clifton wrote:
On Fri, 2010-03-26 at 21:11 -0400, Jim wrote:
I have no idea what might be interfering with the operation. It's
probably important to note that this is an OpenVZ container. I'm
going
to chalk it up to something to do with that. Sorry for the wasted
bandwidth. I'll
wrong? Did I fill a buffer? I could save my work and exit
and come back in and continue, but eventually the paste would become
unavailable again.
Thanks,
Jim.
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Peter Clifton wrote:
On Fri, 2010-03-26 at 06:24 -0400, Jim wrote:
I'm running the default gschem 1.6.? that comes with Ubuntu 9.10. I
went in to duplicate a symbol (highlight, copy, paste) and it worked a
few times (3 or 4 or 5). Then it stopped working. I could highlight
and copy
Peter Clifton wrote:
On Fri, 2010-03-26 at 13:03 -0400, Jim wrote:
And once the paste is greyed out, a cut selection cannot be recalled
(pasted) as far as I can tell.
I wonder if some other program on your system is messing with the
selection. I've not been able to reproduce it on my
so if you don't understand something don't waste a lot of
time trying to figure it out. Just ask.
Jim.
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Peter Clifton wrote:
Headline summary:
git clone git://git.gpleda.org/pcb.git
Perhaps the repositories should be easier to find from under the
Development page at gpleda.org.
Thanks.
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flowroute
lamroute (laminar algorithm mapping router)
ziptrace
curveroute
wraproute
John
There's a man with a lot of time on his hands!
Jim.
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500 Gb 10 Mbps 1 IPFREE
7.99/mo.
*Configure* https://www.hostmds.com/client/cart.php?a=addpid=206
The only catch is the 10 Mbps speed, which might not be enough.
Jim.
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http
in that area, the thermal tool is
used to connect them together.
Thanks, that's excellent information.
Jim.
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Are there any fab shops that would be gentle with a very new, very
inexperienced PCB designer? OH and reasonable for a prototype. Last time
I laid up a board I used a drafting table and mylar. I may need a bit
of handholding as I go along.
Thanks,
Jim
is opened but not when a
change is made?
Jim.
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for the route styles. Is that the way to do it?
Thanks,
Jim.
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to manually route? What's
that ins tool for? It does strange things.
Thanks,
Jim.
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Well the problem is with whatever generates the net list.
unnamed_net5R1-1 C3-2 U2-J2_2
Vcc U3-3 C2-2 U1-40
unnamed_net4U2-J1_2 U1-36
unnamed_net3U2-J1_1 U1-35
unnamed_net2U2-J2_3 U1-34
unnamed_net1U2-J2_4 U1-33
+3.3V U3-1 C3-1 C2-1 C1-2 U2-J1_9 U2-J1_10 U2-J1_13
In case anyone is interested, here's the entire schematic:
http://fayettedigital.com/images/sch2.jpg
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Stefan Salewski wrote:
On Sat, 2010-03-06 at 08:50 -0500, Jim wrote:
In case anyone is interested, here's the entire schematic:
http://fayettedigital.com/images/sch2.jpg
Sorry, can not really help you.
(For the experts it may be easier if you make all data files available,
not only
Jim wrote:
When I do an optimize rats nest I don't see anything but I do get a
bunch of errors in the log like this:
Snip
Thank you one and all. I took Stefan's generated footprint, massaged
the pin numbers and got the following working footprint!
Element[ WIZ812MJ mod. WIZ812MJ 0 0
difficult programming problem.
Also understand I've been programming since 1965 and while my degree is
EE, my experiences are overwhelmingly software design so I'm biases a
little. :)
Jim.
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Peter Clifton wrote:
On Wed, 2010-03-03 at 16:42 -0500, Jim wrote:
Perhaps the pin identifier U102-J1-1 is causing issues.
Thanks everyone. I think I understand the issues. I'll just go with
pin numbers 1-40 and drop the J1 and J2 mess. It won't match the part,
but I can
Peter Clifton wrote:
On Wed, 2010-03-03 at 09:41 -0500, Jim wrote:
dpkg -l | grep -i geda
ii geda
1:1.4.0.1 GPL EDA --
So I presume Debian or Ubuntu?
I expect if you grab gEDA 1.6.1 from either
Peter Clifton wrote:
On Wed, 2010-03-03 at 08:55 -0500, Jim wrote:
Peter Clifton wrote:
On Wed, 2010-03-03 at 07:27 -0500, Jim wrote:
Peter Clifton wrote:
This is the only part of the file (board.pcb) that mentions the
footprint and/or the pins.
Element(0x0 Wiz812mj.fp
and
the symbol.
I'm very confused.
I have just two parts in this. I generated two symbols and one
footprint. I used a DIL 40 600 footprint for the one part. I ran
just a few nets to see if I had everything set up OK. Obviously not.
Thanks,
Jim
Peter Clifton wrote:
On Wed, 2010-03-03 at 05:01 -0500, Jim wrote:
When I do an optimize rats nest I don't see anything but I do get a
bunch of errors in the log like this:
Can't find U102 pin J1-13 called for in netlist.
Can't find U102 pin J1-8 called for in netlist.
Can't find U102 pin
Peter Clifton wrote:
On Wed, 2010-03-03 at 07:27 -0500, Jim wrote:
Peter Clifton wrote:
This is the only part of the file (board.pcb) that mentions the
footprint and/or the pins.
Element(0x0 Wiz812mj.fp U102 unknown 10 10 3 100 0x0)
(
Pin(310 -450 60 28 J1-1 0x101)
Pin(310 350 60
timecop wrote:
Why woudl someone use to92 in 2010.
Maybe they are like me and don't have the eyesight, equipment or
dexterity to solder anything smaller than TO92 parts?
Jim.
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Stefan Salewski wrote:
On Wed, 2010-03-03 at 09:41 -0500, Jim wrote:
Do you know where the definitive description of the footprint file can
be found? It's not land_patterns_20050129.pdf which is what googling
wanted me to believe.
Thanks,
Jim.
Land_pattern_xxx is right, see
Stefan Salewski wrote:
On Wed, 2010-03-03 at 11:06 -0500, Jim wrote:
Land_pattern_xxx is right, see link at bottom of this page:
http://www.ssalewski.de/SFG.html.en
I think I followed that pattern but it didn't work. I see you have a
generator can it do a 4 row DIP?
Something
. There are only 6 connections, VCC, GND
MOSI MISO SS and SCLK. Most of the rest of the pins either go to ground
or VCC,
Jim.
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Stefan Salewski wrote:
On Wed, 2010-03-03 at 12:05 -0500, Jim wrote:
It's probably one of a kind. Not worth the trouble I don't think. The
datasheet is here
http://www.vintagecomputercables.com/datasheet/WIZ812MJ%20Datasheet_V_1.1.pdf
It's not something everyone would mount on a PCB
not encountered it before.
Thanks,
Jim.
References
1. http://www.luciani.org/not-quite-ready/not-quite-ready-index.html
2. http://www.luciani.org/not-quite-ready/doc/sampler.pdf
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I'm trying to build a double sided board with fingers to insert into a
edge connector. I realize I can add copper at the pcb step, but
wondered if I could in any way build a footprint to do it for both
sides?
Thanks,
Jim.
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, this is the most helpful group.
Jim
References
1. http://www.brorson.com/gEDA/land_patterns_20070818.pdf
2. http://gedasymbols.org/
3. http://www.gedasymbols.org/user/vanessa_ezekowitz/
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the same guy that was asking questions
before but for some reason the mail list is not getting my postings any
longer so I had to try from my gmail account.
Jim.
References
1. http://fayettedigital.com/images/board.jpg
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of desparation I attempted to add a
footprint-library line to the gafrc but that was rejected.
I'm all out of ideas.
Thanks,
Jim.
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, that : is the syntax for adding directory . also?
with . added, any subdirs will be searched for footprints?
Thanks,
John
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Thank you, gentlemen.
Jim
I've poked at some documentation, what tutorials I could find and
Googled for geda fill and haven't yet found instructions on filling. Is
it called something else in pcb lingo?
Thanks,
Jim.
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I sent a message to the list, but it hasn't appeared. I had an attached
jpg file, but it was small. Would that have prevented it from being
published?
Thanks,
Jim.
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.
[cid:part1.06020809.04010901@fayettedigital.com]
I'm very new at this, so I'm not really sure where to start looking
for a solution.
Thanks,
Jim.
References
1. http://geda.seul.org/wiki/geda:gsch2pcb_tutorial#custom_gschem_symbols
2. http://www.onsemi.com/pub/Collateral/LM358
John Doty wrote:
Check the pinseq= attribute on the output pin. Should be 3, I suppose,
but maybe it isn't.
On Dec 2, 2009, at 11:12 AM, Jim wrote:
When I went to add the two op amps to the schematic I
noticed that when I changed the second one to slot=2, that the output
pin
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hello,
I've been using geda suite for some time now. I made a symbol file for
the Parallax Propeller chip. Where do I need to submit it to be included
in the main database?
You can find the symbol @
up before getting this
software going.
Best of luck,
Jim
PS: Maybe you guys should put together a little conference. It
seems like with all of the gEDA developers in one room, there
could be some solid work on consolidating these programs into
a more unified project
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