Yep, that works ok Dan. Let's file that under the "D'OH!" since I didn't try
it myself :) I sort of liked the mosfet idea from the perspective that no
matter what the
power amp supply, the feedback voltage (from the inverter) is always the same.
That makes the feedback circuit a constant.
[EMAIL PROTECTED] wrote:
Here's a picture of what I'm trying to accomplish :
http://www.geocities.com/fazool1_2000/geda/sample.pdf
Switching frequency is around 500KHz - edges may be fast, but I'm not
yet sure how fast. I've been simulating with 1ns rise/fall time, but
that number isn't based
[EMAIL PROTECTED] wrote:
volts. Maybe in my design, since the drive voltage is over the max, I
can simply use resistor dividers to get the gate voltage to a reasonable
level. It may change the turn on time though.
It's not turn-on time you have to worry about it's the relationship of
when t
[EMAIL PROTECTED] wrote:
Dan, are you saying that the Cgd will allow the fast transient input to
couple to the output?
Clamps may be able to reduce some of the slewing of your 50V signal that
you'd end up with if you just used a divider. Maybe clamp each vgs to
the opposite rail ... your fet
Here's a picture of what I'm trying to accomplish :
http://www.geocities.com/fazool1_2000/geda/sample.pdf
Switching frequency is around 500KHz - edges may be fast, but I'm not yet sure
how fast. I've been simulating with 1ns rise/fall time, but that number isn't
based on any hard data.
In simu
Most mosfets are driven with typically 10-12V for the gate drive. I have
never seen a mosfet with a 50V gate drive requirement.
If high side drive is a concern here you may want to look at bootstrap
devices that are available to drive the high side mosfet. It's unclear to
me exactly what you
gene glick wrote:
I want to build a mosfet inverter that also translates voltages. Pretty
much standard mosfet inverter, nmos is lower transistor, pmos is upper
transistor. The upper pmosfet Vsource is +5VDC, and mosfet Vsource is
-5VDC. But, the gate voltage is +/- 50VDC.
Although the gate
On 12/3/06, gene glick <[EMAIL PROTECTED]> wrote:
I want to build a mosfet inverter that also translates voltages. Pretty
much standard mosfet inverter, nmos is lower transistor, pmos is upper
transistor. The upper pmosfet Vsource is +5VDC, and mosfet Vsource is
-5VDC. But, the gate voltage is
I thought about this a little more. The Vgs specs in the data sheet must be
the maximum allowed before blowing up the gate insulation. A lot of the ones I
looked at had Vgs around +/- 20, or sometimes +/-40 volts. Maybe in my design,
since the drive voltage is over the max, I can simply use r
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