On 08/11/2008, Simon Clubley [EMAIL PROTECTED] wrote:
On 07/11/2008, DJ Delorie [EMAIL PROTECTED] wrote:
Try doing it this way instead:
Instead of one long track, use many track segments - one between each
pair of vias. Then, you can just remove the segments you need to,
On 11/11/2008, Peter Clifton [EMAIL PROTECTED] wrote:
Perhaps you could post that as an example, or make some screen-shots
available on the web somewhere? I'm curious to see what this looks like.
So just to clarify, you are saying it's ok to post a .png as an
attachment on this mailing list
On Tue, 2008-11-11 at 13:41 +, Simon Clubley wrote:
On 11/11/2008, Peter Clifton [EMAIL PROTECTED] wrote:
Perhaps you could post that as an example, or make some screen-shots
available on the web somewhere? I'm curious to see what this looks like.
So just to clarify, you are saying
On Tue, 2008-11-11 at 13:13 +, Simon Clubley wrote:
On 08/11/2008, Simon Clubley [EMAIL PROTECTED] wrote:
In order to make selecting the individual track segments easier, I
also switched to Power sized tracks, and Signal sized vias. I get lots
of DRC warnings, but the example circuit from
On 07/11/2008, DJ Delorie [EMAIL PROTECTED] wrote:
Try doing it this way instead:
Instead of one long track, use many track segments - one between each
pair of vias. Then, you can just remove the segments you need to,
independently of turning vias into holes.
Thank you. I'll try that
Try doing it this way instead:
Instead of one long track, use many track segments - one between each
pair of vias. Then, you can just remove the segments you need to,
independently of turning vias into holes.
The pcb code doesn't notice when a track is disconnected due to
physical damage
This is PCB 20080202 on Linux.
I've written a plugin and external program to allow me to use
Veroboard layouts within PCB.
This is working just fine for the most part, but I'm having problems
with breaking a track into two pieces - it's looking like the rats
nest routines continue to see it as
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