Hi all,
I have some questions about pcb.
1. I have the concept down of how pcb interacts with the components
you place on the board and the netlist you load and I have them
working properly, as I can properly highlight nets and components with
the netlist browser. However, from what I can tell,
However, from what I can tell, there still isn't any concept of lvs
in pcb, or am I missing that?
PCB doesn't know about LVS, stripline, differential pairs, or any of
that.
If not, is there at least a way to make sure that your netlist and
pcb have exactly the same number of components with
On 12/01/2009 11:57 AM, DJ Delorie wrote:
However, from what I can tell, there still isn't any concept of lvs
in pcb, or am I missing that?
PCB doesn't know about LVS, stripline, differential pairs, or any of
that.
I think he means LVS as in Logic vs Schematic - a form of layout
checking
I think he means LVS as in Logic vs Schematic - a form of layout
checking commonly found in ASIC design, not LVDS as in Low-Voltage
Differential Signaling.
Ah. In PCB, what we do is have (1) the netlist, which is from the
schematic and knows what should be, and (2) the rats nest and DRC,
DJ Delorie wrote:
Ah. In PCB, what we do is have (1) the netlist, which is from the
schematic and knows what should be, and (2) the rats nest and DRC,
which come from the PCB and know what is. The o key compares the
two.
DRC will find multiple placements, one of which is not connected to
Anthony Shanks wrote:
Hi all,
3. Right now, I am running gnetlist -g PCB on my schematics to
generate the pcb netlist file. The problem is I have multiple
schematics that I am generating a netlist from and I am manually
appending the refdes to indicate which schematic the netlist comes
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