On Jan 20, 2008 12:16 AM, Kai-Martin Knaak [EMAIL PROTECTED] wrote:
On Sat, 19 Jan 2008 20:24:42 +, a r wrote:
First of all: What do you refer to by cell? A schematic symbol, or a
pcb footprint?
As John said, I referred to any kind of data that belongs to a
particular block or component
Hi,
There is a notion of a current library in gEDA (the one that can be
set with: (component-library dir-name) (source-library dir-name)
).
Now, what if I have multiple (sourcecomponent) libraries that I want
to use? How to add them all so that they are visible in gschem? And
how to select a
a r wrote:
Hi,
There is a notion of a current library in gEDA (the one that can be
set with: (component-library dir-name) (source-library dir-name)
).
Now, what if I have multiple (sourcecomponent) libraries that I want
to use? How to add them all so that they are visible in gschem? And
On Jan 19, 2008 6:35 PM, John Griessen [EMAIL PROTECTED] wrote:
a r wrote:
[jg] Library search path is a good concept for dealing with this.
Proven in chip design setting to be low enough hassle, flexible.
Can you tell me how to set this path? That's what I'm looking for.
[jg]It's
On Jan 19, 2008 7:53 PM, a r [EMAIL PROTECTED] wrote:
On Jan 19, 2008 6:35 PM, John Griessen [EMAIL PROTECTED] wrote:
a r wrote:
[jg] Library search path is a good concept for dealing with this.
Proven in chip design setting to be low enough hassle, flexible.
Can you tell me how to
On Sat, 19 Jan 2008 20:24:42 +, a r wrote:
First of all: What do you refer to by cell? A schematic symbol, or a
pcb footprint?
1. Library search path, or rather some kind of a project file that
contains a list of libraries, is a good idea.
There is a multitude of rc files that can be
a r wrote:
This is going to be hard to maintain and does not
really do anything that couldn't have been done by a modification of
gschem/gnetlist itself.
It was just a quick to implement suggestion. Doing it in guile would be better.
Good project to hire?
JG
--
Ecosensory Austin TX
tinyOS
Kai-Martin Knaak wrote:
On Sat, 19 Jan 2008 20:24:42 +, a r wrote:
First of all: What do you refer to by cell? A schematic symbol, or a
pcb footprint?
He likely meant the chip design lingo, where cell is layout, schematic,
verilog, model, etc.
John
--
Ecosensory Austin TX
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