Thanks for the quick replies.
Adding the Text line fixed the schem message. Still having
problems with PCB not detecting the net criss-cross when I
intentionally miss-connect the nets. PCB is indicates a RAT
between the Power and Ground.
George
On 02/17/2011 09:54 AM, John Doty wrote:
On Feb 1
On Feb 17, 2011, at 6:57 AM, George M. Gallant, Jr. wrote:
> I have created a symbol for the TI ADS1298. It has multiple power pins,
> DVdd, DVss, ADvv, & AVss. For test purposes, I declared 1 of the pins as
> a net.
>
> Loadiing the schematic gives:
>
> Read garbage in [ads1298-1.sym] :
> >>
>
On Thu, 2011-02-17 at 08:57 -0500, George M. Gallant, Jr. wrote:
> I have created a symbol for the TI ADS1298. It has multiple power pins,
> DVdd, DVss, ADvv, & AVss. For test purposes, I declared 1 of the pins as
> a net.
>
> Loadiing the schematic gives:
>
> Read garbage in [ads1298-1.sym] :
>
I have created a symbol for the TI ADS1298. It has multiple power pins,
DVdd, DVss, ADvv, & AVss. For test purposes, I declared 1 of the pins as
a net.
Loadiing the schematic gives:
Read garbage in [ads1298-1.sym] :
>>
net=AVdd:21
<<
Is there a tutorial available that describes the proper synta
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