[gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

* build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token FAILED! scons: `build/ALPHA/gem5.debug' is up to date. scons: `build/ALPHA_MOESI_hammer/gem5.debug' is up to date. scons: `build/ALPHA_MESI_CMP_directory/gem5.debug' is up to date. scons:

[gem5-dev] Review Request: Configs: SE Script Fix for Alpha+Ruby Simulations. PIO Device Interrupts parameters are not found in the ALPHA ISA, only for x86.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1448/ --- Review request for Default. Description --- Changeset 9250:fc633cd6aca4

Re: [gem5-dev] Review Request: Configs: SE Script Fix for Alpha+Ruby Simulations. PIO Device Interrupts parameters are not found in the ALPHA ISA, only for x86.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1448/ --- (Updated Sept. 25, 2012, 1:07 p.m.) Review request for Default. Description

[gem5-dev] changeset in gem5: build: Add missing dependencies when building...

changeset fdf49f35d2a4 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=fdf49f35d2a4 description: build: Add missing dependencies when building param SWIG interfaces This patch adds an explicit dependency between param_%s.i and the Python source file

[gem5-dev] changeset in gem5: ARM: Predict target of more instructions that...

changeset dab0f29394f0 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=dab0f29394f0 description: ARM: Predict target of more instructions that modify PC. diffstat: src/arch/arm/insts/macromem.cc | 8 src/arch/arm/isa/insts/data.isa | 15

[gem5-dev] changeset in gem5: gem5: Update the README file to be a bit less...

changeset 1f43ff3d9bc6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1f43ff3d9bc6 description: gem5: Update the README file to be a bit less out-of-date. diffstat: README | 67 +++-- 1 files changed, 40

[gem5-dev] changeset in gem5: ARM: Inst writing to cntrlReg registers not s...

changeset 5d0fcec59036 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5d0fcec59036 description: ARM: Inst writing to cntrlReg registers not set as control inst Deletion of the fact that instructions that writes to registers of type cntrlReg are not

[gem5-dev] changeset in gem5: CPU: Add abandoned instructions to O3 Pipe Vi...

changeset f350fac86d0f in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f350fac86d0f description: CPU: Add abandoned instructions to O3 Pipe Viewer diffstat: src/cpu/o3/commit_impl.hh | 15 + src/cpu/o3/dyn_inst.hh | 15 ++-

[gem5-dev] changeset in gem5: sim: Remove SimObject::setMemoryMode

changeset e0d2a8e9f445 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=e0d2a8e9f445 description: sim: Remove SimObject::setMemoryMode Remove SimObject::setMemoryMode from the main SimObject class since it is only valid for the System class. In

[gem5-dev] changeset in gem5: sim: Move CPU-specific methods from SimObject...

changeset f1b35c618252 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f1b35c618252 description: sim: Move CPU-specific methods from SimObject to the BaseCPU class diffstat: src/cpu/BaseCPU.py | 16 src/cpu/base.hh| 24

[gem5-dev] changeset in gem5: base: Check for static_assert support and pro...

changeset 60f043573a65 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=60f043573a65 description: base: Check for static_assert support and provide fallback C++11 has support for static_asserts to provide compile-time assertion checking. This is very

[gem5-dev] changeset in gem5: arm: Use a static_assert to test that miscReg...

changeset f14188a5a1d6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f14188a5a1d6 description: arm: Use a static_assert to test that miscRegName[] is complete Instead of statically defining miscRegName to contain NUM_MISCREGS elements, let the

[gem5-dev] changeset in gem5: Util: Added script to semantically diff two c...

changeset 04dfa1898882 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=04dfa1898882 description: Util: Added script to semantically diff two config.ini files This script (util/diff_config.pl) takes two config.ini files and compares them. It

[gem5-dev] changeset in gem5: ARM: Squash outstanding walks when instructio...

changeset baa17ba80e06 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=baa17ba80e06 description: ARM: Squash outstanding walks when instructions are squashed. diffstat: src/arch/arm/ArmTLB.py | 2 ++ src/arch/arm/table_walker.cc | 44

[gem5-dev] changeset in gem5: O3: Pack the comm structures a bit better to ...

changeset 9ca8345d24c4 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=9ca8345d24c4 description: O3: Pack the comm structures a bit better to reduce their size. diffstat: src/cpu/o3/comm.hh | 97 ++--- 1 files

[gem5-dev] changeset in gem5: ARM: added support for flattened device tree ...

changeset f795ce1feb5b in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f795ce1feb5b description: ARM: added support for flattened device tree blobs Newer Linux kernels require DTB (device tree blobs) to specify platform configurations. The input DTB

[gem5-dev] changeset in gem5: Statistics: Add a function to configure perio...

changeset 547845010c08 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=547845010c08 description: Statistics: Add a function to configure periodic stats dumping This patch adds a function, periodicStatDump(long long period), which will dump and reset

[gem5-dev] changeset in gem5: Cache: add a response latency to the caches

changeset 066099902102 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=066099902102 description: Cache: add a response latency to the caches In the current caches the hit latency is paid twice on a miss. This patch lets a configurable response

[gem5-dev] changeset in gem5: MEM: Put memory system document into doxygen

changeset 1607119c36bb in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1607119c36bb description: MEM: Put memory system document into doxygen diffstat: src/Doxyfile|2 +- src/doc/memory_system.doxygen | 278

[gem5-dev] changeset in gem5: ARM: update stats for bp and squash fixes.

changeset 8fe936e937bd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=8fe936e937bd description: ARM: update stats for bp and squash fixes. diffstat: tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini | 136 +-