[gem5-dev] Change in gem5/gem5[master]: we add PRFM PST instruction for arm

kodamayu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13675 Change subject: we add PRFM PST instruction for arm .. we add PRFM PST instruction for arm Change-Id: I9144e7233900aa

[gem5-dev] Change in gem5/gem5[master]: python: Add utility function to override config parameters

Ciro Santilli has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/12984 ) Change subject: python: Add utility function to override config parameters .. python: Add utility functi

[gem5-dev] Change in gem5/gem5[master]: config: add --param to fs.py, se.py and fs_bigLITTLE.py

Ciro Santilli has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/12985 ) Change subject: config: add --param to fs.py, se.py and fs_bigLITTLE.py .. config: add --param to fs.py,

[gem5-dev] Change in gem5/gem5[master]: mem-cache: Move evictBlock(CacheBlk*, PacketList&) to base

Daniel Carvalho has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13656 Change subject: mem-cache: Move evictBlock(CacheBlk*, PacketList&) to base .. mem-cache: Move evictBlock(CacheB

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add support for first-/non-faulting loads

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13523 ) Change subject: arch-arm: Add support for first-/non-faulting loads ..

[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Increase LSQ buffer sizes to match max vector length

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13525 ) Change subject: cpu-o3: Increase LSQ buffer sizes to match max vector length .

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add support for SVE load/store structures

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13524 ) Change subject: arch-arm: Add support for SVE load/store structures ..

[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Add cache read ports limit to LSQ

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13517 ) Change subject: cpu-o3: Add cache read ports limit to LSQ

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add initial support for SVE contiguous loads/stores

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13519 ) Change subject: arch-arm: Add initial support for SVE contiguous loads/stores .

[gem5-dev] Change in gem5/gem5[master]: cpu-o3: O3 LSQ Generalisation

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13516 ) Change subject: cpu-o3: O3 LSQ Generalisation .. cpu-

[gem5-dev] Change in gem5/gem5[master]: base: Iterable CircularQueue implementation

Giacomo Travaglini has uploaded a new patch set (#10) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13127 ) Change subject: base: Iterable CircularQueue implementation .

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add initial support for SVE gather/scatter loads/stores

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13521 ) Change subject: arch-arm: Add initial support for SVE gather/scatter loads/stores .

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add initial support for the Scalable Vector Extension

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13515 ) Change subject: arch-arm: Add initial support for the Scalable Vector Extension ...

[gem5-dev] Change in gem5/gem5[master]: mem: Add support for partial stores and wide memory accesses

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13518 ) Change subject: mem: Add support for partial stores and wide memory accesses .

[gem5-dev] Change in gem5/gem5[master]: arch-arm: Treat SVE prefetch instructions as no-ops

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13522 ) Change subject: arch-arm: Treat SVE prefetch instructions as no-ops ..

[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Add support for pinned writes

Giacomo Travaglini has uploaded a new patch set (#4) to the change originally created by Giacomo Gabrielli. ( https://gem5-review.googlesource.com/c/public/gem5/+/13520 ) Change subject: cpu-o3: Add support for pinned writes

[gem5-dev] Change in gem5/gem5[master]: Remove circular

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13655 Change subject: Remove circular .. Remove circular Change-Id: I4c2b0cd1c994bb2e57adbe8678d01e00aaa9662e ---

[gem5-dev] Change in gem5/gem5[master]: arm: treat aarch64 hints as NOPs instead of panic

Ciro Santilli has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/13476 ) Change subject: arm: treat aarch64 hints as NOPs instead of panic .. arm: treat aarch64 hints as NOPs in

[gem5-dev] Change in gem5/gem5[master]: arm: update hint instruction decoding to match ARMv8.5

Ciro Santilli has submitted this change and it was merged. ( https://gem5-review.googlesource.com/c/public/gem5/+/13475 ) Change subject: arm: update hint instruction decoding to match ARMv8.5 .. arm: update hint instruction d

[gem5-dev] Change in gem5/gem5[master]: sim: Move BitUnion overloading to show/parseParams

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13636 Change subject: sim: Move BitUnion overloading to show/parseParams .. sim: Move BitUnion overloading to show

[gem5-dev] Change in gem5/gem5[master]: sim: Move paramIn/Out definition to header file

Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/13635 Change subject: sim: Move paramIn/Out definition to header file .. sim: Move paramIn/Out definition to heade

[gem5-dev] Cron /z/m5/regression/do-regression quick

* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! * build/RISCV/tests/opt/