Bobby R. Bruce has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/25283 )
Change subject: Review access change
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Review access change
Change-Id: I05002faec1f3d36698885bbec4d639f663e2
Hello,
Question about the L3 cache's role in the MOESI_AMD_Base protocol (and by
extension GPU_VIPER which seems to extend it).
There seems to be an l3 cache in the directory controller, but it looks
like the ports that go to the L3 Cache are never activated (I added some
dprintfs in the .sm file
Thanks Jason!
I see the check functions, so that all makes sense now.
(The next question is about a specific protocol so I'll make a separate
thread)
Cheers,
Dan
On Tue, Feb 11, 2020 at 12:28 PM Jason Lowe-Power
wrote:
> Hi Dan,
>
> This is for an advanced feature :). This is used for the res
Hi Dan,
This is for an advanced feature :). This is used for the resource stalls
feature. Resource stalls are used to model bandwidth to different
structures. This is saying that on the transition from I to I_M0 will
access the L1D0TagArrayRead and L2TagArrayRead. In the background, this
calls che
Hello,
I went through the learning gem5 book to learn slicc (finally) and it made
sense to me through that. But I've been looking through the
MOESI_AMD_Base-CorePair.sm file (among others) and I've seen a syntax I
don't understand.
transition(I, C0_Store_L1miss, I_M0) {L1D0TagArrayRead, L2TagArra
Thanks Timothy,
I have created a JIRA ticket for it:
https://gem5.atlassian.net/browse/GEM5-331
In the meantime I am considering about adding a ruby-cpt test to long
regressions.
Giacomo
From: gem5-dev on behalf of Timothy Hayes
Sent: 06 February 2020 23:02
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/23186 )
Change subject: arch: Get rid of the generic mmapped IPR mechanism.
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arch: Get rid of the generic mmapped IPR mechanism.
J
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/23187 )
Change subject: mem: Eliminate the now unused GENERIC_IPR request flag.
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mem: Eliminate the now unused GENERIC_IPR request
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/23185 )
Change subject: arm: Call pseudoInst directly from the mmapped IPR handlers.
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arm: Call pseudoInst directly from the mmappe
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/24526 )
Change subject: tests,misc: update TESTING.md documentation
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tests,misc: update TESTING.md documentation
* Documen
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