[gem5-dev] [M] Change in gem5/gem5[develop]: misc: Add KCONFIG.md file which talks about Kconfig files.

2022-04-11 Thread Gabe Black (Gerrit) via gem5-dev
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/58634 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: misc: Add KCONFIG.md file which talks about Kconfi

[gem5-dev] [S] Change in gem5/gem5[develop]: fastmodel: Export more CortexR52 reset pin

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58811 ) Change subject: fastmodel: Export more CortexR52 reset pin .. fastmodel: Export more CortexR52 reset pin Change

[gem5-dev] [S] Change in gem5/gem5[develop]: fastmodel: Add CortexA76 artifact reset port

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58814 ) Change subject: fastmodel: Add CortexA76 artifact reset port .. fastmodel: Add CortexA76 artifact reset port Th

[gem5-dev] [M] Change in gem5/gem5[develop]: fastmodel: Add a special reset interface to consolidate reset logic

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58810 ) Change subject: fastmodel: Add a special reset interface to consolidate reset logic .. fastmodel: Add a speci

[gem5-dev] [M] Change in gem5/gem5[develop]: fastmodel: Export more CortexA76 reset pin

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58812 ) Change subject: fastmodel: Export more CortexA76 reset pin .. fastmodel: Export more CortexA76 reset pin Change

[gem5-dev] [S] Change in gem5/gem5[develop]: fastmodel: Add CortexR52 artifact reset port

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58813 ) Change subject: fastmodel: Add CortexR52 artifact reset port .. fastmodel: Add CortexR52 artifact reset port Th

[gem5-dev] [S] Change in gem5/gem5[develop]: scons: Fix script failed when default files not found

2022-04-11 Thread Yu-hsin Wang (Gerrit) via gem5-dev
Yu-hsin Wang has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58809 ) Change subject: scons: Fix script failed when default files not found .. scons: Fix script failed when default f

[gem5-dev] [S] Change in gem5/gem5[develop]: stdlib, configs: Migrate riscv-ubuntu-run example to Simulator

2022-04-11 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58790 ) Change subject: stdlib, configs: Migrate riscv-ubuntu-run example to Simulator .. stdlib, configs: Migrate risc

[gem5-dev] [S] Change in gem5/gem5[develop]: stdlib: Add checkpoint to Simulator

2022-04-11 Thread Hoa Nguyen (Gerrit) via gem5-dev
Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58789 ) Change subject: stdlib: Add checkpoint to Simulator .. stdlib: Add checkpoint to Simulator Change-Id: I58b686b6b4

[gem5-dev] [S] Change in gem5/gem5[develop]: tests: Disable failing MI_Example/Timing CPU X86 Boot Tests

2022-04-11 Thread Bobby Bruce (Gerrit) via gem5-dev
Bobby Bruce has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58769 ) Change subject: tests: Disable failing MI_Example/Timing CPU X86 Boot Tests .. tests: Disable failing MI_Example/

[gem5-dev] [S] Change in gem5/gem5[develop]: tests: Remove 8-core boot tests for Timing and Atomic

2022-04-11 Thread Bobby Bruce (Gerrit) via gem5-dev
Bobby Bruce has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/58770 ) Change subject: tests: Remove 8-core boot tests for Timing and Atomic .. tests: Remove 8-core boot tests for Timi

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-vega: Implement SOP2 S_MUL_HI instructions

2022-04-11 Thread Matthew Poremba (Gerrit) via gem5-dev
Matthew Poremba has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/58473 ) Change subject: arch-vega: Implement SOP2 S_MUL_HI instructions .. arch-vega: Implement SOP2 S_MUL_HI instructions Two

[gem5-dev] [S] Change in gem5/gem5[develop]: mem-ruby: Added upstream_nodes to AbstractController

2022-04-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57296 ) ( 6 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mem-ruby: Added upstream_nodes to Abstract

[gem5-dev] [M] Change in gem5/gem5[develop]: mem-ruby: AbstractController unaddressed profiling

2022-04-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57297 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mem-ruby: AbstractController unaddressed p

[gem5-dev] [M] Change in gem5/gem5[develop]: cpu: Handle external TLBI Sync requests in O3CPU

2022-04-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57292 ) Change subject: cpu: Handle external TLBI Sync requests in O3CPU .. cpu: Handle external TLBI Sync requests in O3CPU

[gem5-dev] [M] Change in gem5/gem5[develop]: mem-ruby: Support for unaddressed mem requests in the RubyRequest

2022-04-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57293 ) Change subject: mem-ruby: Support for unaddressed mem requests in the RubyRequest .. mem-ruby: Support for unaddre

[gem5-dev] [M] Change in gem5/gem5[develop]: mem-ruby: Add TLBI callbacks to the RubyPort

2022-04-11 Thread Giacomo Travaglini (Gerrit) via gem5-dev
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/57295 ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mem-ruby: Add TLBI callbacks to the RubyPo