[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix debug prints for regular Stores

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix debug prints for regular Stores

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Adding FS support for MOESI_AMD_Base

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: MESI_Three_level prefetcher page crossing

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: MESI_Three_level prefetcher support

able::getNullEntry() +{ +return nullptr; +} + // looks an address up in the cache template inline ENTRY* -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/27715 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settin

[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: MESI_Three_Level LL/SC improvements

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: LL/SC fixes

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: fix MESI_Three_Level erroneous transition

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: GCN3 and VIPER integration

TY OF SUCH DAMAGE. * - * Authors: Sooraj Puthoor + * Author: Sooraj Puthoor, Tuan Ta */ #ifndef __MEM_RUBY_SYSTEM_VIPERCOALESCER_HH__ @@ -59,16 +59,31 @@ typedef VIPERCoalescerParams Params; VIPERCoalescer(const Params *); ~VIPERCoalescer(); -void wbCallback(Addr address); -

[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Add DMA support to MOESI_AMD_Base-dir.sm

Addr LineAddress, desc="Line address for this request"; + MachineID Requestor,desc="Node who initiated the request"; + NetDest Destination, desc="Destination"; + DataBlock DataBlk, desc="DataBlk attached to this request";

[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Getting rid of HSA segment and scope

ctor m_ForwardToFirstResponseDelayHist; std::vector m_FirstResponseToCompletionDelayHist; +// TODO - Need to update the following stats once the VIPER protocol +//is re-integrated. +//Stats::Distribution numHopDelays; +//Stats::Distribution tcpToTccDelay; +//Stats::Distri

[gem5-dev] Change in gem5/gem5[develop]: gpu-compute, configs: Add GCN3 ISA support to GPU model

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[gem5-dev] Change in gem5/gem5[master]: dev: Adding GPU as a PCI device

.count(self.gpu.dma) == 0: +self.gpu.dma = bus.slave + + def attachIO(self, bus, dma_ports): # Route interrupt signals self.pic1.output = self.io_apic.inputs[0] -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/23401 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I0ca032cd130e33f1211e94b742041b673843c2d9 Gerrit-Change-Number: 23401 Gerrit-PatchSet: 1 Gerrit-Owner: Pouya Fotouhi Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: config: Adding a simple script for GPU full-system changes

ies.append(assign_to_apic) + + assignISAInt(0, 2) +assignISAInt(1, 1) +for i in range(3, 15): +assignISAInt(i, i) +self.intel_mp_table.base_entries = base_entries +self.intel_mp_table.ext_entries = ext_entries + +entries = \ + [ +# Mark the first megabyte of memory as reserved +X86E820Entry(addr = 0, size = '639kB', range_type = 1), +X86E820Entry(addr = 0x9fc00, size = '385kB', range_type = 2), +# Mark the rest of physical memory as available +X86E820Entry(addr = 0x10, +size = '%dB' % (self.mem_ranges[0].size() - 0x10), +range_type = 1), +] +# Mark [mem_size, 3GB) as reserved if memory less than 3GB, which +# force IO devices to be mapped to [0xC000, 0x). Requests +# to this specific range can pass though bridge to iobus. +entries.append(X86E820Entry(addr = self.mem_ranges[0].size(), +size='%dB' % (0xC000 - self.mem_ranges[0].size()), +range_type=2)) + +# Reserve the last 16kB of the 32-bit address space for m5ops +entries.append(X86E820Entry(addr = 0x, size = '64kB', +range_type=2)) + +# Add the rest of memory. This is where all the actual data is +entries.append(X86E820Entry(addr = self.mem_ranges[-1].start, +size='%dB' % (self.mem_ranges[-1].size()), +range_type=1)) + +self.e820_table.entries = entries -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/23400 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I87891fd2869b0a85a67415831601eb566ac9ece7 Gerrit-Change-Number: 23400 Gerrit-PatchSet: 1 Gerrit-Owner: Pouya Fotouhi Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Adding support for shadowed memory

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[gem5-dev] Change in gem5/gem5[master]: dev: Adding support for large BAR

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[gem5-dev] Change in gem5/gem5[master]: dev: Adding support for large BAR

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Adding warning for movnti

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Adding warning for movnti

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: implement movntq/movntdq instructions

env.setSize(opType.size) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/20288 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I2052ac097

[gem5-dev] Change in gem5/gem5[master]: arch-x86: Updating fault condition for write to cr4

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Updating fault condition for write to cr4

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Updating fault condition for write to cr4

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MI

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI hammer

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI CMP

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MI

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI CMP

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: arch-x86: Updating fault condition for write to cr4

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI hammer

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MOESI

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe on MI

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Remove assertion with incorrect assumption

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Remove assertion with incorrect assumption

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Remove assertion with incorrect assumption

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Adding a new slicc statement - to not evict locked cachelines

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[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Set packet data type for IPR read

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[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Set packet data type for IPR read

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[gem5-dev] Change in gem5/gem5[master]: cpu-o3: Set packet data type for IPR read

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Use check_on_cache_probe to protect locked lines from eviction

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Adding a new slicc statement - to not evict locked cachelines

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Fixing Topology

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Fixing MESI Three Level

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Fixing Topology

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[gem5-dev] Change in gem5/gem5[master]: mem-ruby: Fixing MESI Three Level

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