[gem5-dev] SMT with X86

2015-01-09 Thread Dutu, Alexandru via gem5-dev
Hi everyone, I have been trying to run with SMT enabled in SE mode, using x86. It seems ZeroRegister gets mapped to index 16 for the first hardware thread, which is also register t0 that is used by the microcode. For the following hardware threads the ZeroRegister will get mapped to 54, 92, 130

Re: [gem5-dev] SMT with x86

2015-01-08 Thread Gabe Black via gem5-dev
t0 must always return 0, and writes to it must always be ignored (or overwritten before the next instruction). You're corrupted program counter might be because you're using physical registers which aren't actually there, accessing beyond the end of an array and reading/writing something random. T

[gem5-dev] SMT with x86

2015-01-08 Thread Dutu, Alexandru via gem5-dev
Hi everyone, I have been trying to run with SMT enabled in SE mode, using x86. It seems ZeroRegister gets mapped to index 16 for the first hardware thread, which is also register t0 that is used by the microcode. For the following hardware threads the ZeroRegister will get mapped to 54, 92, 130