Hi,
I'm working on something else right now, and I might not have a chance to
dig into this for a while, so I figured I would post to the list:
I just updated to the most recent repo, and ALPHA checkpoint restore into
timing-enabled CPUs doesn't appear to be working:
1) Checkpoint by runni
changeset 61e31534522d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=61e31534522d
description:
X86: Make unrecognized instructions behave better in x86.
diffstat:
src/arch/x86/faults.cc | 7 +++
src/arch/x86/faults.hh | 5 +
src/
changeset 37c56be05af0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=37c56be05af0
description:
X86: Make the halt microop non-speculative.
Executing this microop makes the CPU halt even if it was misspeculated.
diffstat:
src/arch/x86/isa/microops/specop.isa
changeset f4eda002333b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f4eda002333b
description:
CPU: Trim unnecessary includes from some common files.
This reduces the scope of those includes and makes it less likely for
there to
be a dependency loop. T
scons: *** Source `tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt'
not found, needed by target
`build/MIPS_SE/tests/fast/quick/00.hello/mips/linux/simple-timing/status'.
* build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby
passed.
* build/ALPHA_SE/tests/fa