Hi Richard,
You wrote below:
“As noted earlier, mpirun in will fail in gem5 without a list of hosts.”
This should not happen. Without a list of hosts, mpirun should launch all the
mpi processes on the ‘localhost’ (i.e. where mpirun is running). mpirun is
using ssh to start new processes.
Mak
Hello
I have tried running the Server/Client a.out code on 2 processors which are
connected with links and routers, for that I give the a.outs of the Server
and Client code to the workloads of the processors, and since the PIDs
differ there should be no problem, I also made sure that the Server co
If you look in the source, that print is called during exec() for the
dispatcher. It simply means that for that cycle there are no kernel launches.
It’s not unusual to see that print at the beginning showing 0 kernel launches.
Those libraries do not matter as they are extensions, and they are no
Hello Everyone,
I have added new instruction in x86 isa of gem5. I wanted to test it using
(modified) binary. As new instruction are not identified by general gcc/g++
complier on host x86 machine. I am unable to get binary.
I am using SE mode of gem5. Is there a way to run new instruction using as
Try GCC __asm__ with raw bytes via .inst, e.g.
https://github.com/torvalds/linux/blob/94710cac0ef4ee177a63b5227664b38c95bbf703/arch/arm/include/asm/barrier.h#L23
On Mon, Sep 10, 2018 at 4:54 PM Abhishek Singh <
abhishek.singh199...@gmail.com> wrote:
> Hello Everyone,
>
> I have added new instruct
Hi,
I am trying to add some latency to mimic some operation (memory encryption
etc when reading and writing). Where and how can I do it. I think the
receiveFunctional function in dram_ctrl.cc is called when there is
something to read or write. If this is where I must put my latency, how can
I do i
Hi,
I need help with running the spec cpu2006 in gem5. I have followed the
instructions provided in
https://markgottscho.wordpress.com/2014/09/20/tutorial-easily-running-spec-cpu2006-benchmarks-in-the-gem5-simulator/
but getting errors. My benchmark directory has the following files and
execu
Dear All,
In the writMem() for atomicsimpleCPU, when we are creating the memory
write request using req->setVirt(), the ASID field is given as 0. Is
there any reason why we are putting it as 0 instead of the actual ASID.
Also don't we need the ASID for TLB lookup which happens just after this