Hi All,
I made some changes on gem5 source code in commit_impl.hh to collect the
performance counters on a text file and I built the gem5 without any error. but
I am not able to see the text file in the gem5 directory?
i used this code to write the data to the txt file.
const char *pat
Hi All,
I made some changes on gem5 source code to collect the performance counters on
a text file and I built the gem5 without any error. but I am not able to see
the text file in the gem5 directory?
Does anyone know how to dump the text file in gem5? any help would be
appreciated.
Thanks
__
Hi all,
I was wondering if the following would be possible with a gem5 full-system
simulation, and I thought this would be the best place to ask.
I want to simulate a multicore system with two different configurations of
cores coexisting in the same system. One set of the cores (I'll call this
A-
Hi Anuj,
Method 1:
If you already know the address range, for classic cache model, in the
“src/mem/cache/base.cc” file see the recvTimingReq function.
When the address lies in your desired address range turn the NonCacheable
request flag high for that block. You can find information about this fla
Hi,
For now the standard stats file from gem5 using classic cache model does
not have MPKI.
So you need to declare the stats and you can access the declared stats in
cpu, see the how cpu calls LSQ (or cache) objects and using that you can
access the MPKI stat from CPU
On Fri, Jun 26, 2020 at 4:2
Hi,
Building on top of my previous question and making it a bit more general.
Is there a way to access stats in a somewhat global manner? Let me explain
that with an example. During program execution, I need to know the number
of instructions committed and the MPKIs for L1 and L2. On every commit
With the caches on, is there a way to define certain memory ranges for the
CPU to directly access memory (Not through the L1 or L2) ? Can somebody
provide any example on how to do that ?
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J ANUJ
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