[gem5-users] Re: A question regarding to VIPT/PIPT

2020-11-05 Thread Ayaz Akram via gem5-users
Hi Leon, I think you can use lower than normal latency values (what would be reasonable for PIPT) to model VIPT cache in gem5. To understand how to configure cache latencies, have a look here (if you have not already): https://www.gem5.org/documentation/learning_gem5/part1/cache_config/ -Ayaz

[gem5-users] Re: How to create serial terminal when creating disk images?

2020-11-05 Thread Ciro Santilli via gem5-users
This is one of the things I've never had the patience to figure out, some ideas: * investigate in QEMU first as it is much faster * look into busybox's init code From: Chao Fu via gem5-users Sent: Wednesday, November 4, 2020 3:12 PM To:

[gem5-users] Re: [EXT] Re: Using m5Ops with X86KvmCPU

2020-11-05 Thread Patrick Sheridan (psheridan) via gem5-users
Micron Confidential Awesome, got it working. Thanks. From: Gabe Black via gem5-users Sent: Thursday, November 05, 2020 12:20 AM To: gem5 users mailing list Cc: Gabe Black Subject: [EXT] [gem5-users] Re: Using m5Ops with X86KvmCPU Yes, but you need to use the magic address call mechanism,

[gem5-users] Re: Ethernet support for ARM FS simulation

2020-11-05 Thread Gabe Black via gem5-users
That sounds like the problem I fixed with this CL: https://gem5-review.googlesource.com/c/public/gem5/+/35516 Gabe On Thu, Nov 5, 2020 at 4:42 AM Liyichao via gem5-users wrote: > Hi Gabe: > > I have looked at the email below, I also has the same question. > As you mentioned, I just

[gem5-users] Re: Ethernet support for ARM FS simulation

2020-11-05 Thread Liyichao via gem5-users
Hi Gabe: I have looked at the email below, I also has the same question. As you mentioned, I just modified the FSConfig.py in function makeArmSystem with “self.ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0, InterruptLine=1, InterruptPin=1)