[gem5-users] Running FS in example/gem5_library/x86-spec-cpu2017-benchmarks.py

2022-03-09 Thread Abdelrahman S. Hussein via gem5-users
Hello, I am trying to run gem5 in FS mode using the following command (I am using gem5 v21.2): gem5/build/X86/gem5.opt gem5/configs/example/gem5_library/x86-spec-cpu2017-benchmarks.py --image spec-2017/disk-image/spec-2017/spec-2017-image/spec-2017 --benchmark 503.bwaves_r --size test However,

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread Jason Lowe-Power via gem5-users
Great question! Since KVM is executing using the host's hardware, you can't use the magic instructions! However, we have another interface (called `m5_addr` or `m5-addr` in the code, IIRC) that will work with KVM. If you compile using -DM5_ADDR=, it should work in KVM. For x86, we usually use

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread George Michelogiannakis via gem5-users
Hello Jason and everyone, I'll add the fix to my todo list :) But before then, I'm confused by something. Thanks for the link to hooks and indeed I "m5_work_begin(0,0);. I recompiled the benchmarks I had with work begin and end. It's just adding "m5_work_begin(0,0)" and "m5_work_end(0,0)" at

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread David Fong via gem5-users
Thanks Kyle. I confirmed that your instructions work and my sim can run and generate stats.txt. David From: Matt Sinclair Sent: Wednesday, March 9, 2022 3:13 PM To: Kyle Roarty ; David Fong ; gem5 users mailing list ; Poremba, Matthew Subject: Re: gem5 : X86 + APU (gfx801) with CUs128 error

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread Matt Sinclair via gem5-users
Thanks Kyle! Should we add a patch to address this then? Matt From: Kyle Roarty Sent: Wednesday, March 9, 2022 5:06 PM To: David Fong ; Matt Sinclair ; gem5 users mailing list ; Poremba, Matthew Subject: Re: gem5 : X86 + APU (gfx801) with CUs128 error with

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread Kyle Roarty via gem5-users
For whatever reason, MIOpen looks for a different filename when the number of CUs is above 100. However, we didn't see this because we never tested with such a large number of CUs. If you look in the cachfiles directory in the DNNMark folder, you'll see a couple of relevant files:

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread David Fong via gem5-users
Nothing gets echoed out to the screen when I run this cmd-line with the -num-cus=128 docker run --rm -v ${PWD}:${PWD} -v${PWD}/cachefiles:/root/.cache/miopen/2.9.0 -w ${PWD} gcr.io/gem5-test/gcn-gpu:v21-2 python3 generate_cachefiles.py cachefiles.csv --gfx-version=gfx801 --num-cus=128 Is

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread Matt Sinclair via gem5-users
@Kyle Roarty: I believe the only way to check that the number was substituted in is to watch the terminal when it's run, is that right? I am not aware of 128 CUs not being supported, but I also haven't tried that many before either. Matt From: David Fong Sent:

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread David Fong via gem5-users
Hi Matt, I used these command-line for generating the cachefiles. gem5/gem5-resources/src/gpu/DNNMark/ docker run --rm -v ${PWD}:${PWD} -w ${PWD} -u $UID:$GID gcr.io/gem5-test/gcn-gpu:v21-2 ./setup.sh HIP docker run --rm -v ${PWD}:${PWD} -w ${PWD}/build -u $UID:$GID

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread Matt Sinclair via gem5-users
That error in #2 means MIOpen can't find the kernel again. Did you change the number of CUs to 128 (or whatever number of CUs you are using) when you generated the cachefiles? Matt From: David Fong via gem5-users Sent: Wednesday, March 9, 2022 12:50 PM To: Poremba, Matthew ; gem5 users

[gem5-users] Re: gem5 : X86 + APU (gfx801) with CUs128 error with DNNMark test_fwd_softmax

2022-03-09 Thread David Fong via gem5-users
Hi Matt, Thanks for your quick response. The hack is not working. 1. I had to start from scratch or I get same error 2. After running the same steps + the hack before gem5 compile, I'm getting these error messages build/GCN3_X86/sim/syscall_emul.cc:74: warn: ignoring syscall mprotect(...)

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread George Michelogiannakis via gem5-users
Indeed there is a way to signal workbegin and workend from the program itself with m5 ops. But I'm trying to avoid recompiling a whole bunch of code to make it happen, though I can do that too. If there is a way to simulate workbegin and workend from the command line great, otherwise no worries

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread Jason Lowe-Power via gem5-users
Hi George, For workbegin/workend, they can be called from within applications if you link to the libm5 library. For instance, in the parsec resource here: https://resources.gem5.org/resources/parsec we use the m5_workbegin() function in the ROI hooks. See

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread Gabe Black via gem5-users
I don't think we ever transitioned from an assembly based mechanism to a C based one, since we have always (as far as I know) used both, assembly to actually invoke the call into gem5, and C to provide a friendly interface/wrapper around the assembly. That said, yes, it looks like work begin and

[gem5-users] Re: M5 Fs utility workbegin

2022-03-09 Thread Giacomo Travaglini via gem5-users
Hi George, Thanks for reporting this, I noticed the same issue. When we transitioned from the old m5 subsystem (assembly based) to the new C based one we forgot to provide an implementation for workbegin and workend I suppose. Putting Gabe on CC Kind Regards Giacomo From: George