Hi Yuan,
thank you very much for your detailed response. My understanding of the fault handling in gem5 is getting better and better. Using debug flags, I can trace the control flow during the execution of my code.
I am currently inspecting tlb.cc in further detail, but I am still searching f
On 10/4/2023 10:03 AM, reverent.green--- via gem5-users wrote:
Hi Yuan,
thank you very much for your detailed response. My understanding of the
fault handling in gem5 is getting better and better. Using debug flags, I
can trace the control flow during the execution of my code.
I am currentl
Hi Thilo,
My guess is that you need to add a node to the device tree. I would look at
the device tree generated for Arm and see if you can pattern match what you
need to add for RISC-V.
Cheers,
Jason
On Mon, Oct 2, 2023 at 1:12 AM Thilo Voertler via gem5-users <
gem5-users@gem5.org> wrote:
> Hi