> On 7 Aug 2023, at 2:46 pm, Timothy Sipples wrote:
>
> David Crayford wrote:
>> Maybe wait until there is actually some tangible AI libraries such as
>> TensorFlow, PyTorch and SnapML before blowing trumpets.
>
> Huh? You *can* run these libraries on z/OS, on zIIPs even. They run on the
>
David Crayford wrote:
>Maybe wait until there is actually some tangible AI libraries such as
>TensorFlow, PyTorch and SnapML before blowing trumpets.
Huh? You *can* run these libraries on z/OS, on zIIPs even. They run on the z/OS
Container Extensions (zCX) or on OpenShift for z/OS, as you
> From Parwez: My mistake, the 370/195 had 2 MB, this customer's 360/75 had
1 MB
In those ancient days an MB of memory was $$expensive$$ and fairly rare. In
the very early 70s I worked in an installation that had two 360/75s, each
with 3 MB (1 MB normal memory and 2 MB LCS). The second 75 was
Also ADP.
From: IBM Mainframe Discussion List on behalf of Bob
Bridges
Sent: Friday, August 4, 2023 8:53 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why
Right, I think it was "EDP" (electronic data processing) when I started. Or
maybe even that wasn't the first one I was aware of; it's been a long time now.
---
Bob Bridges, robhbrid...@gmail.com, cell 336 382-7313
/* Neither irony nor sarcasm is argument. -Samuel Butler */
-Original
UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why it survives
> The one I worked on at a sister (can I say this or should it be 'person'
> organisation of CERN) had a grand total of 1 MB main memory!
That sounds more
UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why it survives
> The one I worked on at a sister (can I say this or should it be 'person'
> organisation of CERN) had a grand total of 1 MB main memory!
That sounds more appropri
9-dmarc-requ...@listserv.ua.edu]
Sent: Friday, August 4, 2023 5:23 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why it survives
In response to your comments and some made by others, my 2 cents worth.
This discus
, IT didn't exist. It was
'computers' or 'computing'.
From: IBM Mainframe Discussion List on behalf of
David Crayford
Sent: 04 August 2023 00:42
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe
> On 4 Aug 2023, at 1:01 pm, Timothy Sipples wrote:
>
> David Crayford wrote:
>> Other platforms have integrated AI engines, AMD ZenDNN,
>> Intel oneDNN etc. Both ship with open source libraries and
>> toolkits sadly lacking for z/OS.
>
> Did you miss zDNN?
>
Nope, I’m aware. Not quite as
David Crayford wrote:
>Other platforms have integrated AI engines, AMD ZenDNN,
>Intel oneDNN etc. Both ship with open source libraries and
>toolkits sadly lacking for z/OS.
Did you miss zDNN?
https://github.com/IBM/zDNN
ned to have up to
> 840 passengers. Are there any airlines with A380s which carry such numbers!
>
> Horses for courses!!
>
>
> From: IBM Mainframe Discussion List on behalf of
> Tom Brennan
> Sent: 02 August 2023 17:34
> To: IBM-MAIN
Mainframe Discussion List on behalf of Jon
Perryman
Sent: 03 August 2023 03:56
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why it survives
> On Wednesday, August 2, 2023 at 09:34:34 AM PDT, Tom Bren
On 8/2/2023 7:56 PM, Jon Perryman wrote:
You say 192 slots or 384 ports.
Not me, it's IBM doc along with Parwez Hamid, top IBM tech person,
redbook author, conference speaker, etc. etc. (retired now from IBM I
believe).
I understand slots being PCIe but was is ports? Is this fiber optic
> On Wednesday, August 2, 2023 at 09:34:34 AM PDT, Tom Brennan wrote:
> So I pointed out there's only 12 I/O drawers max on a z16
Sorry Tom and all. I don't recall anyone saying max of 12 I/O drawers otherwise
it would have been obvious my number was wrong. Yahoo mail does strange things
with
>
>
> From: IBM Mainframe Discussion List on behalf
> of Tom Brennan
> Sent: 02 August 2023 17:34
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica:
> The IBM mainframe: How it runs an
Mainframe Discussion List on behalf of Tom
Brennan
Sent: 02 August 2023 17:34
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Channelized I/O WAS: Mainframe Makers WAS: Ars Technica: The
IBM mainframe: How it runs and why it survives
> I’ve missed this thread.
He first said 1536 ports (not sl
Crayford
wrote:
What’s the difference between between channelized I/O and a rack of
x86 servers connected to a SAN using fibre channel driven by high speed HBAs?
PCIe was created specifically for PCs and IBM z16 chose to use that as their
only channel technology. Channelized I/O for PC ha
At the risk of being "WRONG" ;¬)) several times, I offer the following.
The Processor Units (GPs, CPU, etc.) are PCIe Gen 4, but the 16 slots in the
I/O drawer hold Gen 3 cards, up to 16 of them at 16GBps. Each card can support
a max of 32 lanes which can be multiplexed. The max theoretical
There must be a good
technical reason for this.
[1] https://www.redbooks.ibm.com/redbooks/pdfs/sg248951.pdf
>
> On 8/1/2023 8:01 PM, Jon Perryman wrote:
>> > On Tuesday, August 1, 2023 at 05:20:33 PM PDT, David Crayford
>> wrote:
>>> What’s the difference
fference between between channelized I/O and a rack of
x86 servers connected to a SAN using fibre channel driven by high speed HBAs?
PCIe was created specifically for PCs and IBM z16 chose to use that as their
only channel technology. Channelized I/O for PC has been available for
> On Tuesday, August 1, 2023 at 05:20:33 PM PDT, David Crayford
> wrote:
> What’s the difference between between channelized I/O and a rack of
> x86 servers connected to a SAN using fibre channel driven by high speed HBAs?
PCIe was created specifically for PCs and IBM z16
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