Re: [Intel-gfx] [PATCH] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

On Thu, Jan 12, 2012 at 09:33:34AM -0800, Keith Packard wrote: > On Tue, 10 Jan 2012 13:45:19 +0800, Wu Fengguang > wrote: > > > @@ -5943,6 +5947,7 @@ static void ironlake_write_eld(struct dr > > if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) { > > DRM_DEBUG_DRIVER("ELD

Re: [Intel-gfx] [Glamor] [PATCH v3] uxa/glamor: Create glamor pixmap by default.

On Thu, 12 Jan 2012 15:30:15 +0800, zhigang.g...@linux.intel.com wrote: > From: Zhigang Gong > > Chris, > > According to your previous comments. The X server will not die when > fail to get a dri buffer for a glamor pixmap, instead it will return > a BadAlloc. Your previous advice is to pass a B

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Fix TV Out refresh rate.

I think we should go ahead and integrate the first and second patches and skip the 1080 (third) for now. We are internally discussing when and if that document will be released. On Fri, Jan 6, 2012 at 8:02 PM, Keith Packard wrote: > On Wed, 14 Dec 2011 21:10:06 -0200, Rodrigo Vivi > wrote: >>

Re: [Intel-gfx] [PATCH 0/2] drm/i915: interlaced mode support (G35 VGA/SDVO)

On Sat, Jan 14, 2012 at 12:52, Peter Ross wrote: > This patch set enables enables interlaced mode output on the VGA > and SDVO connectors of the G35 chipset. > > History here: https://bugs.freedesktop.org/show_bug.cgi?id=11220 > > I have tested the changes on an ASUS P5E-VM-HDMI mainboard with VG

[Intel-gfx] I've got the RC6 bug

Hi, I've heard that you need users having the RC6 bug. I have the following setup: CPU: Intel Core i5-2500K Mainboard: ASRock Z68 Pro3-M Memory: Corsair Vengeance CMZ8GX3M2A1866C9 Although the CPU doesn't support VT-d, I disabled all virtualization support in the UEFI setup. I use Arch Linux an

Re: [Intel-gfx] I've got the RC6 bug

On Mon, Jan 16, 2012 at 05:18:17PM +0100, CC wrote: > Hi, > > I've heard that you need users having the RC6 bug. > > I have the following setup: > CPU: Intel Core i5-2500K > Mainboard: ASRock Z68 Pro3-M > Memory: Corsair Vengeance CMZ8GX3M2A1866C9 > > Although the CPU doesn't support VT-d, I dis

Re: [Intel-gfx] [PATCH] Android port of intel-gpu-tools

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/10/2012 08:50 AM, Kavuri, Sateesh wrote: > > >> -Original Message- >> From: Adam Jackson [mailto:a...@redhat.com] >> Sent: Tuesday, January 10, 2012 8:34 PM >> To: Kavuri, Sateesh >> Cc: intel-gfx@lists.freedesktop.org >> Subject: Re: [

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

On Sun, 15 Jan 2012 10:48:28 + Andy Burns wrote: > OK, enough scene-setting, here are the xorg questions ... > > Is there any xorg.conf setting to switch the HDMI output to YCbCr mode > instead of RGB mode? No, we haven't exposed that yet. On some chipsets it may mean configuring colorspace

Re: [Intel-gfx] [PATCH] Android port of intel-gpu-tools

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/10/2012 04:47 AM, Daniel Vetter wrote: > On Tue, Jan 10, 2012 at 10:15:01AM +0530, Sateesh Kavuri wrote: >> Added support for Android. Changes include fixes for compilation issues >> related to Android using an older version of GCC compiler (ver

Re: [Intel-gfx] [PATCH] Android port of intel-gpu-tools

On Mon, Jan 16, 2012 at 10:25:32AM -0800, Chad Versace wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 01/10/2012 04:47 AM, Daniel Vetter wrote: > > On Tue, Jan 10, 2012 at 10:15:01AM +0530, Sateesh Kavuri wrote: > >> Added support for Android. Changes include fixes for compilation

Re: [Intel-gfx] [PATCH] Android port of intel-gpu-tools

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/16/2012 10:36 AM, Daniel Vetter wrote: > On Mon, Jan 16, 2012 at 10:25:32AM -0800, Chad Versace wrote: >> -BEGIN PGP SIGNED MESSAGE- >> Hash: SHA1 >> >> On 01/10/2012 04:47 AM, Daniel Vetter wrote: >>> On Tue, Jan 10, 2012 at 10:15:01AM +

[Intel-gfx] New drm-intel-next tree

Hi all, Because Keith is routinely really busy with all kinds of things, notably gathering fixes for drm-intel-fixes, the patch merge process for the next release cycle sometimes falls behind. To support him and improve things I've been volunteered to take over handling the -next tree. The main

Re: [Intel-gfx] [PATCH] Android port of intel-gpu-tools

On Mon, Jan 16, 2012 at 16:36, Daniel Vetter wrote: > Otherwise we'll just stick Android.mk into the root dir and I'll forget > about this (and probably break it every time I change something). > I vote for this approach. It would only be used by android build, so when it breaks, we'll be able t

Re: [Intel-gfx] [PATCH 1/2] drm/i915: specify vertical timings in frame units for interlaced modes (gen4+)

On Sun, 15 Jan 2012 01:52:11 +1100 Peter Ross wrote: > The G35/G45/SandyBridge chipsets expect vertical timings in frame units, > whereas the DRM subsystem uses field units internally for interlaced modes. > > Signed-off-by: Peter Ross > --- > drivers/gpu/drm/i915/intel_display.c |8 ++

[Intel-gfx] [PATCH] drm/i915: properly mask and or watermark values for sprites

Now that we're using the sprite WM fields, we need to take care not to clobber them in the main update_wm functions. While we're at it, make sure we mask out the old sprite wm value before or'ing in the new one when the sprite wm is updated. Signed-off-by: Jesse Barnes --- drivers/gpu/drm/i915/

Re: [Intel-gfx] New drm-intel-next tree

On Mon, Jan 16, 2012 at 17:41, Daniel Vetter wrote: > > Hi all, > > Because Keith is routinely really busy with all kinds of things, notably > gathering fixes for drm-intel-fixes, the patch merge process for the next > release cycle sometimes falls behind. To support him and improve things I've >

Re: [Intel-gfx] [RFC] drm: implement DRM_IOCTL_MODE_SETROTATION

Hi 2012/1/5 Jakob Bornecrantz : > Couldn't this be done by just adding a property instead of a ioctl? > So I've discussed this with Jesse and it seems the best way to turn this into a property is to add support for CRTC properties, then add a "rotation" property for the i915 driver. This will act

Re: [Intel-gfx] [PATCH 1/2] drm/i915: specify vertical timings in frame units for interlaced modes (gen4+)

On Mon, Jan 16, 2012 at 17:50, Jesse Barnes wrote: > Do we get the ILK+ side right here? > >From the specs, looks like ILK and SNB+ share same logic for this part. -- Eugeni Dodonov ___ Intel-gfx mailing list Intel-gfx@li

Re: [Intel-gfx] [PATCH 1/2] drm/i915: specify vertical timings in frame units for interlaced modes (gen4+)

On Sun, Jan 15, 2012 at 01:52:11AM +1100, Peter Ross wrote: > The G35/G45/SandyBridge chipsets expect vertical timings in frame units, > whereas the DRM subsystem uses field units internally for interlaced modes. > > Signed-off-by: Peter Ross On a quick look at the patch it have a confusion abou

Re: [Intel-gfx] [PATCH] drm/i915: Silence _DSM errors

On Mon, Oct 10, 2011 at 12:57:44PM -0700, Jesse Barnes wrote: > On Mon, 10 Oct 2011 15:08:51 -0400 > Adam Jackson wrote: > > > On Tue, 2011-09-13 at 14:11 -0400, Adam Jackson wrote: > > > <@ajax> mjg59: how concerned should i be about [drm:intel_dsm_pci_probe] > > > *ERROR* failed to get

Re: [Intel-gfx] drm/i915: remove ACPI related DRM_ERRORs

On Thu, Jan 12, 2012 at 12:22:37PM -0500, Adam Jackson wrote: > On Thu, 2012-01-12 at 09:03 -0800, Jesse Barnes wrote: > > They're not really errors (well actually I don't know; I don't > > understand _DSM and _MUX well enough to say, but I do know they spam > > people's logs and seem to be harmles

Re: [Intel-gfx] [PATCH] drm/i915: Only look for matching clocks for LVDS downclock

On Tue, 10 Jan 2012 15:09:36 -0800 Sean Paul wrote: > This patch enforces that the downclock clock source is the same as the > preferred > clock source for LVDS. This fixes a bug where the driver chooses a downclock > clock source with a different P than the preferred mode clock source. This > h

Re: [Intel-gfx] [PATCH] drm/i915: Only look for matching clocks for LVDS downclock

On Mon, Jan 16, 2012 at 12:20:03PM -0800, Jesse Barnes wrote: > On Tue, 10 Jan 2012 15:09:36 -0800 > Sean Paul wrote: > > > This patch enforces that the downclock clock source is the same as the > > preferred > > clock source for LVDS. This fixes a bug where the driver chooses a downclock > > cl

Re: [Intel-gfx] [PATCH] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

On Mon, Jan 16, 2012 at 04:02:53PM +0800, Wu Fengguang wrote: > On Thu, Jan 12, 2012 at 09:33:34AM -0800, Keith Packard wrote: > > On Tue, 10 Jan 2012 13:45:19 +0800, Wu Fengguang > > wrote: > > > > > @@ -5943,6 +5947,7 @@ static void ironlake_write_eld(struct dr > > > if (intel_pipe_has_type(

Re: [Intel-gfx] [PATCH 1/2] drm/i915: simplify pipe checking

On Sun, Jan 08, 2012 at 03:01:12AM +0100, Cyril Brulebois wrote: > Eugeni Dodonov (07/01/2012): > > This is also handled by i915_reg.h, so just reuse this trick to reduce > > universe enthropy. > > entropy. > > Besides that: > > Reviewed-by: Cyril Brulebois Both patches queued for -next, than

Re: [Intel-gfx] [PATCH 2/2] drm/i915: there is no pipe CxSR on ironlake

On Thu, Jan 05, 2012 at 09:34:29AM -0200, Eugeni Dodonov wrote: > After checking the specs and discussing with Jesse, turns out CxSR is not > available on Ironlake and gen5, and its advertisement on the device > description is misleading. > > Acked-by: Jesse Barnes > Signed-off-by: Eugeni Dodonov

Re: [Intel-gfx] [PATCH 1/2] drm: give up on edid retries when i2c bus is not responding

Hi Dave, Is it ok if I merge this through my -next tree? Otherwise please consider merging this for 3.4. Yours, Daniel On Thu, Jan 05, 2012 at 09:34:28AM -0200, Eugeni Dodonov wrote: > This allows to avoid talking to a non-responding bus repeatedly until we > finally timeout after 15 attempts. W

Re: [Intel-gfx] [RFC] drm: implement DRM_IOCTL_MODE_SETROTATION

On Mon, Jan 16, 2012 at 7:59 PM, Paulo Zanoni wrote: > Hi > > 2012/1/5 Jakob Bornecrantz : >> Couldn't this be done by just adding a property instead of a ioctl? >> > > So I've discussed this with Jesse and it seems the best way to turn > this into a property is to add support for CRTC properties,

Re: [Intel-gfx] [PATCH] agp/intel: Add pci id for hostbridge from has/qemu

On Wed, Jan 04, 2012 at 02:04:33PM -0800, Ben Widawsky wrote: > This is needed to run the simulator. > > Cc: Jesse Barnes > Signed-off-by: Ben Widawsky Queued for -next (with a small comment added), thanks for the patch. -Daniel > --- > drivers/char/agp/intel-agp.c |1 + > 1 files changed,

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

Jesse Barnes wrote: > Andy Burns wrote: > >> Is there any xorg.conf setting to switch the HDMI output to YCbCr mode >> instead of RGB mode? > > No, we haven't exposed that yet.  On some chipsets it may mean > configuring colorspace conversion in the pipe code.  Paulo has been > looking at some o

Re: [Intel-gfx] [PATCH] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

On Mon, 16 Jan 2012 21:26:18 +0100, Daniel Vetter wrote: > Keith, does this address your concern and this patch is r-b: Keith or do > we want an > > } else { > I915_WRITE(aud_config, 0); > } > > for paranoia? I think we want this added, just to be sure we set the configuration correctly

Re: [Intel-gfx] Problem Intel i915 driver, i3 2010T, HDMI output modes problems

On Tue, Jan 03, 2012 at 08:52:39PM +, paulo louro wrote: > > Dear intel-gfx developers. > After spending a huge amount of time searching for a solution for me problem > and haven't been able to find one, i decided to send a email to this mailing > list hoping someone can help me or point me

Re: [Intel-gfx] [RFC] drm: implement DRM_IOCTL_MODE_SETROTATION

2012/1/16 Dave Airlie : > > Okay I must have missed the bit where you explain why a connector > property isn't used? The registers that contain the rotation information are the pipe registers and, as far as I understood, each pipe is associated with only one crtc. We can have more than one connect

Re: [Intel-gfx] [PATCH] drm/i915: kill i915_mem.c

On Thu, Dec 22, 2011 at 10:23:14PM +0100, Daniel Vetter wrote: > Some decent history digging indicates that this was to be used for the > GLX_MESA_allocate_memory extension but never actually implemented for > any released i915 userspace code. > > So just rip it out. > > Cc: Dave Airlie > Cc: Ke

Re: [Intel-gfx] [PATCH 3/3] drm/i915: split out DPLL update code from i9xx_crtc_mode_set

On Thu, Dec 15, 2011 at 12:30:38PM -0800, Jesse Barnes wrote: > More i9xx mode set cleanups, further simplifying the mode set path and > making it easier to extend. > > Signed-off-by: Jesse Barnes This is imo too much refactoring for just one patch. I'd like the extract intel_update_lvds in a se

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

Jesse Barnes wrote: > Andy Burns wrote: > >> Similarly is there any setting to indicate an xvYCC gamut, which might >> persuade the amp not to clip the colours? > > There is a way to configure the gamut to be compressed (default) or > expanded (up to 255).  But that's not exposed either. I see

Re: [Intel-gfx] [PATCH] [RFC] drm/i915: read-read semaphore optimization

On Tue, Dec 13, 2011 at 10:36:15AM -0800, Ben Widawsky wrote: > On 12/13/2011 09:22 AM, Eric Anholt wrote: > >On Mon, 12 Dec 2011 19:52:08 -0800, Ben Widawsky wrote: > >>Since we don't differentiate on the different GPU read domains, it > >>should be safe to allow back to back reads to occur witho

Re: [Intel-gfx] [PATCH] drm/i915: add a LLC feature flag in device description

On Tue, Dec 13, 2011 at 07:05:41PM -0200, Eugeni Dodonov wrote: > From: Eugeni Dodonov > > LLC is not SNB-specific, so we should check for it in a more generic way. > > v2: export LLC support status via debugfs and DRM GETPARAM. > > v3: rebase on newer kernel version which says that IVB support

Re: [Intel-gfx] [PATCH] drm/i915: Only look for matching clocks for LVDS downclock

On Mon, 16 Jan 2012 21:21:45 +0100, Daniel Vetter wrote: > On Mon, Jan 16, 2012 at 12:20:03PM -0800, Jesse Barnes wrote: > > Yeah looks like a good cleanup that also makes downclocking more likely. > > > > Reviewed-by: Jesse Barnes > > Queued for -next, thanks for the patch. Jesse -- do you t

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

On 16 January 2012 18:03, Jesse Barnes wrote: > There is some 30 bit support in place, but not 36bpp, which is what > HDMI sinks generally want. I did a little experiment, adding a Depth 30 setting to the Display SubSection for the Screen (and removing all lower depth entries) also a DefaultDept

Re: [Intel-gfx] [PATCH] drm/i915/sdvo: Enforce more timing requirements

On Tue, Dec 13, 2011 at 02:09:28PM -0200, Paulo Zanoni wrote: > Hi > > 2011/12/13 Adam Jackson : > > +       if (mode->vtotal - mode->vdisplay < 3) > > +               return MODE_VBLANK_NARROW; > > + > > +       if (mode->vsync_end - mode->vsync_start < 1) > > +               return MODE_VSYNC_NA

Re: [Intel-gfx] Problem Intel i915 driver, i3 2010T, HDMI output modes problems

[apologies for munged threading, I subscribed after the original message was sent] paulo louro wrote: > When starting ubuntu without the AV receiver or the TV being on, the xorg > start with a resolution of 720x576. Have you tried forcing an initial mode in the Monitor section of your xorg.conf

Re: [Intel-gfx] [PATCH] drm/i915: Only look for matching clocks for LVDS downclock

On Mon, 16 Jan 2012 13:56:34 -0800 Keith Packard wrote: > On Mon, 16 Jan 2012 21:21:45 +0100, Daniel Vetter wrote: > > On Mon, Jan 16, 2012 at 12:20:03PM -0800, Jesse Barnes wrote: > > > > Yeah looks like a good cleanup that also makes downclocking more likely. > > > > > > Reviewed-by: Jesse B

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

On Mon, 16 Jan 2012 21:50:22 + Andy Burns wrote: > Jesse Barnes wrote: > > > Andy Burns wrote: > > > >> Similarly is there any setting to indicate an xvYCC gamut, which might > >> persuade the amp not to clip the colours? > > > > There is a way to configure the gamut to be compressed (defa

Re: [Intel-gfx] HDMI colour space and depth questions (YCbCr, xvYCC, Deep Colour)

On Mon, 16 Jan 2012 21:57:29 + Andy Burns wrote: > On 16 January 2012 18:03, Jesse Barnes wrote: > > > There is some 30 bit support in place, but not 36bpp, which is what > > HDMI sinks generally want. > > I did a little experiment, adding a Depth 30 setting to the Display > SubSection for

Re: [Intel-gfx] [PATCH] drm/i915: Probe SDVO LVDS information

On Mon, Nov 28, 2011 at 01:32:11PM -0500, Adam Jackson wrote: > No effect besides printing the result in dmesg if debugging is enabled. > > Signed-off-by: Adam Jackson This looks strange without dmesg output nor a comment added. Quick survey on irc with Jesse and Chris showed that we want intere

Re: [Intel-gfx] [PATCH] [RFC] drm/i915: read-read semaphore optimization

On 01/16/2012 01:50 PM, Daniel Vetter wrote: > On Tue, Dec 13, 2011 at 10:36:15AM -0800, Ben Widawsky wrote: >> On 12/13/2011 09:22 AM, Eric Anholt wrote: >>> On Mon, 12 Dec 2011 19:52:08 -0800, Ben Widawsky wrote: Since we don't differentiate on the different GPU read domains, it should

Re: [Intel-gfx] [PATCH 4/8] drm/i915: fix typo in function name

On Mon, Nov 28, 2011 at 04:15:17PM -0200, Eugeni Dodonov wrote: > Fix function name in comments, a left-over from when i965_reset was > renamed to i915_reset. > > Signed-off-by: Eugeni Dodonov Queued for -next, thanks for the patch. The drm core i2c is pending an ack from Dave, everything else s

Re: [Intel-gfx] [PATCH] drm/i915: Check that plane/pipe is disabled before removing the fb

On Thu, Nov 24, 2011 at 06:22:18PM +, Chris Wilson wrote: > Staring at an error state such as: > > PGTBL_ER: 0x0400 > Display B: Invalid tiling > fence[0] = 05001001 > valid, x-tiled, pitch: 512, start: 0x0500, size: 1048576 > Pinned [2]: > 131072 0001 0001 000

[Intel-gfx] [PATCH] drm/i915: Check that plane/pipe is disabled before removing the fb

Staring at an error state such as: PGTBL_ER: 0x0400 Display B: Invalid tiling fence[0] = 05001001 valid, x-tiled, pitch: 512, start: 0x0500, size: 1048576 Pinned [2]: 131072 0001 0001 P uncached 0002 4096000 0041 P uncached (name: 1) Plane

Re: [Intel-gfx] [PATCH] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

On Mon, Jan 16, 2012 at 12:44:43PM -0800, Keith Packard wrote: > On Mon, 16 Jan 2012 21:26:18 +0100, Daniel Vetter wrote: > > > Keith, does this address your concern and this patch is r-b: Keith or do > > we want an > > > > } else { > > I915_WRITE(aud_config, 0); > > } > > > > for paranoia?

Re: [Intel-gfx] [PATCH] drm/i915: set AUD_CONFIG N_value_index for DisplayPort

On Tue, 17 Jan 2012 07:08:09 +0800, Wu Fengguang wrote: > On Mon, Jan 16, 2012 at 12:44:43PM -0800, Keith Packard wrote: > > On Mon, 16 Jan 2012 21:26:18 +0100, Daniel Vetter wrote: > > > > > Keith, does this address your concern and this patch is r-b: Keith or do > > > we want an > > > > > > }

[Intel-gfx] [PATCH 1/2] intel_audio_dump: fix missing Audio DIP tabs

This makes the SNB/IVY Audio DIP values aligned with others. Signed-off-by: Wu Fengguang --- tools/intel_audio_dump.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) --- intel-gpu-tools.orig/tools/intel_audio_dump.c 2012-01-16 15:33:11.0 +0800 +++ intel-gpu-tools/t

[Intel-gfx] [PATCH 2/2] intel_audio_dump: show more AUD_CONFIG bits

Signed-off-by: Wu Fengguang --- tools/intel_audio_dump.c | 35 +++ 1 file changed, 35 insertions(+) --- intel-gpu-tools.orig/tools/intel_audio_dump.c 2012-01-16 15:33:18.0 +0800 +++ intel-gpu-tools/tools/intel_audio_dump.c2012-01-16 16:13:08.

Re: [Intel-gfx] [PATCH] [RFC] drm/i915: read-read semaphore optimization

On Mon, 16 Jan 2012 14:20:55 -0800, Ben Widawsky wrote: > On 01/16/2012 01:50 PM, Daniel Vetter wrote: > > On Tue, Dec 13, 2011 at 10:36:15AM -0800, Ben Widawsky wrote: > >> On 12/13/2011 09:22 AM, Eric Anholt wrote: > >>> On Mon, 12 Dec 2011 19:52:08 -0800, Ben Widawsky > >>> wrote: > Sinc

[Intel-gfx] Installing intel graphic driver on slackware12.0

Hi, I am trying to install intel graphic driver on Slackware 12.0. I use Intel 2010 Q1 graphic package which is need kernel 2.6.33 which differ from Slackware 12.0 So I update my kernel and install related package for the driver. However, when I want to initiate X window, the error occurred.