On Wed, Jun 11, 2014 at 03:23:33PM +, Mateo Lozano, Oscar wrote:
> > > > - Ack the interrupt inmediately, before trying to handle it (fix for
> > > > missing interrupts by Bob Beckett ).
> > >
> > > This interrupt handling change is interesting since it might explain
> > > our irq handling woes
On 6/11/2014 10:26 PM, Ville Syrjälä wrote:
On Fri, Jun 06, 2014 at 08:03:20AM -0700, Jesse Barnes wrote:
On Fri, 6 Jun 2014 11:29:24 +0300
Ville Syrjälä wrote:
On Thu, Jun 05, 2014 at 01:49:34PM -0700, Jesse Barnes wrote:
This may take awhile (~10ms), and we don't need to make noise about
Hi,
I am working on a feature to implement support for gem objects to have
variable size and realized a problem with the current implementation.
Please advice me how to handle this situation efficiently.
In this implementation the backing store of the object is replaced with
scratch pages acc
On 11.06.2014 11:10, Jesse Barnes wrote:
On Tue, 6 May 2014 22:25:04 +0300
Abdiel Janulgue wrote:
From: Abdiel Janulgue
This is a re-spin of my resource streamer patchset from October
adapted to enable the feature on Broadwell instead.
The resource streamer is a hw-feature that helps in r
On Wed, 11 Jun 2014 15:21:16 -0700
Jesse Barnes wrote:
> On Tue, 10 Jun 2014 17:26:45 +0200
> Daniel Vetter wrote:
>
> > On Tue, Jun 10, 2014 at 05:41:49PM +0300, Imre Deak wrote:
> > > On Tue, 2014-06-10 at 15:57 +0200, Daniel Vetter wrote:
> > > > On Tue, Jun 10, 2014 at 04:42:50PM +0300, Imr
On Tue, 10 Jun 2014 17:26:45 +0200
Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 05:41:49PM +0300, Imre Deak wrote:
> > On Tue, 2014-06-10 at 15:57 +0200, Daniel Vetter wrote:
> > > On Tue, Jun 10, 2014 at 04:42:50PM +0300, Imre Deak wrote:
> > > > On Wed, 2014-06-04 at 13:45 -0700, Jesse Barnes
On Tue, Jun 10, 2014 at 04:14:41AM -0700, Chris Wilson wrote:
> On an Ivybridge i7-3720qm with 1600MHz DDR3, with 32 fences,
> Upload rate for 2 linear surfaces: 8134MiB/s -> 8154MiB/s
> Upload rate for 2 tiled surfaces: 8625MiB/s -> 8632MiB/s
> Upload rate for 4 linear surfaces: 8127MiB/s -> 8
On Tue, Jun 10, 2014 at 04:14:40AM -0700, Chris Wilson wrote:
> Inserting additional PTEs has no side-effect for us as the pfn are fixed
> for the entire time the object is resident in the global GTT. The
> downside is that we pay the entire cost of faulting the object upon the
> first hit, for whi
On Tue, 6 May 2014 22:25:04 +0300
Abdiel Janulgue wrote:
> From: Abdiel Janulgue
>
> This is a re-spin of my resource streamer patchset from October
> adapted to enable the feature on Broadwell instead.
>
> The resource streamer is a hw-feature that helps in reducing commands
> being submitte
On Tue, Jun 10, 2014 at 10:41:07AM -0700, Rodrigo Vivi wrote:
> These PCI IDs are reserved on BSpec and can be used at any time in the future.
> So let's add this now in order to avoid issues that we already faced on
> previous
> platforms, like finding out about new ids when user reported accelar
On Fri, Jun 06, 2014 at 08:03:20AM -0700, Jesse Barnes wrote:
> On Fri, 6 Jun 2014 11:29:24 +0300
> Ville Syrjälä wrote:
>
> > On Thu, Jun 05, 2014 at 01:49:34PM -0700, Jesse Barnes wrote:
> > > This may take awhile (~10ms), and we don't need to make noise about it.
> > >
> > > References: https
From: Ville Syrjälä
Add generic tools to poke at IOSF sideband. The user needs to
manually specify SB port as well as the register.
TODO: Maybe add symbolic names for the units? Would avoid having
to trawl the docs for the magic hex value.
Signed-off-by: Ville Syrjälä
---
lib/intel_io.h
From: Ville Syrjälä
If IGT_NO_FORCEWAKE is set, skip the forcewake open. Useful when you
want to poke at register without otherwise disturbing the GPU.
Signed-off-by: Ville Syrjälä
---
lib/igt_debugfs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
From: Ville Syrjälä
intel_poller can be used to poll various display registers
(IIR,scanline/pixel/flip/frame counter, live address, etc.).
It can be used to determine eg. at which scanline or pixel count certain
events occur.
Signed-off-by: Ville Syrjälä
---
Ideas for a better name are welco
From: Ville Syrjälä
Remove the igt_assert() from the debugfs mount. It will fail if debugfs
is already mounted. With the assert in place it's very annying to use
igt without i915 loaded (eg. to dump BIOS configured registers).
Signed-off-by: Ville Syrjälä
---
lib/igt_debugfs.c | 2 +-
1 file c
API annotations are not used anywhere in the documentation, so the
annotation glossary is not built.
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml | 2 --
1 file changed, 2 deletions(-)
diff --git a/docs/reference/intel-gpu-tools/intel-gpu-tools-docs.xml
Hi,
any update on this issue? It's still present in 3.15 release.
Thanks.
On Tue, May 20, 2014 at 2:41 AM, Dave Airlie wrote:
>
>> Hi,
>
> cc'iong intel-gfx.
>
>>
>> I've upgraded kernel on my PC to 3.15-rc5 and I got today freeze
>> (recovery possibly only by power off/on) when waking from susp
On 11 June 2014 08:03, Aaron Lu wrote:
> On 06/11/2014 06:54 AM, Ben Widawsky wrote:
>> On Tue, Jun 10, 2014 at 08:59:32PM +0100, Lewis Toohey wrote:
>>> On 10 June 2014 17:58, Ben Widawsky wrote:
On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
> +Ben Widawsky & Daniel Vetter
>
On 10 June 2014 17:58, Ben Widawsky wrote:
> On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
>> +Ben Widawsky & Daniel Vetter
>>
>> On 06/09/2014 03:38 PM, Lewis Toohey wrote:
>> > On 3 June 2014 02:22, Aaron Lu wrote:
>> >> On 05/30/2014 09:12 PM, Lewis Toohey wrote:
>> >>> Aaron
>> >>
Signed-off-by: Damien Lespiau
---
scripts/list-workarounds | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/scripts/list-workarounds b/scripts/list-workarounds
index 68200dc..5a84ee8 100755
--- a/scripts/list-workarounds
+++ b/scripts/list-workarounds
@@ -17,7 +17,8 @@ def fi
On Wed, 11 Jun 2014 17:39:29 +0200
Daniel Vetter wrote:
> On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes
> wrote:
> >> - If you have a machine which uses tiled framebuffers and enables
> >> swizzling in the BIOS your code will a) drop the swizzle setup in
> >> gem_init_hw, breaking resume b)
On Wed, Jun 11, 2014 at 5:13 PM, Jesse Barnes wrote:
>> - If you have a machine which uses tiled framebuffers and enables
>> swizzling in the BIOS your code will a) drop the swizzle setup in
>> gem_init_hw, breaking resume b) not set the swizzle settings correctly
>> in swizzle_detect, break
> > > - Ack the interrupt inmediately, before trying to handle it (fix for
> > > missing interrupts by Bob Beckett ).
> >
> > This interrupt handling change is interesting since it might explain
> > our irq handling woes on gen5+ with the two-level GT interrupt handling
> scheme.
> > Can you please
From: Oscar Mateo
These do not exist anymore.
Spotted while reading through intel_ringbuffer.c
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/g
On Wed, 11 Jun 2014 11:23:26 +0200
Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 12:45:38PM -0700, Jesse Barnes wrote:
> > On Tue, 10 Jun 2014 21:33:27 +0200
> > Daniel Vetter wrote:
> >
> > > On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes
> > > wrote:
> > > > Yes, that's what I do below... I
On Tue, Jun 10, 2014 at 11:08 PM, Chris Wilson
wrote:
> On Tue, Jun 10, 2014 at 10:15:38AM -0700, Rodrigo Vivi wrote:
> > These PCI IDs are reserved on BSpec and can be used at any time in the
> future.
> > So let's add this now in order to avoid issues that we already faced on
> previous
> > pla
Always rebuild the sections file since it currently doesn't contain any
custom modifications.
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/Makefile.am | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/docs/reference/intel-gpu-tools/Makefile.am
b/docs/refer
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf O
On Wed, Jun 11, 2014 at 12:01:42PM +, Mateo Lozano, Oscar wrote:
> > -Original Message-
> > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Wednesday, June 11, 2014 12:50 PM
> > To: Mateo Lozano, Oscar
> > Cc: intel-gfx@lists.freedesktop.org
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 12:52 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org; Daniel, Thomas
> Subject: Re: [Intel-gfx] [PATCH 40/50] drm/i915/bdw: Handle con
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Wednesday, June 11, 2014 12:50 PM
> To: Mateo Lozano, Oscar
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 49/50] drm/i915/bdw: Help out the ctx switch
>
On Wed, Jun 11, 2014 at 12:55:38PM +0100, Chris Wilson wrote:
> Compute the smallest pitch required for a linear framebuffer and assert
> that the user has declared a pitch that meets that minimum requirement.
Wrong patch!
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_
Currently objects for which the hardware needs a contiguous physical
address are allocated a shadow backing storage to satisfy the contraint.
This shadow buffer is not wired into the normal obj->pages and so the
physical object is incoherent with accesses via the GPU, GTT and CPU. By
setting up the
On Wed, Jun 11, 2014 at 11:53:51AM +0100, Thomas Wood wrote:
> Signed-off-by: Thomas Wood
Reviewed-by: Daniel Vetter
> ---
> docs/reference/intel-gpu-tools/Makefile.am | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/docs/reference/intel-gpu-tools/Makefile.am
> b/do
On Wed, Jun 11, 2014 at 11:35:40AM +0100, Thomas Wood wrote:
> On 10 June 2014 15:40, Daniel Vetter wrote:
> > On Tue, Jun 10, 2014 at 03:30:54PM +0100, Thomas Wood wrote:
> >> This file can contain custom changes to the control the documentation
> >> output and therefore should be included in the
Compute the smallest pitch required for a linear framebuffer and assert
that the user has declared a pitch that meets that minimum requirement.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_display.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i9
On Fri, May 09, 2014 at 01:09:10PM +0100, oscar.ma...@intel.com wrote:
> From: Thomas Daniel
>
> Handle all context status events in the context status buffer on every
> context switch interrupt. We only remove work from the execlist queue
> after a context status buffer reports that it has compl
On Wed, Jun 11, 2014 at 02:40:00PM +0300, Ville Syrjälä wrote:
> On Wed, Jun 11, 2014 at 11:28:41AM +0100, Chris Wilson wrote:
> > Currently objects for which the hardware needs a contiguous physical
> > address are allocated a shadow backing storage to satisfy the contraint.
> > This shadow buffer
On Fri, May 09, 2014 at 01:09:19PM +0100, oscar.ma...@intel.com wrote:
> From: Oscar Mateo
>
> If we receive a storm of requests for the same context (see
> gem_storedw_loop_*)
> we might end up iterating over too many elements in interrupt time, looking
> for
> contexts to squash together. Ins
On Wed, Jun 11, 2014 at 11:28:41AM +0100, Chris Wilson wrote:
> Currently objects for which the hardware needs a contiguous physical
> address are allocated a shadow backing storage to satisfy the contraint.
> This shadow buffer is not wired into the normal obj->pages and so the
> physical object i
i915.ko has a custom fbdev initialisation routine that aims to preserve
the current mode set by the BIOS, unless overruled by the user. The
user's wishes are determined by what, if any, mode is specified on the
command line (via the video= parameter). However, that command line mode
is first parsed
Signed-off-by: Thomas Wood
---
docs/reference/intel-gpu-tools/Makefile.am | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/docs/reference/intel-gpu-tools/Makefile.am
b/docs/reference/intel-gpu-tools/Makefile.am
index daaa3f4..549f34b 100644
--- a/docs/reference/intel-gpu-to
On Wed, 2014-06-11 at 12:17 +0200, Daniel Vetter wrote:
> On Wed, Jun 11, 2014 at 01:53:49PM +0530, Sagar Arun Kamble wrote:
> > This patch can be marked as "abandoned".
> > Have verified locally that pci driver is taking care of D0ix transitions
> > and state save/restore.
>
> That still leaves t
Long ago, back in the racy haydays of 915gm interrupt handling, page
flips would occasionally go astray and leave the hardware stuck, and the
display not updating. This annoyed people who relied on their systems
being able to display continuously updating information 24/7, and so
some code to detec
On Tue, Jun 10, 2014 at 10:22:33PM +0100, Chris Wilson wrote:
> Compute the smallest pitch required for a linear framebuffer and assert
> that the user has declared a pitch that meets that minimum requirement.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/intel_display.c | 11
On 10 June 2014 15:47, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 03:30:57PM +0100, Thomas Wood wrote:
>> Signed-off-by: Thomas Wood
>
> I've intentionally left these out since they're not really part of the
> core test library ... E.g. all public rendercopy functions are documented
> as part
On 10 June 2014 15:40, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 03:30:54PM +0100, Thomas Wood wrote:
>> This file can contain custom changes to the control the documentation
>> output and therefore should be included in the repository.
>>
>> Signed-off-by: Thomas Wood
>
> Doesn't that mean
On 10 June 2014 15:38, Daniel Vetter wrote:
> On Tue, Jun 10, 2014 at 03:30:53PM +0100, Thomas Wood wrote:
>> Signed-off-by: Thomas Wood
>> ---
>> README | 12 +---
>> 1 file changed, 5 insertions(+), 7 deletions(-)
>>
>> diff --git a/README b/README
>> index cfa186d..5e98565 100644
>> -
On Wed, Jun 11, 2014 at 06:52:15AM +, Nicolae Badiu wrote:
> Hey,
>
> With regard to this commit:
> http://lists.freedesktop.org/archives/intel-gfx/2012-December/023210.html
>
> How can I get access to this B-Spec document?
Bspec is the internal name for the published programmer manuals.
We duplicated the legacy physical HWS setup routine for no good reason.
Combine it with the more recent virtual HWS setup for simplicity.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_dma.c | 16 +--
drivers/gpu/drm/i915/intel_ringbuffer.c | 81 ---
Currently objects for which the hardware needs a contiguous physical
address are allocated a shadow backing storage to satisfy the contraint.
This shadow buffer is not wired into the normal obj->pages and so the
physical object is incoherent with accesses via the GPU, GTT and CPU. By
setting up the
On Tue, Jun 10, 2014 at 10:22:33PM +0100, Chris Wilson wrote:
> Compute the smallest pitch required for a linear framebuffer and assert
> that the user has declared a pitch that meets that minimum requirement.
>
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/intel_display.c | 11
Thanks Ville,
The commit I mentioned below talks about a register at location 2084h. This
location is marked as Reserved in the DevSNB PRM docs and only referenced once
in reference to bit 2084h[7]. It seems to be some sort of a debug register.
I can also see three more subsequent registers a
On Tue, Jun 10, 2014 at 03:51:03PM +, Nicolae Badiu wrote:
> Hi,
>
> Does anyone have access to the Sandy Bridge 2011 Intel HD Graphics PCI
> Config space register reference? I cannot seem to find it anywhere in
> the PRM docs. There is only a reference to a register called MMAPA at
> office
On Wed, Jun 11, 2014 at 01:53:49PM +0530, Sagar Arun Kamble wrote:
> This patch can be marked as "abandoned".
> Have verified locally that pci driver is taking care of D0ix transitions
> and state save/restore.
That still leaves the question why you originally thought this is
required. What did bl
On Wed, Jun 11, 2014 at 06:52:15AM +, Nicolae Badiu wrote:
> Hey,
>
> With regard to this commit:
> http://lists.freedesktop.org/archives/intel-gfx/2012-December/023210.html
>
> How can I get access to this B-Spec document?
The public documents are here:
https://01.org/linuxgraphics/docum
Reviewed-by: Sagar Kamble
On Wed, 2014-06-11 at 14:33 +0530, Vandana Kannan wrote:
> Updated drm documentation to include desscription of aspect ratio property.
>
> v2: Updated aspect ratio specific documentation on top of the HTML table
> created.
>
> Signed-off-by: Vandana Kannan
> Cc: Saga
On Tue, Jun 10, 2014 at 03:49:57AM -0700, Rodrigo Vivi wrote:
> Some registers set during setup might not be persistent after suspend/resume,
> and also on crtc off/on cycles.
>
> This was causing bugs for some people that was unable to get PSR entry state
> after suspend/resume cycle.
>
> v2: Ad
On Tue, Jun 10, 2014 at 11:42:37AM -0700, Jesse Barnes wrote:
> On Tue, 10 Jun 2014 11:01:06 -0700
> Stéphane Marchesin wrote:
>
> > On Tue, Jun 10, 2014 at 10:31 AM, Jesse Barnes
> > wrote:
> > > On Tue, 10 Jun 2014 16:07:44 +0200
> > > Daniel Vetter wrote:
> > >
> > >> On Thu, Jun 05, 2014 a
On Tue, Jun 10, 2014 at 12:45:38PM -0700, Jesse Barnes wrote:
> On Tue, 10 Jun 2014 21:33:27 +0200
> Daniel Vetter wrote:
>
> > On Tue, Jun 10, 2014 at 7:27 PM, Jesse Barnes
> > wrote:
> > > Yes, that's what I do below... I even added it to the changelog:
> > > http://patchwork.freedesktop.org/p
Updated drm documentation to include desscription of aspect ratio property.
v2: Updated aspect ratio specific documentation on top of the HTML table
created.
Signed-off-by: Vandana Kannan
Cc: Sagar Kamble
Cc: Daniel Vetter
---
Documentation/DocBook/drm.tmpl | 13 +++--
1 file changed
This patch can be marked as "abandoned".
Have verified locally that pci driver is taking care of D0ix transitions
and state save/restore.
Thanks Imre for the clarification.
On Tue, 2014-06-10 at 20:51 +0300, Imre Deak wrote:
> On Tue, 2014-06-10 at 23:05 +0530, Sagar Arun Kamble wrote:
> > On Tue
Dear Linux folks,
although there are no user visible issues, there is still the following
error message in the log.
> [1.235596] i915: render error detected, EIR: 0x0010
> [1.235596] i915: page table error
> [1.235596] i915: PGTBL_ER: 0x0012
>
On 06/11/2014 06:54 AM, Ben Widawsky wrote:
> On Tue, Jun 10, 2014 at 08:59:32PM +0100, Lewis Toohey wrote:
>> On 10 June 2014 17:58, Ben Widawsky wrote:
>>> On Tue, Jun 10, 2014 at 01:33:51PM +0800, Aaron Lu wrote:
+Ben Widawsky & Daniel Vetter
On 06/09/2014 03:38 PM, Lewis Toohey
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