On Fri, Jul 11, 2014 at 07:42:56AM +0100, Chris Wilson wrote:
> On Fri, Jul 11, 2014 at 08:40:29AM +0200, Daniel Vetter wrote:
> > On Thu, Jul 10, 2014 at 07:00:06PM +0100, Damien Lespiau wrote:
> > > +typedef enum {
> > > + /* this maps to the kernel API */
> > > + IGT_ROTATION_0 = 1 << 0,
> > >
Hi all,
So kms tests have rather ugly control flow compared to other tests. And
the pattern is usually the same:
- A subtest loops over a set of possible configurations to test and tries
igt_commit. If that fails then it needs to manually reset the
igt_display state and go to the next possibl
I've noticed some spam in the userptr list ...
Signed-off-by: Daniel Vetter
---
lib/igt_core.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/igt_core.c b/lib/igt_core.c
index bdeeb59971de..856262be34fa 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1200,6 +1200,9 @@ void ig
On 2014-07-11 07:22 (GMT+0100) Chris Wilson composed:
On Thu, Jul 10, 2014 at 09:09:31PM -0400, Felix Miata wrote:
F21 branched off Rawhide over recent hours. On i945G host gx62b I
cloned first, then upgraded one to current F21 state and the other
to Rawhide. Before today's upgrade, which mov
Hi,
On 07/11/2014 08:22 AM, Chris Wilson wrote:
> On Thu, Jul 10, 2014 at 09:09:31PM -0400, Felix Miata wrote:
>> F21 branched off Rawhide over recent hours. On i945G host gx62b I
>> cloned first, then upgraded one to current F21 state and the other
>> to Rawhide. Before today's upgrade, which mov
For Gen < 8, set M2_N2 registers on every mode set. This is required to make
sure M2_N2 registers are set during boot, resume from sleep for cross-
checking the state. The register is set only if DRRS is supported.
v2: Patch rebased
v3: Daniel's review comments
- Removed HAS_DRRS(dev) and
Adding relevant read out comparison code, in check_crtc_state, for the new
member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
values for a DP downclock mode (if available). Suggested by Daniel.
v2: Changed patch title.
Daniel's review comments incorporated.
Added relevant stat
From: Deepak S
Adding chv specific fre/encode conversion.
v2: Remove generic function and platform check (Daniel)
Signed-off-by: Deepak S
---
drivers/gpu/drm/i915/intel_pm.c | 78 +++--
1 file changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/
When waiting for the forked tests, we can respond quicker to a failure
(such as oom) by waiting for any child to exit rather than waiting for
each child in order. Then when we see that a test failed, we can kill
all other children before aborting.
Signed-off-by: Chris Wilson
---
lib/igt_core.c |
If the parent passes a userptr to some private memory, we expect to
still be able to use the userptr in the child.
Signed-off-by: Chris Wilson
---
tests/gem_userptr_blits.c | 52 +++
1 file changed, 52 insertions(+)
diff --git a/tests/gem_userptr_blit
The forked tests allocate the bo (and thus for userptr, the memory) in
the parent and pass them to all children. The difference for userptr is
that we allocate system memory which the kernel then copies into each
child. As the children need to access the memory for their checks, it
does need to be
Hi all,
New -testing cycle with cool stuff:
- fbc improvements when stolen memory is tight (Ben)
- cdclk handling improvements for vlv/chv (Ville)
- proper fix for stuck primary planes on gmch platforms with cxsr (Imre&Ebgert
Eich)
- gen8 hw semaphore support (Ben)
- more execlist prep work from
During the range invalidate, we walk the list of buffers associated with
the mmu_notifer and find the ones that overlap the range. An
optimisation is made to speed up the iteration by assuming the previous
iter is still valid whilst the tree is unmodified. This exposes a bug
when a range invalidate
Whilst waiting to obtain our locks for the last resort shrinking before
an oom, we check whether or not a fatal signal was pending. If there was,
we do not need to keep waiting as the oom will be aborted.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 5 -
1 file changed,
On 07/11/2014 10:40 AM, Chris Wilson wrote:
The forked tests allocate the bo (and thus for userptr, the memory) in
the parent and pass them to all children. The difference for userptr is
that we allocate system memory which the kernel then copies into each
child. As the children need to access t
On 07/11/2014 10:40 AM, Chris Wilson wrote:
If the parent passes a userptr to some private memory, we expect to
still be able to use the userptr in the child.
Signed-off-by: Chris Wilson
---
tests/gem_userptr_blits.c | 52 +++
1 file changed, 52 i
On 07/11/2014 11:28 AM, Chris Wilson wrote:
During the range invalidate, we walk the list of buffers associated with
the mmu_notifer and find the ones that overlap the range. An
optimisation is made to speed up the iteration by assuming the previous
iter is still valid whilst the tree is unmodif
I've just updated the instructions in the intel-gpu-tools README to
detail the new ways to run the tests.
The most important change is that the igt symlink support has been
removed from Piglit. Anyone using the symlink to tell Piglit where to
locate the tests needs to update to either use piglit.c
On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
>
> On 07/11/2014 11:28 AM, Chris Wilson wrote:
> >During the range invalidate, we walk the list of buffers associated with
> >the mmu_notifer and find the ones that overlap the range. An
> >optimisation is made to speed up the iterat
On 07/11/2014 12:06 PM, Chris Wilson wrote:
On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
On 07/11/2014 11:28 AM, Chris Wilson wrote:
During the range invalidate, we walk the list of buffers associated with
the mmu_notifer and find the ones that overlap the range. An
optimis
On Fri, Jul 11, 2014 at 12:31:12PM +0100, Tvrtko Ursulin wrote:
>
> On 07/11/2014 12:06 PM, Chris Wilson wrote:
> >On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
> >>But it will be interesting to know what code managed to trigger this
> >>race, because as we discussed on IRC it wo
On 07/11/2014 12:35 PM, Chris Wilson wrote:
On Fri, Jul 11, 2014 at 12:31:12PM +0100, Tvrtko Ursulin wrote:
On 07/11/2014 12:06 PM, Chris Wilson wrote:
On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
But it will be interesting to know what code managed to trigger this
race, b
On 07/11/2014 10:40 AM, Chris Wilson wrote:
When waiting for the forked tests, we can respond quicker to a failure
(such as oom) by waiting for any child to exit rather than waiting for
each child in order. Then when we see that a test failed, we can kill
all other children before aborting.
Sig
Signed-off-by: Damien Lespiau
---
lib/ioctl_wrappers.c | 25 +
lib/ioctl_wrappers.h | 1 +
tests/gem_tiled_pread.c| 16
tests/gem_tiled_pread_pwrite.c | 16
4 files changed, 26 insertions(+), 32 deletions(-)
d
From: Deepak S
This is useful for userspace utilities to verify and micromanaging
the increase/decrease frequncy.
v2: Use vlv_gpu_freq to get freq (Deepak)
Signed-off-by: Deepak S
---
drivers/gpu/drm/i915/intel_pm.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Saturday, June 28, 2014 12:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 30/40] drm/i915: Add the
> WaCsStallBeforeStateC
On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
mem_freq is needed to decode the GPU freq opcodes.
FIXME: Punit reg seems to contain garbage so this isn't right
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 18 ++
On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
No need to re-read the hardware rps fuses when we already have all the
values tucked away in dev_priv->rps.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_debugfs.c | 19 ++--
On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
CHV wants even rps opcodes so make sure the min/max/rpe values are also
even.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_debugfs.c | 8
drivers/gpu/drm/i915/intel_pm.c
On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
In
commit 62942ed7279d3e06dc15ae3d47665eff3b373327
Author: Jesse Barnes
Date: Fri Jun 13 09:28:33 2014 -0700
drm/i915/vlv: disable PPGTT on early revs v3
we forgot about CHV. IS_VALLEYVI
On Sat, Jul 12, 2014 at 07:18:30PM +0530, Deepak S wrote:
>
> On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
> >From: Ville Syrjälä
> >
> >In
> > commit 62942ed7279d3e06dc15ae3d47665eff3b373327
> > Author: Jesse Barnes
> > Date: Fri Jun 13 09:28:33 2014 -0700
> >
>
On Fri, Jul 11, 2014 at 12:06:02PM +0100, Chris Wilson wrote:
> On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
> >
> > On 07/11/2014 11:28 AM, Chris Wilson wrote:
> > >During the range invalidate, we walk the list of buffers associated with
> > >the mmu_notifer and find the ones t
On Sat, Jul 12, 2014 at 07:00:05PM +0530, Deepak S wrote:
>
> On Saturday 28 June 2014 04:33 AM, ville.syrj...@linux.intel.com wrote:
> >From: Ville Syrjälä
> >
> >No need to re-read the hardware rps fuses when we already have all the
> >values tucked away in dev_priv->rps.
> >
> >Signed-off-by:
On 07/11/2014 03:02 PM, Daniel Vetter wrote:
On Fri, Jul 11, 2014 at 12:06:02PM +0100, Chris Wilson wrote:
On Fri, Jul 11, 2014 at 12:00:26PM +0100, Tvrtko Ursulin wrote:
On 07/11/2014 11:28 AM, Chris Wilson wrote:
During the range invalidate, we walk the list of buffers associated with
the
Just a matter of not leaving dangling pointers around.
Signed-off-by: Damien Lespiau
---
lib/igt_fb.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 39a1f62..83f4343 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -521,7 +521,9 @@ static cairo_format_t dr
We don't need to keep a reference to the surface, the cairo context will
keep a reference to it until we destroy it.
Signed-off-by: Damien Lespiau
---
lib/igt_fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 83f4343..d07af0d 100644
--- a/
Signed-off-by: Damien Lespiau
---
tests/testdisplay.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/testdisplay.c b/tests/testdisplay.c
index 6d8fe3a..887105d 100644
--- a/tests/testdisplay.c
+++ b/tests/testdisplay.c
@@ -314,6 +314,8 @@ static void paint_output_info(struct connecto
This is preparation work for when we need a different way to get a
linear buffer we can use with cairo.
Signed-off-by: Damien Lespiau
---
lib/igt_fb.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index f43af93..39a1f
Signed-off-by: Damien Lespiau
---
lib/igt_fb.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index 6d030e6..f5110d4 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -48,7 +48,6 @@ struct igt_fb {
uint32_t drm_format;
int width;
int height;
-
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Saturday, June 28, 2014 12:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 16/40] drm/i915: Add chv_power_wells[]
>
> Fro
On Fri, Jul 11, 2014 at 08:34:41AM +0200, Daniel Vetter wrote:
> On Thu, Jul 10, 2014 at 07:00:03PM +0100, Damien Lespiau wrote:
> > Signed-off-by: Damien Lespiau
> > ---
> > lib/igt_kms.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/lib/igt_kms.h b/lib/igt_kms.
On Fri, Jul 11, 2014 at 08:37:42AM +0200, Daniel Vetter wrote:
> On Thu, Jul 10, 2014 at 07:00:06PM +0100, Damien Lespiau wrote:
> > Signed-off-by: Damien Lespiau
> > ---
> > lib/igt_kms.c | 54 ++
> > lib/igt_kms.h | 11 +++
> > 2 files
On Thu, Jul 10, 2014 at 07:00:01PM +0100, Damien Lespiau wrote:
> I've taken the current rotation test to test the kernel patches and improved
> it
> a bit along the way. It's a bit like a detailed review, but with patches
> instead of comments.
>
> With the rotation kernel patches and an IVB mac
From: Tim Gore
kms_force_connector is a new test that requires cairo.
I have added it to the list of tests not to build on
Android unless ANDROID_HAS_CAIRO is set.
Signed-off-by: Tim Gore
---
tests/Android.mk | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/Android.m
deepa...@linux.intel.com writes:
> From: Deepak S
>
> Reading RP1 for valleyview to help us enable "pm_rps" i-g-t testcase
> execution.
>
> Signed-off-by: Deepak S
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_pm.c | 16
> 1 file changed, 16 insertions(+)
>
>
deepa...@linux.intel.com writes:
> From: Deepak S
>
> This is useful for userspace utilities to verify and micromanaging the
> increase/decrease frequncy.
>
> Signed-off-by: Deepak S
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_sysfs.c | 18 +++---
> 1 file changed
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of ville.syrj...@linux.intel.com
> Sent: Saturday, June 28, 2014 12:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/40] drm/i915: Call encoder->post_disable() i
deepa...@linux.intel.com writes:
> From: Deepak S
>
> We need mem_freq or cz clock for freq/opcode conversion
>
> Signed-off-by: Deepak S
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 6 ++
> drivers/gpu/drm/i915/intel_pm.c | 29 +++
deepa...@linux.intel.com writes:
> From: Deepak S
>
> Enabled PM interrupt programming for CHV. Re-using gen8 code and extending
> same for CHV.
>
> Signed-off-by: Deepak S
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_irq.c | 2 +-
> drivers/gpu/drm/i915/intel_pm.c | 4
>
On Fri, 11 Jul 2014 14:32:57 +0530
Vandana Kannan wrote:
> For Gen < 8, set M2_N2 registers on every mode set. This is required to make
> sure M2_N2 registers are set during boot, resume from sleep for cross-
> checking the state. The register is set only if DRRS is supported.
>
> v2: Patch reba
From: Borun Fu
On VLV, after i915_pm_suspend display power wells are staying
power ungated. So, after initiating mem sleep "echo mem > /sys/power/state"
Display is staing D0 State. There might be better way/place to power gate
these wells. Also, we need to make sure that if wells are power gated
Damien dodged this ...
Also run the script while at it.
v2: Don't just capture identifiers for pipe, but also expressions.
Signed-off-by: Daniel Vetter
---
lib/igt.cocci | 10 ++
tests/kms_cursor_crc.c | 2 +-
tests/kms_fbc_crc.c| 2 +-
tests/kms_fence_pin_le
On Thu, Jul 10, 2014 at 10:15:11PM +0200, Daniel Vetter wrote:
> On Tue, Jul 01, 2014 at 06:33:50PM -0300, Paulo Zanoni wrote:
> > 2014-06-25 16:01 GMT-03:00 Imre Deak :
> > > This is a respin of the unmerged part of Daniel's runtime PM for DPMS
> > > patchset [1]. The original one also included a
deepa...@linux.intel.com writes:
> From: Deepak S
>
> Adding chv specific fre/encode conversion.
>
> v2: Remove generic function and platform check (Daniel)
>
> Signed-off-by: Deepak S
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/intel_pm.c | 78
> +
From: Oscar Mateo
For the moment this is just a placeholder, but it shows one of the
main differences between the good ol' HW contexts and the shiny
new Logical Ring Contexts: LR contexts allocate and free their
own backing objects. Another difference is that the allocation is
deferred (as the c
From: Oscar Mateo
Some legacy HW context code assumptions don't make sense for this new
submission method, so we will place this stuff in a separate file.
Note for reviewers: I've carefully considered the best name for this file
and this was my best option (other possibilities were intel_lr_cont
From: Oscar Mateo
For a description of this patchset, please check the previous cover letters:
[1], [2] and [3].
The main changes introduced in this v4 are:
- Do not abstract __i915_add_request away.
- Squash together the two emit request functions.
- Always pass the ringbuffer along, as the s
From: Oscar Mateo
GEN8 brings an expansion of the HW contexts: "Logical Ring Contexts".
These expanded contexts enable a number of new abilities, especially
"Execlists".
The macro is defined to off until we have things in place to hope to
work.
v2: Rename "advanced contexts" to the more correct
From: Oscar Mateo
Any given ringbuffer is unequivocally tied to one context and one engine.
By setting the appropriate pointers to them, the ringbuffer struct holds
all the infromation you might need to submit a workload for processing,
Execlists style.
Signed-off-by: Oscar Mateo
---
drivers/g
From: Oscar Mateo
If we receive a storm of requests for the same context (see gem_storedw_loop_*)
we might end up iterating over too many elements in interrupt time, looking for
contexts to squash together. Instead, share the burden by giving more
intelligence to the queue function. At most, the
From: Oscar Mateo
On a previous iteration of this patch, I created an Execlists
version of __i915_add_request and asbtracted it away as a
vfunc. Daniel Vetter wondered then why that was needed:
"with the clean split in command submission I expect every
function to know wether it'll submit to an
From: Ben Widawsky
A context switch occurs by submitting a context descriptor to the
ExecList Submission Port. Given that we can now initialize a context,
it's possible to begin implementing the context switch by creating the
descriptor and submitting it to ELSP (actually two, since the ELSP
has
From: Oscar Mateo
Up until recently, semaphores weren't enabled in BDW so we didn't care
about them. But then Rodrigo came and enabled them:
commit 521e62e49a42661a4ee0102644517dbe2f100a23
Author: Rodrigo Vivi
drm/i915: Enable semaphores on BDW
So now we have to explicitly disable
From: Ben Widawsky
This has turned out to be really handy in debug so far.
Update:
Since writing this patch, I've gotten similar code upstream for error
state. I've used it quite a bit in debugfs however, and I'd like to keep
it here at least until preemption is working.
Signed-off-by: Ben Wida
From: Oscar Mateo
Allocate and populate the default LRC for every ring, call
gen-specific init/cleanup, init/fini the command parser and
set the status page (now inside the LRC object). These are
things all engines/rings have in common.
Stopping the ring before cleanup and initializing the seqno
From: Oscar Mateo
No mistery here: the seqno is still retrieved from the engine's
HW status page (the one in the default context. For the moment,
I see no reason to worry about other context's HWS page).
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_lrc.c | 20
From: Oscar Mateo
These two functions make no sense in an Logical Ring Context & Execlists
world.
v2: We got rid of lrc_enabled and centralized everything in the sanitized
i915.enbale_execlists instead.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_gem_context.c | 9 +
1 fi
From: Oscar Mateo
As suggested by Daniel Vetter. The idea, in subsequent patches, is to
provide an alternative to these vfuncs for the Execlists submission
mechanism.
v2: Splitted into two and reordered to illustrate our intentions, instead
of showing it off. Also, remove the add_request vfunc a
From: Oscar Mateo
This is a hard one, since there is no direct hardware ring to
control when in Execlists.
We reuse intel_ring_idle here, but it should be fine as long
as i915_add_request does the ring thing.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_lrc.c | 24 +++
From: Thomas Daniel
Handle all context status events in the context status buffer on every
context switch interrupt. We only remove work from the execlist queue
after a context status buffer reports that it has completed and we only
attempt to schedule new contexts on interrupt when a previously
From: Oscar Mateo
Logical rings do not need most of the initialization their
legacy ringbuffer counterparts do: we just need the pipe
control object for the render ring, enable Execlists on the
hardware and a few workarounds.
v2: Squash with: "drm/i915: Extract pipe control fini & make
init outs
From: Oscar Mateo
The normal flip function places things in the ring in the legacy
way, so we either fix that or force MMIO flips always as we do in
this patch.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_display.c | 2 ++
drivers/gpu/drm/i915/intel_lrc.c | 3 ++-
2 files cha
From: Oscar Mateo
In the current Execlists feeding mechanism, full preemption is not
supported yet: only lite-restores are allowed (this is: the GPU
simply samples a new tail pointer for the context currently in
execution).
But we have identified an scenario in which a full preemption occurs:
1)
From: Oscar Mateo
Dispatch_execbuffer's evil twin.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_lrc.c| 28
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++
2 files changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drive
From: Oscar Mateo
For the most part, logical ring context objects are similar to hardware
contexts in that the backing object is meant to be opaque. There are
some exceptions where we need to poke certain offsets of the object for
initialization, updating the tail pointer or updating the PDPs.
F
From: Oscar Mateo
This is mostly for correctness so that we know we are running the LR
context correctly (this is, the PDPs are contained inside the context
object).
v2: Move the check to inside the enable PPGTT function. The switch
happens in two places: the legacy context switch (that we won't
From: Oscar Mateo
Now that we have the ability to allocate our own context backing objects
and we have multiplexed one of them per engine inside the context structs,
we can finally allocate and free them correctly.
Regarding the context size, reading the register to calculate the sizes
can work,
From: Oscar Mateo
Add theory of operation notes to intel_lrc.c and comments to externally
visible functions.
v2: Add notes on logical ring context creation.
v3: Use kerneldoc.
v4: Integrate it in the DocBook template.
Signed-off-by: Thomas Daniel (v1)
Signed-off-by: Oscar Mateo (v2, v3)
---
From: Oscar Mateo
If we reset a ring after a hang, we have to make sure that we clear
out all queued Execlists requests.
v2: The ring is, at this point, already being correctly re-programmed
for Execlists, and the hangcheck counters cleared.
v3: Daniel suggests to drop the "if (execlists)" beca
From: Oscar Mateo
As we have said a couple of times by now, logical ring contexts have
their own ringbuffers: not only the backing pages, but the whole
management struct.
In a previous version of the series, this was achieved with two separate
patches:
drm/i915/bdw: Allocate ringbuffer backing o
From: Oscar Mateo
Each logical ring context has the tail pointer in the context object,
so update it before submission.
v2: New namespace.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_lrc.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i
From: Oscar Mateo
This is what i915_gem_do_execbuffer calls when it wants to execute some
worload in an Execlists world.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_drv.h| 6 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 +-
drivers/gpu/drm/i915/intel_lrc.c
From: Oscar Mateo
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_debugfs.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 66e9244..4c62900 100644
--- a/driv
From: Oscar Mateo
Execlists are indeed a brave new world with respect to workload
submission to the GPU.
In previous version of these series, I have tried to impact the
legacy ringbuffer submission path as little as possible (mostly,
passing the context around and using the correct ringbuffer wh
From: Oscar Mateo
The backing objects and ringbuffers for contexts created via open
fd are actually empty until the user starts sending execbuffers to
them. At that point, we allocate & populate them. We do this because,
at create time, we really don't know which engine is going to be used
with t
From: Oscar Mateo
Up until now, we have pinned every logical ring context backing object
during creation, and left it pinned until destruction. This made my life
easier, but it's a harmful thing to do, because we cause fragmentation
of the GGTT (and, eventually, we would run out of space).
This
From: Oscar Mateo
Very similar to the legacy add_request, only modified to account for
logical ringbuffer.
v2: Use MI_GLOBAL_GTT, as suggested by Brad Volkin.
v3: Unify render and non-render in the same function, as noticed by
Brad Volkin.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/
From: Oscar Mateo
We need to attend context switch interrupts from all rings. Also, fixed writing
IMR/IER and added HWSTAM at ring init time.
Notice that, if added to irq_enable_mask, the context switch interrupts would
be incorrectly masked out when the user interrupts are due to no users waiti
From: Oscar Mateo
The time has come, the Walrus said, to talk of many things.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9e3e38e..426e
From: Oscar Mateo
The batchbuffer that sets the render context state is submitted
in a different way, and from different places.
We needed to make both the render state preparation and free functions
outside accesible, and namespace accordingly. This mess is so that all
LR, LRC and Execlists fun
On Fri, Jul 11, 2014 at 05:42:48PM +0300, Mika Kuoppala wrote:
> deepa...@linux.intel.com writes:
>
> > From: Deepak S
> >
> > Reading RP1 for valleyview to help us enable "pm_rps" i-g-t testcase
> > execution.
> >
> > Signed-off-by: Deepak S
>
> Reviewed-by: Mika Kuoppala
>
> > ---
> > driv
On Sat, Jul 12, 2014 at 02:54:33PM +0530, deepa...@linux.intel.com wrote:
> From: Deepak S
>
> Adding chv specific fre/encode conversion.
>
> v2: Remove generic function and platform check (Daniel)
>
> Signed-off-by: Deepak S
When resubmitting patches into an existing patchbomb thread please
On Thu, Jul 10, 2014 at 01:16:22PM +0530, deepa...@linux.intel.com wrote:
> From: Deepak S
>
> This is useful for userspace utilities to verify and micromanaging the
> increase/decrease frequncy.
>
> Signed-off-by: Deepak S
> ---
> drivers/gpu/drm/i915/i915_sysfs.c | 18 +++---
> 1
They match now.
Cc: Deepak S
Cc: Mika Kuoppala
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_sysfs.c | 20 ++--
1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index b15c8cee103b.
From: Oscar Mateo
A context backing object only makes sense for a given engine (because
it holds state data specific to that engine).
In legacy ringbuffer sumission mode, the only MI_SET_CONTEXT we really
perform is for the render engine, so one backing object is all we nee.
With Execlists, how
From: Oscar Mateo
Same as with the context, pinning to GGTT regardless is harmful (it
badly fragments the GGTT and can even exhaust it).
Unfortunately, this case is also more complex than the previous one
because we need to map and access the ringbuffer in several places
along the execbuffer pat
From: Michel Thierry
Context switch (and execlist submission) should happen only when
other contexts are not active, otherwise pre-emption occurs.
To assure this, we place context switch requests in a queue and those
request are later consumed when the right context switch interrupt is
received
From: Oscar Mateo
Same as the legacy-style ring->flush.
v2: The BSD invalidate bit still exists in GEN8! Add it for the VCS
rings (but still consolidate the blt and bsd ring flushes into one).
This was noticed by Brad Volkin.
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/intel_lrc.c
From: Oscar Mateo
v2: Warn and return if LRCs are not enabled.
v3: Grab the Execlists spinlock (noticed by Daniel Vetter).
Signed-off-by: Oscar Mateo
---
drivers/gpu/drm/i915/i915_debugfs.c | 73 +
drivers/gpu/drm/i915/intel_lrc.c| 6 ---
drivers/gpu/d
From: Oscar Mateo
Since the ringbuffer does not belong per engine anymore, we have to
make sure that we are always recording the correct ringbuffer.
TODO: This is only a small fix to keep basic error capture working, but
we need to add more information for it to be useful (e.g. dump the
context
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