== Summary ==
Series 3075v3 drm/i915/dsi: i2c/gpio
2016-02-04T16:55:25.384210
http://patchwork.freedesktop.org/api/1.0/series/3075/revisions/3/mbox/
Applying: drm/i915/dsi: defend gpio table against out of bounds access
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i
Hi Chris,
On Fri, Jan 29, 2016 at 04:48:07PM +, Chris Wilson wrote:
> On Fri, Jan 29, 2016 at 03:57:09PM +0200, Joonas Lahtinen wrote:
> > Hi,
> >
> > TL;DR Overall, we have same problem as with the scheduler series, there
> > is too much placeholder stuff for easy review. Just squash enough
not sure how this can be pushed separately even if approved at present.
why not push this as part of new patch set of the RC patches ?
but ignoring the dependency this is fine.
Reviewed-by: Sivakumar Thulasimani
On 2/4/2016 11:44 AM, Mayuresh Gharpure wrote:
Currently, a flip with render compr
On 2/4/2016 5:59 PM, Jani Nikula wrote:
On Thu, 04 Feb 2016, Shubhangi Shrivastava
wrote:
This patch sets the invert bit for hpd detection for each port
based on vbt configuration. since each AOB can be designed to
depend on invert bit or not, it is expected if an AOB requires
invert bit, th
Hi,
On Thu, Feb 04, 2016 at 09:21:17AM +, Li, Weinan Z wrote:
> We still need this patch. Seems 54632abe8ca3 ("drm/i915: Fix oops caused by
> fbdev initialization
> failure") as well as 366e39b4d2c5 ("drm/i915: Tear down fbdev if
> initialization fails") this 2 patches can???t cover this case
Daniel Stone writes:
> Hi,
>
> On 3 February 2016 at 21:41, Eric Anholt wrote:
>> + ret = ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &arg);
>> + igt_assert(ret == -1 && errno == EINVAL);
>
> A couple of nitpicks: all these should be either do_ioctl() for
> success, or do_ioctl_
On Thu, 04 Feb 2016, "Kibey, Sameer" wrote:
> Thanks for the input. I changed the subject prefix for this thread,
> let me know if you would like me to send a new email with "PATCH
> i-g-t" instead.
Not necessary; I meant to say, "for future reference".
BR,
Jani.
--
Jani Nikula, Intel Open Sou
I eventually traced the filesystem corruption to a bug in the Apple
firmware which can cause memory corruption after Linux is booted:
https://bugzilla.kernel.org/show_bug.cgi?id=111781
On 29 January 2016 at 12:37, Chris Wilson wrote:
> The timer error is definitely interesting
The timer error bi
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, February 04, 2016 10:37 AM
> To: Kibey, Sameer; intel-gfx@lists.freedesktop.org; mesa-
> d...@lists.freedesktop.org
> Cc: Sharp, Sarah A; Kibey, Sameer; Widawsky, Benjamin
> Subject: Re: [Intel-g
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
>> Skip v3 gpio element because the support is not there, and skip gpio
>> element on non-vlv because the sideband code is vlv specific.
>>
>> v2: the gpio stuff is currently only supported on
FYI, for IGT patches, please do as instructed in CONTRIBUTING:
"""
Please use --subject-prefix="PATCH i-g-t" so that i-g-t patches are easily
identified in the massive amount mails on intel-gfx. To ensure this is always
done just run
git config format.subjectprefix "PATCH i-g-t"
fro
Updated the list-workarounds script so that it
can parse Mesa directory if provided. Moved the
common code to a separate function to allow
reuse for both kernel and mesa.
The new command line is:
Usage: list-workarounds [options] path-to-kernel
-k path-to-kernel -m path-to-mesa
The legacy
On Thu, Feb 04, 2016 at 12:50:56PM +0200, Jani Nikula wrote:
> From: Deepak M
>
> The generic gpio is sequence is parsed from the VBT and the
> GPIO table is updated with the North core, South core and
> SUS core elements.
>
> v2: Move changes in sideband.c file to new patch(Jani), rebase
> v3:
On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
> Skip v3 gpio element because the support is not there, and skip gpio
> element on non-vlv because the sideband code is vlv specific.
>
> v2: the gpio stuff is currently only supported on vlv (Ville)
>
> Cc: drm-intel-fi...@lists.freed
On Thu, Feb 04, 2016 at 07:22:30PM +0200, Jani Nikula wrote:
> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> > On Thu, Feb 04, 2016 at 07:10:42PM +0200, Jani Nikula wrote:
> >> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> >> > On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
> >> >> Skip
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 07:10:42PM +0200, Jani Nikula wrote:
>> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
>> > On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
>> >> Skip v3 gpio element because the support is not there, and skip gpio
>> >>
On Thu, Feb 04, 2016 at 07:10:42PM +0200, Jani Nikula wrote:
> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> > On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
> >> Skip v3 gpio element because the support is not there, and skip gpio
> >> element on non-vlv because the sideband code is v
On 01/11/2016 02:10 PM, Chris Wilson wrote:
> On Mon, Jan 11, 2016 at 06:42:37PM +, john.c.harri...@intel.com wrote:
>> From: John Harrison
>>
>> A major point of the GPU scheduler is that it re-orders batch buffers
>> after they have been submitted to the driver. This leads to requests
>> com
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 06:55:15PM +0200, Jani Nikula wrote:
>> From: Deepak M
>>
>> Make the gpio read/write functions more generic iosf sideband read/write
>> functions, taking the iosf port as argument.
>>
>> v2: rebase
>> v3: rebase
>> v4 by Jani:
On Thu, 04 Feb 2016, Jani Nikula wrote:
> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
>> On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
>>> Skip v3 gpio element because the support is not there, and skip gpio
>>> element on non-vlv because the sideband code is vlv specific.
>>>
>>> v
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
>> Skip v3 gpio element because the support is not there, and skip gpio
>> element on non-vlv because the sideband code is vlv specific.
>>
>> v2: the gpio stuff is currently only supported on
Skip v3 gpio element because the support is not there, and skip gpio
element on non-vlv because the sideband code is vlv specific.
v2: the gpio stuff is currently only supported on vlv (Ville)
Cc: drm-intel-fi...@lists.freedesktop.org
Fixes: 2a33d93486f2 ("drm/i915/bios: add support for MIPI sequ
On 01/11/2016 10:42 AM, john.c.harri...@intel.com wrote:
> From: Dave Gordon
>
> Keep a local copy of the request pointer in the _final() functions
> rather than dereferencing the params block repeatedly.
>
> v3: New patch in series.
>
> For: VIZ-1587
> Signed-off-by: Dave Gordon
> Signed-off-
On 01/11/2016 10:42 AM, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> Split the execbuffer() function in half. The first half collects and
> validates all the information required to process the batch buffer. It
> also does all the object pinning, relocations, active list management,
On Thu, Feb 04, 2016 at 06:52:47PM +0200, Jani Nikula wrote:
> Skip v3 gpio element because the support is not there, and skip gpio
> element on non-vlv because the sideband code is vlv specific.
>
> v2: the gpio stuff is currently only supported on vlv (Ville)
>
> Cc: drm-intel-fi...@lists.freed
On Thu, Feb 04, 2016 at 06:55:15PM +0200, Jani Nikula wrote:
> From: Deepak M
>
> Make the gpio read/write functions more generic iosf sideband read/write
> functions, taking the iosf port as argument.
>
> v2: rebase
> v3: rebase
> v4 by Jani: address Ville's review
> v5 by Jani: drop the PCI_DE
On 01/11/2016 10:42 AM, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> The scheduler decouples the submission of batch buffers to the driver
> with their submission to the hardware. This basically means splitting
> the execbuffer() function in half. This change rearranges some code
>
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 12:50:54PM +0200, Jani Nikula wrote:
>> Not needed.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Pushed patches 5-6 to dinq, thanks for the review.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 12:50:50PM +0200, Jani Nikula wrote:
>> Since sequence block v2 the second byte contains flags other than just
>> pull up/down. Don't pass arbitrary data to the sideband interface.
>>
>> The rest may or may not work for sequence
From: Deepak M
Make the gpio read/write functions more generic iosf sideband read/write
functions, taking the iosf port as argument.
v2: rebase
v3: rebase
v4 by Jani: address Ville's review
v5 by Jani: drop the PCI_DEVFN change (Ville)
Signed-off-by: Deepak M
Signed-off-by: Jani Nikula
---
d
Cool, thank you.
I dont believe I can easily reproduce it, it has only happend few times
(and i reboot my lappy >2 times per day).
//
Gustav
2016-02-03 14:25 GMT+01:00 Lukas Wunner :
> Hi,
>
> On Wed, Feb 03, 2016 at 09:17:37AM +, Chris Wilson wrote:
> > If the initialisation fails, we may b
Hello Joonas,
On Wed, Feb 03, 2016 at 04:24:28PM +0200, Joonas Lahtinen wrote:
> Use distinctive name for cpu_hotplug.dep_map to avoid the actual
> cpu_hotplug.lock appearing as cpu_hotplug.lock#2 in lockdep splats.
>
> Cc: Gautham R. Shenoy
> Cc: Rafael J. Wysocki
> Cc: Intel graphics driver c
Hi,
On Thu, Feb 04, 2016 at 04:05:04PM +, Chris Wilson wrote:
> On Thu, Feb 04, 2016 at 04:46:55PM +0100, Lukas Wunner wrote:
> > > + /* If the stolen region can be modified behind our backs upon suspend,
> > > + * then we cannot use it to store nonvolatile contents (i.e user data)
> > > + *
On Thu, Feb 04, 2016 at 06:21:23PM +0200, Jani Nikula wrote:
> On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> > On Thu, Feb 04, 2016 at 12:50:51PM +0200, Jani Nikula wrote:
> >> From: vkorjani
> >>
> >> New sequence element for i2c is been added in the
> >> mipi sequence block of the VBT. This patc
On Thu, 04 Feb 2016, Ville Syrjälä wrote:
> On Thu, Feb 04, 2016 at 12:50:51PM +0200, Jani Nikula wrote:
>> From: vkorjani
>>
>> New sequence element for i2c is been added in the
>> mipi sequence block of the VBT. This patch parses
>> and executes the i2c sequence.
>>
>> v2: Add i2c_put_adapter
On Thu, Feb 04, 2016 at 12:50:54PM +0200, Jani Nikula wrote:
> Not needed.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 --
> drivers/gpu/drm/i915/i915_reg.h | 1 -
> drivers/gpu/drm/i915/intel_sideband.c | 14
On Thu, Feb 04, 2016 at 10:43:21AM -0500, Lyude wrote:
> We accidentally point both cfgcr registers for the second shared DPLL to
> the same location in i915_reg.h. This results in a lot of hw pipe state
> mismatches whenever we try to do a modeset that requires allocating the
> DPLL to a CRTC:
>
On Thu, Feb 04, 2016 at 12:50:53PM +0200, Jani Nikula wrote:
> Make it easier to spot duplicates.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_reg.h | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/
On Thu, Feb 04, 2016 at 04:46:55PM +0100, Lukas Wunner wrote:
> > + /* If the stolen region can be modified behind our backs upon suspend,
> > +* then we cannot use it to store nonvolatile contents (i.e user data)
> > +* as it will be corrupted upon resume.
> > +*/
> > + dev_priv->m
On Thu, Feb 04, 2016 at 12:50:50PM +0200, Jani Nikula wrote:
> Since sequence block v2 the second byte contains flags other than just
> pull up/down. Don't pass arbitrary data to the sideband interface.
>
> The rest may or may not work for sequence block v2, but there should be
> no harm done.
>
Hi,
On Thu, Feb 04, 2016 at 03:00:11PM +0530, ankitprasad.r.sha...@intel.com wrote:
> From: Ankitprasad Sharma
>
> The BIOS RapidStartTechnology may corrupt the stolen memory across S3
> suspend due to unalarmed hibernation, in which case we will not be able
> to preserve the User data stored in
We accidentally point both cfgcr registers for the second shared DPLL to
the same location in i915_reg.h. This results in a lot of hw pipe state
mismatches whenever we try to do a modeset that requires allocating the
DPLL to a CRTC:
[drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in dpll_h
On Thu, Feb 04, 2016 at 12:50:49PM +0200, Jani Nikula wrote:
> Do not blindly trust the VBT data used for indexing.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 6 ++
> 1 file changed, 6 inserti
On Thu, Feb 04, 2016 at 12:50:55PM +0200, Jani Nikula wrote:
> From: Deepak M
>
> Make the gpio read/write functions more generic iosf sideband read/write
> functions, taking the iosf port as argument.
>
> v2: rebase
> v3: rebase
> v4 by Jani: address Ville's review
>
> Signed-off-by: Deepak M
On Thu, Feb 04, 2016 at 12:50:52PM +0200, Jani Nikula wrote:
> Skip v3 gpio element because the support is not there, and skip gpio
> element on non-vlv/chv because the sideband code is vlv/chv specific.
>
> Cc: drm-intel-fi...@lists.freedesktop.org
> Fixes: 2a33d93486f2 ("drm/i915/bios: add suppo
On Thu, Feb 04, 2016 at 12:50:51PM +0200, Jani Nikula wrote:
> From: vkorjani
>
> New sequence element for i2c is been added in the
> mipi sequence block of the VBT. This patch parses
> and executes the i2c sequence.
>
> v2: Add i2c_put_adapter call(Jani), rebase
>
> v3: corrected the retry loo
Hi,
On 3 February 2016 at 21:41, Eric Anholt wrote:
> + ret = ioctl(fd, DRM_IOCTL_VC4_WAIT_BO, &arg);
> + igt_assert(ret == -1 && errno == EINVAL);
A couple of nitpicks: all these should be either do_ioctl() for
success, or do_ioctl_err() for failure, which not only c
commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0
Author: Imre Deak
Date: Thu Jan 28 16:04:12 2016 +0200
drm/i915/bxt: update list of PCIIDs
Signed-off-by: Damien Lespiau
---
src/i915_pciids.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/i915_pciids.h
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, February 4, 2016 7:28 PM
> To: Deepak, M ; intel-gfx@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider
> form B0 stepping onwards
>
> On Thu,
On Thu, Feb 4, 2016 at 1:17 PM, Robert Bragg wrote:
>
> On Thu, Feb 4, 2016 at 1:42 AM, Emil Velikov
> wrote:
>
>> On 3 February 2016 at 18:39, Robert Bragg wrote:
>>
>>>
>>> > +};
>>> > +
>>> > +struct drm_i915_perf_open_param {
>>> > + /** CLOEXEC, NONBLOCK... */
>>> > + __u32 fla
On 04/02/16 13:09, Patchwork wrote:
== Summary ==
Series 3077v1 drm/i915: implement WaIncreaseDefaultTLBEntries
http://patchwork.freedesktop.org/api/1.0/series/3077/revisions/1/mbox/
Test gem_sync:
Subgroup basic-blt:
incomplete -> PASS (skl-i5k-2)
bdw-nuci7
suspend-read-crc-pipe will perform a suspend and then skip the test in case the
pipe is not present on the platform. Skip the test before doing the suspend.
Signed-off-by: Marius Vlad
---
tests/kms_pipe_crc_basic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/kms_pipe_crc_basic.c b
On Thu, 04 Feb 2016, "Deepak, M" wrote:
>> -Original Message-
>> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
>> Sent: Thursday, February 4, 2016 6:29 PM
>> To: Deepak, M ; intel-gfx@lists.freedesktop.org
>> Cc: Deepak, M
>> Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Additio
On Wed, 03 Feb 2016, Ramalingam C wrote:
> From: Uma Shankar
>
> During Charging OS mode, mipi display was blanking.This is
> because during driver load, though encoder, connector were
> active but crtc returned inactive. This caused sanitize
> function to disable the DSI panel. In AOS, this is f
On Thu, Feb 04, 2016 at 01:30:30PM +, Tvrtko Ursulin wrote:
> On 04/02/16 12:40, Chris Wilson wrote:
> >The most effective treatment I found is moving the retire-requests from
> >execbuf (which exists for similar reasons) to get-pages.
> >
> >http://cgit.freedesktop.org/~ickle/linux-2.6/commit/
On Thu, Feb 04, 2016 at 01:30:30PM +, Tvrtko Ursulin wrote:
>
>
> On 04/02/16 12:40, Chris Wilson wrote:
> >On Thu, Feb 04, 2016 at 12:25:24PM +, Tvrtko Ursulin wrote:
> >>From: Tvrtko Ursulin
> >>
> >>In execlists mode internal house keeping of the discarded
> >>requests (and so context
On Thu, 04 Feb 2016, Jani Nikula wrote:
> On Wed, 03 Feb 2016, Animesh Manna wrote:
>> Changes done:
>> - Added identifier for Mipi transcoder A and C.
>> - Added power domain identifier for newly added mipi trancoder.
>> - Initialized transcoder for mipi during compute config.
>
> Please separat
On 04/02/16 12:40, Chris Wilson wrote:
On Thu, Feb 04, 2016 at 12:25:24PM +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
In execlists mode internal house keeping of the discarded
requests (and so contexts and VMAs) relies solely on the retire
worker, which can be prevented from running by
== Summary ==
Series 3079v1 drm/i915: Mitigate retirement starvation a bit
http://patchwork.freedesktop.org/api/1.0/series/3079/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-dpms:
dmesg-warn -> PASS (skl-i5k-2)
bdw-nuci7total:161 pass:152 dwarn:0
On Thu, Feb 4, 2016 at 1:42 AM, Emil Velikov
wrote:
> On 3 February 2016 at 18:39, Robert Bragg wrote:
>
> > index a5524cc..68ca26e 100644
> > --- a/include/uapi/drm/i915_drm.h
> > +++ b/include/uapi/drm/i915_drm.h
>
> > @@ -1170,4 +1172,71 @@ struct drm_i915_gem_context_param {
> > __u6
On Wed, 03 Feb 2016, Ramalingam C wrote:
> From: Deepak M
>
> The bpp value which is used while calulating the txbyteclkhs values
> should be wrt the pixel format value. Currently bpp is coming
> from pipe config to calculate txbyteclkhs. Fix it in this patch.
>
> Signed-off-by: Deepak M
> Signe
== Summary ==
Series 3077v1 drm/i915: implement WaIncreaseDefaultTLBEntries
http://patchwork.freedesktop.org/api/1.0/series/3077/revisions/1/mbox/
Test gem_sync:
Subgroup basic-blt:
incomplete -> PASS (skl-i5k-2)
bdw-nuci7total:161 pass:152 dwarn:0 dfail
> -Original Message-
> From: Jani Nikula [mailto:jani.nik...@linux.intel.com]
> Sent: Thursday, February 4, 2016 6:29 PM
> To: Deepak, M ; intel-gfx@lists.freedesktop.org
> Cc: Deepak, M
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/bxt: Additional MIPI clock divider
> form B0 stepping onw
On Wed, 03 Feb 2016, Deepak M wrote:
> The MIPI clock calculations for the addtional clock
> are revised from B0 stepping onwards, the bit definitions
> have changed compared to old stepping.
>
> v2: Fixing compilation warning.
Why did you move and rename everything when it was not needed?
BR,
J
On Wed, 03 Feb 2016, Animesh Manna wrote:
> Changes done:
> - Added identifier for Mipi transcoder A and C.
> - Added power domain identifier for newly added mipi trancoder.
> - Initialized transcoder for mipi during compute config.
Please separate the power domain control from the addition of th
== Summary ==
Series 3075v1 drm/i915/dsi: i2c/gpio
http://patchwork.freedesktop.org/api/1.0/series/3075/revisions/1/mbox/
Test gem_sync:
Subgroup basic-blt:
incomplete -> PASS (skl-i5k-2)
bdw-nuci7total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9
bd
On Thu, Feb 04, 2016 at 12:25:24PM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> In execlists mode internal house keeping of the discarded
> requests (and so contexts and VMAs) relies solely on the retire
> worker, which can be prevented from running by just being
> unlucky when busy cl
On Wed, 03 Feb 2016, Jani Nikula wrote:
> On Fri, 29 Jan 2016, Chris Wilson wrote:
>> commit 033908aed5a596f6202c848c6bbc8a40fb1a8490
>> Author: Dave Gordon
>> Date: Thu Dec 10 18:51:23 2015 +
>>
>> drm/i915: mark GEM object pages dirty when mapped & written by the CPU
>>
>> introduced
On to, 2016-02-04 at 15:39 +0530, Kamble, Sagar A wrote:
> Ok. I related my change to below definition:
>
> #define GT_INTERVAL_FROM_US(dev_priv, us) (IS_GEN9(dev_priv) ? \
> (IS_BROXTON(dev_priv) ? \
> INTERVAL_0_833_US(us) : \
>
On Thu, 04 Feb 2016, Shubhangi Shrivastava
wrote:
> This patch sets the invert bit for hpd detection for each port
> based on vbt configuration. since each AOB can be designed to
> depend on invert bit or not, it is expected if an AOB requires
> invert bit, the user will set respective bit in VBT
From: Tvrtko Ursulin
In execlists mode internal house keeping of the discarded
requests (and so contexts and VMAs) relies solely on the retire
worker, which can be prevented from running by just being
unlucky when busy clients are hammering on the big lock.
Prime example is the gem_close_race IG
Added extended wildcard support when specifying --run-subtest.
Wildcard format is as specified in rfc3977 and the uwildmat() implementation
is taken from libinn.
See https://tools.ietf.org/html/rfc3977#section-4 for a description of
allowed wildcard expressions.
v2: Use comma as list separator (V
Co-Author : Marius Vlad
So far we have had only two commit styles, COMMIT_LEGACY
and COMMIT_UNIVERSAL. This patch adds another commit style
COMMIT_ATOMIC which makes use of drmModeAtomicCommit()
v2 : (Marius)
i)Set CRTC_ID to zero while disabling plane
ii)Modified the log message
From: Tim Gore
WaIncreaseDefaultTLBEntries increases the number of TLB
entries available for GPGPU workloads and gives significant
( > 10% ) performance gain for some OCL benchmarks.
Put this in a new function that can be a place for
workarounds that are GT related but not required per ring.
This
I really like the thought of having this functionality in i-g-t,
especially if combined with my patches that allows for categorising
subtests (I'll submit a new version of those patches soon, since they
never got merged last time around). I'll refrain from bikeshedding on
the syntax.
In the longer
Hi,
On to, 2016-01-28 at 18:21 +0800, Zhi Wang wrote:
> From: Bing Niu
>
> This patch introduces host graphics memory ballon when GVT-g is enabled.
>
> As under GVT-g, i915 only owned limited graphics resources, others are
> managed by GVT-g resource allocator and kept for other vGPUs.
>
> For
Hi,
On ke, 2016-02-03 at 14:01 +0800, Zhi Wang wrote:
> Hi Joonas:
> Thanks you very much! We're very excited for receiving your advice
> and continue to be open to any comments. :)
>
> I'm supposed that we should make the agreements on i915 host change at
> the very beginning, as I'm conc
Hi All,
Do we support NV12 format with universal plane on Skylake by now? Thanks.
-James
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From: vkorjani
New sequence element for i2c is been added in the
mipi sequence block of the VBT. This patch parses
and executes the i2c sequence.
v2: Add i2c_put_adapter call(Jani), rebase
v3: corrected the retry loop(Jani), rebase
v4 by Jani:
- don't put the adapter if get fails
- print an
Make it easier to spot duplicates.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c0bd691b41f8..f3b4b19198b9 100644
--- a/drivers
Do not blindly trust the VBT data used for indexing.
Cc: sta...@vger.kernel.org
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
b/drivers/gpu/drm/i915/intel_dsi_panel_v
Not needed.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 2 --
drivers/gpu/drm/i915/i915_reg.h | 1 -
drivers/gpu/drm/i915/intel_sideband.c | 14 --
3 files changed, 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915
From: Deepak M
The generic gpio is sequence is parsed from the VBT and the
GPIO table is updated with the North core, South core and
SUS core elements.
v2: Move changes in sideband.c file to new patch(Jani), rebase
v3: Moved the Macro`s to intel_dsi_panel_vbt.c (Jani)
v3 by Jani
- rebase on pre
Skip v3 gpio element because the support is not there, and skip gpio
element on non-vlv/chv because the sideband code is vlv/chv specific.
Cc: drm-intel-fi...@lists.freedesktop.org
Fixes: 2a33d93486f2 ("drm/i915/bios: add support for MIPI sequence block v3")
Signed-off-by: Jani Nikula
---
driver
Hi Ankitprasad,
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on v4.5-rc2 next-20160204]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/ankitprasad-r-sharma
From: Deepak M
Make the gpio read/write functions more generic iosf sideband read/write
functions, taking the iosf port as argument.
v2: rebase
v3: rebase
v4 by Jani: address Ville's review
Signed-off-by: Deepak M
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h| 4
Since sequence block v2 the second byte contains flags other than just
pull up/down. Don't pass arbitrary data to the sideband interface.
The rest may or may not work for sequence block v2, but there should be
no harm done.
Cc: sta...@vger.kernel.org
Signed-off-by: Jani Nikula
---
drivers/gpu/d
Sme fixes to i2c/gpio elements in dsi. I think patches 1-4 are needed
for bxt at this time. The remaining patches don't really help, since the
sideband code is vlv/chv specific anyway.
BR,
Jani.
Deepak M (2):
drm/i915: Extend gpio read/write to other cores
drm/i915/dsi: Added the generic gpio
Op 03-02-16 om 18:39 schreef Ville Syrjälä:
> On Wed, Feb 03, 2016 at 06:23:13PM +0100, Maarten Lankhorst wrote:
>> Op 03-02-16 om 17:07 schreef Ville Syrjälä:
>>> On Wed, Feb 03, 2016 at 04:53:24PM +0100, Maarten Lankhorst wrote:
This can be derived from the atomic state in pre_plane_update,
Ok. I related my change to below definition:
#define GT_INTERVAL_FROM_US(dev_priv, us) (IS_GEN9(dev_priv) ? \
(IS_BROXTON(dev_priv) ? \
INTERVAL_0_833_US(us) : \
INTERVAL_1_33_US(us)) : \
From: Ankitprasad Sharma
This patch adds support for clearing buffer objects via CPU/GTT. This
is particularly useful for clearing out the non shmem backed objects.
Currently intend to use this only for buffers allocated from stolen
region.
v2: Added kernel doc for i915_gem_clear_object(), corre
From: Ankitprasad Sharma
Propagating correct error codes to userspace by using ERR_PTR and
PTR_ERR macros for stolen memory based object allocation. We generally
return -ENOMEM to the user whenever there is a failure in object
allocation. This patch helps user to identify the correct reason for t
From: Ankitprasad Sharma
This patch adds support for extending the pread/pwrite functionality
for objects not backed by shmem. The access will be made through
gtt interface. This will cover objects backed by stolen memory as well
as other non-shmem backed objects.
v2: Drop locks around slow_user
From: Ankitprasad Sharma
Extend the drm_i915_gem_create structure to add support for
creating Stolen memory backed objects. Added a new flag through
which user can specify the preference to allocate the object from
stolen memory, which if set, an attempt will be made to allocate
the object from s
From: Ankitprasad Sharma
In pwrite_fast, map an object page by page if obj_ggtt_pin fails. First,
we try a nonblocking pin for the whole object (since that is fastest if
reused), then failing that we try to grab one page in the mappable
aperture. It also allows us to handle objects larger than th
From: Chris Wilson
This utility function is a companion to i915_gem_object_get_page() that
uses the same cached iterator for the scatterlist to perform fast
sequential lookup of the dma address associated with any page within the
object.
Signed-off-by: Chris Wilson
Signed-off-by: Ankitprasad Sh
From: Ankitprasad Sharma
This patch series adds support for creating/using Stolen memory backed
objects.
Despite being a unified memory architecture (UMA) some bits of memory
are more equal than others. In particular we have the thorny issue of
stolen memory, memory stolen from the system by the
From: Ankitprasad Sharma
The BIOS RapidStartTechnology may corrupt the stolen memory across S3
suspend due to unalarmed hibernation, in which case we will not be able
to preserve the User data stored in the stolen region. Hence this patch
tries to identify presence of the RST device on the ACPI b
From: Chris Wilson
Ville reminded us that stolen memory is not preserved across
hibernation, and a result of this was that context objects now being
allocated from stolen were being corrupted on S4 and promptly hanging
the GPU on resume.
We want to utilise stolen for as much as possible (nothing
From: Chris Wilson
Introduced a new vm specfic callback insert_page() to program a single pte in
ggtt or ppgtt. This allows us to map a single page in to the mappable aperture
space. This can be iterated over to access the whole object by using space as
meagre as page size.
v2: Added low level r
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