[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr

2016-04-24 Thread Patchwork
== Series Details == Series: series starting with [01/19] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr URL : https://patchwork.freedesktop.org/series/6017/ State : warning == Summary == Series 6017v1 Series without cover letter http://patchwork.freedesktop.org

[Intel-gfx] [PATCH 01/19] drm/core: Add drm_accurate_vblank_count, v5.

2016-04-24 Thread Maarten Lankhorst
This function is useful for gen2 intel devices which have no frame counter, but need a way to determine the current vblank count without racing with the vblank interrupt handler. intel_pipe_update_start checks if no vblank interrupt will occur during vblank evasion, but cannot check whether the vb

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Render decompression support for Gen9 and above

2016-04-24 Thread Kannan, Vandana
> -Original Message- > From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] > Sent: Friday, March 18, 2016 10:42 PM > To: Kannan, Vandana > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Render decompression > support for Gen9 and above [...]

Re: [Intel-gfx] [PATCH 01/19] drm/core: Add drm_accurate_vblank_count, v4.

2016-04-24 Thread Mario Kleiner
Sorry for the late review, but see below... On 04/19/2016 09:52 AM, Maarten Lankhorst wrote: This function is useful for gen2 intel devices which have no frame counter, but need a way to determine the current vblank count without racing with the vblank interrupt handler. intel_pipe_update_start

[Intel-gfx] [PATCH v3 10/21] drm/i915: Remove early l3-remap

2016-04-24 Thread Chris Wilson
Since we do the l3-remap on context switch, we can remove the redundant early call to set the mapping prior to performing the first context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i91

[Intel-gfx] [PATCH v3 03/21] io-mapping: Specify mapping size for io_mapping_map_wc()

2016-04-24 Thread Chris Wilson
The ioremap() hidden behind the io_mapping_map_wc() convenience helper can be used for remapping multiple pages. Extend the helper so that future callers can use it for larger ranges. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Daniel Vetter Cc: Jani Nikula Cc: David Airlie Cc: Yishai

[Intel-gfx] [PATCH v3 15/21] drm/i915: Move context initialisation to first-use

2016-04-24 Thread Chris Wilson
Instead of allocating a new request when allocating a context, use the request that initiated the allocation to emit the context initialisation. This serves two purposes, it makes the initialisation atomic with first use (simplifying scheduling and our own error handling). Secondly, it enables us t

[Intel-gfx] [PATCH v3 11/21] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use

2016-04-24 Thread Chris Wilson
The code to switch_mm() is already handled by i915_switch_context(), the only difference required to setup the aliasing ppgtt is that we need to emit te switch_mm() on the first context, i.e. when transitioning from engine->last_context == NULL. This allows us to defer the initialisation of the GPU

[Intel-gfx] [PATCH v3 18/21] drm/i915: Track the previous pinned context inside the request

2016-04-24 Thread Chris Wilson
As the contexts are accessed by the hardware until the switch is completed to a new context, the hardware may still be writing to the context object after the breadcrumb is visible. We must not unpin/unbind/prune that object whilst still active and so we keep the previous context pinned until the f

[Intel-gfx] [PATCH v3 21/21] drm/i915: Unify GPU resets upon shutdown

2016-04-24 Thread Chris Wilson
Both execlists and legacy need to reset the context (and mode) of the GPU before we lose control of the system. By resetting the GPU, we revert back to default settings. This simplifies the life of any subsequent driver (in particular for virtualized setups) as it does not then have to try and reco

[Intel-gfx] [PATCH v3 16/21] drm/i915: Move the magical deferred context allocation into the request

2016-04-24 Thread Chris Wilson
We can hide more details of execlists from higher level code by removing the explicit call to create an execlist context from execbuffer and into its first use by execlists. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 dri

[Intel-gfx] [PATCH v3 07/21] drm/i915: Mark the current context as lost on suspend

2016-04-24 Thread Chris Wilson
In order to force a reload of the context image upon resume, we first need to mark its absence on suspend. Currently we are failing to restore the golden context state and any context w/a to the default context after resume. One oversight corrected, is that we had forgotten to reapply the L3 remap

[Intel-gfx] [PATCH v3 17/21] drm/i915: Move releasing of the GEM request from free to retire/cancel

2016-04-24 Thread Chris Wilson
If we move the release of the GEM request (i.e. decoupling it from the various lists used for client and context tracking) after it is complete (either by the GPU retiring the request, or by the caller cancelling the request), we can remove the requirement that the final unreference of the GEM requ

[Intel-gfx] [PATCH v3 12/21] drm/i915: Assign every HW context a unique ID

2016-04-24 Thread Chris Wilson
The hardware tracks contexts and expects all live contexts (those active on the hardware) to have a unique identifier. This is used by the hardware to assign pagefaults and the like to a particular context. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_de

[Intel-gfx] [PATCH v3 09/21] drm/i915: Consolidate L3 remapping LRI

2016-04-24 Thread Chris Wilson
We can use a single MI_LOAD_REGISTER_IMM command packet to write all the L3 remapping registers, shrinking the number of bytes required to emit the context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 16 ++

[Intel-gfx] [PATCH v3 08/21] drm/i915: L3 cache remapping is part of context switching

2016-04-24 Thread Chris Wilson
Move the i915_gem_l3_remap function such that it next to the context switching, which is where we perform the L3 remap. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 31 --- drivers/gpu/drm/i

[Intel-gfx] [PATCH v3 19/21] drm/i915: Store LRC hardware id in the request

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin This way in the following patch we can disconnect requests from contexts. Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 3 ++- 2 files changed, 4 inserti

[Intel-gfx] [PATCH v3 20/21] drm/i915: Stop tracking execlists retired requests

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin With the previous patch having extended the pinned lifetime of contexts by referencing the previous context from the current request until the latter is retired (completed by the GPU), we can now remove usage of execlist retired queue entirely. This is because the above now

[Intel-gfx] [PATCH v3 13/21] drm/i915: Replace the pinned context address with its unique ID

2016-04-24 Thread Chris Wilson
Rather than reuse the current location of the context in the global GTT for its hardware identifier, use the context's unique ID assigned to it for its whole lifetime. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +--- drivers/gpu/

[Intel-gfx] [PATCH v3 02/21] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr

2016-04-24 Thread Chris Wilson
When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [PATCH v3 04/21] drm/i915: Introduce i915_vm_to_ggtt()

2016-04-24 Thread Chris Wilson
In a couple of places, we have an i915_address_space that we know is really an i915_ggtt that we want to use. Create an inline helper to convert from the i915_address_space subclass into its container. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtin

[Intel-gfx] [PATCH v3 14/21] drm/i915: Refactor execlists default context pinning

2016-04-24 Thread Chris Wilson
Refactor pinning and unpinning of contexts, such that the default context for an engine is pinned during initialisation and unpinned during teardown (pinning of the context handles the reference counting). Thus we can eliminate the special case handling of the default context that was required to m

[Intel-gfx] [PATCH v3 06/21] drm/i915: Use i915_vma_pin_iomap on the ringbuffer object

2016-04-24 Thread Chris Wilson
Similarly to i915_gem_object_pin_map on LLC platforms, we can use the new VMA based io mapping on !LLC to amoritize the cost of ringbuffer pinning and unpinning. Signed-off-by: Tvrtko Ursulin Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v3 01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Chris Wilson
When releasing the intel_fbdev, we should unpin the framebuffer that we pinned during construction. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_fbdev.c | 7 ++- 3 files changed, 8 insert

[Intel-gfx] [PATCH v3 05/21] drm/i915: Move ioremap_wc tracking onto VMA

2016-04-24 Thread Chris Wilson
By tracking the iomapping on the VMA itself, we can share that area between multiple users. Also by only revoking the iomapping upon unbinding from the mappable portion of the GGTT, we can keep that iomap across multiple invocations (e.g. execlists context pinning). Note that by moving the iounnma

[Intel-gfx] ✓ Fi.CI.BAT: success for Enable Gen 7 Observation Architecture (rev3)

2016-04-24 Thread Patchwork
== Series Details == Series: Enable Gen 7 Observation Architecture (rev3) URL : https://patchwork.freedesktop.org/series/3024/ State : success == Summary == Series 3024v3 Enable Gen 7 Observation Architecture http://patchwork.freedesktop.org/api/1.0/series/3024/revisions/3/mbox/ byt-nuc

[Intel-gfx] ✓ Fi.CI.BAT: success for Support for creating/using Stolen memory backed objects (rev13)

2016-04-24 Thread Patchwork
== Series Details == Series: Support for creating/using Stolen memory backed objects (rev13) URL : https://patchwork.freedesktop.org/series/659/ State : success == Summary == Series 659v13 Support for creating/using Stolen memory backed objects http://patchwork.freedesktop.org/api/1.0/series/6

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Cache DisplayPort link signal levels

2016-04-24 Thread Patchwork
== Series Details == Series: drm/i915: Cache DisplayPort link signal levels URL : https://patchwork.freedesktop.org/series/5973/ State : success == Summary == Series 5973v1 drm/i915: Cache DisplayPort link signal levels http://patchwork.freedesktop.org/api/1.0/series/5973/revisions/1/mbox/ b

[Intel-gfx] ✓ Fi.CI.BAT: success for lib: Always NUL terminate ucs2_as_utf8

2016-04-24 Thread Patchwork
== Series Details == Series: lib: Always NUL terminate ucs2_as_utf8 URL : https://patchwork.freedesktop.org/series/5969/ State : success == Summary == Series 5969v1 lib: Always NUL terminate ucs2_as_utf8 http://patchwork.freedesktop.org/api/1.0/series/5969/revisions/1/mbox/ byt-nuc

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Chris Wilson
On Sun, Apr 24, 2016 at 11:51:25AM -, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,01/21] drm/i915/fbdev: Call > intel_unpin_fb_obj() on release > URL : https://patchwork.freedesktop.org/series/6215/ > State : failure > > == Summary == > > Series 6215v1 Ser

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Patchwork
== Series Details == Series: series starting with [v2,01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release URL : https://patchwork.freedesktop.org/series/6215/ State : failure == Summary == Series 6215v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/6215/r

[Intel-gfx] ✗ Fi.CI.BAT: failure for mfd: intel_soc_pmic_core: Terminate panel control GPIO lookup table correctly

2016-04-24 Thread Patchwork
== Series Details == Series: mfd: intel_soc_pmic_core: Terminate panel control GPIO lookup table correctly URL : https://patchwork.freedesktop.org/series/6186/ State : failure == Summary == Series 6186v1 mfd: intel_soc_pmic_core: Terminate panel control GPIO lookup table correctly http://pat

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915: Macros to convert PM time interval values to microseconds

2016-04-24 Thread Chris Wilson
On Sun, Apr 24, 2016 at 09:53:27AM -, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915: Macros to convert PM time > interval values to microseconds > URL : https://patchwork.freedesktop.org/series/6184/ > State : warning > > == Summary == > > Series

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915/guc: add enable_guc_loading parameter

2016-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/guc: add enable_guc_loading parameter URL : https://patchwork.freedesktop.org/series/6185/ State : warning == Summary == Series 6185v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/6185/revisions/1/

Re: [Intel-gfx] [PATCH v2 13/16] drm/i915/gen9: Propagate watermark calculation failures up the call chain

2016-04-24 Thread Maarten Lankhorst
Op 22-04-16 om 01:20 schreef Matt Roper: > On Thu, Apr 21, 2016 at 02:19:33PM +0200, Maarten Lankhorst wrote: >> Op 20-04-16 om 04:26 schreef Matt Roper: >>> Once we move watermark calculation to the atomic check phase, we'll want >>> to start rejecting display configurations that exceed out waterm

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915: Macros to convert PM time interval values to microseconds

2016-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Macros to convert PM time interval values to microseconds URL : https://patchwork.freedesktop.org/series/6184/ State : warning == Summary == Series 6184v1 Series without cover letter http://patchwork.freedesktop.org/api/1.0/ser

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: rename i915_gem_alloc_object() to i915_gem_object_create()

2016-04-24 Thread Patchwork
== Series Details == Series: drm/i915: rename i915_gem_alloc_object() to i915_gem_object_create() URL : https://patchwork.freedesktop.org/series/6183/ State : warning == Summary == Series 6183v1 drm/i915: rename i915_gem_alloc_object() to i915_gem_object_create() http://patchwork.freedesktop.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Warn there are any unfreed contexts when we shutdown

2016-04-24 Thread Patchwork
== Series Details == Series: drm/i915: Warn there are any unfreed contexts when we shutdown URL : https://patchwork.freedesktop.org/series/6157/ State : success == Summary == Series 6157v1 drm/i915: Warn there are any unfreed contexts when we shutdown http://patchwork.freedesktop.org/api/1.0/s

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Canonicalize stolen memory calculations (rev2)

2016-04-24 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915: Canonicalize stolen memory calculations (rev2) URL : https://patchwork.freedesktop.org/series/6153/ State : warning == Summary == Series 6153v2 Series without cover letter http://patchwork.freedesktop.org/api/1.0/series/6153/re

Re: [Intel-gfx] [PATCH 01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Chris Wilson
send-email died on the last patch, grrr. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v2 19/21] drm/i915: Store LRC hardware id in the request

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin This way in the following patch we can disconnect requests from contexts. Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 3 ++- 2 files changed, 4 inserti

[Intel-gfx] [PATCH v2 06/21] drm/i915: Use i915_vma_pin_iomap on the ringbuffer object

2016-04-24 Thread Chris Wilson
Similarly to i915_gem_object_pin_map on LLC platforms, we can use the new VMA based io mapping on !LLC to amoritize the cost of ringbuffer pinning and unpinning. Signed-off-by: Tvrtko Ursulin Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH v2 01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Chris Wilson
When releasing the intel_fbdev, we should unpin the framebuffer that we pinned during construction. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_fbdev.c | 7 ++- 3 files changed, 8 insert

[Intel-gfx] [PATCH v2 15/21] drm/i915: Move context initialisation to first-use

2016-04-24 Thread Chris Wilson
Instead of allocating a new request when allocating a context, use the request that initiated the allocation to emit the context initialisation. This serves two purposes, it makes the initialisation atomic with first use (simplifying scheduling and our own error handling). Secondly, it enables us t

[Intel-gfx] [PATCH v2 05/21] drm/i915: Move ioremap_wc tracking onto VMA

2016-04-24 Thread Chris Wilson
By tracking the iomapping on the VMA itself, we can share that area between multiple users. Also by only revoking the iomapping upon unbinding from the mappable portion of the GGTT, we can keep that iomap across multiple invocations (e.g. execlists context pinning). Note that by moving the iounnma

[Intel-gfx] [PATCH v2 21/21] drm/i915: Unify GPU resets upon shutdown

2016-04-24 Thread Chris Wilson
As we initialise engines, then contexts, ideally we want to unwind in the opposite order: contexts then engines. Until now, the engines and contexts were tightly coupled (the engine owned the default context) preventing the "natural ordering" during shutdown. Now that execlists merely holds a refer

[Intel-gfx] [PATCH v2 07/21] drm/i915: Mark the current context as lost on suspend

2016-04-24 Thread Chris Wilson
In order to force a reload of the context image upon resume, we first need to mark its absence on suspend. Currently we are failing to restore the golden context state and any context w/a to the default context after resume. One oversight corrected, is that we had forgotten to reapply the L3 remap

[Intel-gfx] [PATCH v2 18/21] drm/i915: Track the previous pinned context inside the request

2016-04-24 Thread Chris Wilson
As the contexts are accessed by the hardware until the switch is completed to a new context, the hardware may still be writing to the context object after the breadcrumb is visible. We must not unpin/unbind/prune that object whilst still active and so we keep the previous context pinned until the f

[Intel-gfx] [PATCH v2 03/21] io-mapping: Specify mapping size for io_mapping_map_wc()

2016-04-24 Thread Chris Wilson
The ioremap() hidden behind the io_mapping_map_wc() convenience helper can be used for remapping multiple pages. Extend the helper so that future callers can use it for larger ranges. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Daniel Vetter Cc: Jani Nikula Cc: David Airlie Cc: Yishai

[Intel-gfx] [PATCH v2 12/21] drm/i915: Assign every HW context a unique ID

2016-04-24 Thread Chris Wilson
The hardware tracks contexts and expects all live contexts (those active on the hardware) to have a unique identifier. This is used by the hardware to assign pagefaults and the like to a particular context. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_de

[Intel-gfx] [PATCH v2 09/21] drm/i915: Consolidate L3 remapping LRI

2016-04-24 Thread Chris Wilson
We can use a single MI_LOAD_REGISTER_IMM command packet to write all the L3 remapping registers, shrinking the number of bytes required to emit the context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 16 ++

[Intel-gfx] [PATCH v2 13/21] drm/i915: Replace the pinned context address with its unique ID

2016-04-24 Thread Chris Wilson
Rather than reuse the current location of the context in the global GTT for its hardware identifier, use the context's unique ID assigned to it for its whole lifetime. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +--- drivers/gpu/

[Intel-gfx] [PATCH v2 11/21] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use

2016-04-24 Thread Chris Wilson
The code to switch_mm() is already handled by i915_switch_context(), the only difference required to setup the aliasing ppgtt is that we need to emit te switch_mm() on the first context, i.e. when transitioning from engine->last_context == NULL. This allows us to defer the initialisation of the GPU

[Intel-gfx] [PATCH v2 08/21] drm/i915: L3 cache remapping is part of context switching

2016-04-24 Thread Chris Wilson
Move the i915_gem_l3_remap function such that it next to the context switching, which is where we perform the L3 remap. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 31 --- drivers/gpu/drm/i

[Intel-gfx] [PATCH v2 02/21] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr

2016-04-24 Thread Chris Wilson
When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [PATCH v2 14/21] drm/i915: Refactor execlists default context pinning

2016-04-24 Thread Chris Wilson
Refactor pinning and unpinning of contexts, such that the default context for an engine is pinned during initialisation and unpinned during teardown (pinning of the context handles the reference counting). Thus we can eliminate the special case handling of the default context that was required to m

[Intel-gfx] [PATCH v2 17/21] drm/i915: Move releasing of the GEM request from free to retire/cancel

2016-04-24 Thread Chris Wilson
If we move the release of the GEM request (i.e. decoupling it from the various lists used for client and context tracking) after it is complete (either by the GPU retiring the request, or by the caller cancelling the request), we can remove the requirement that the final unreference of the GEM requ

[Intel-gfx] [PATCH v2 20/21] drm/i915: Stop tracking execlists retired requests

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin With the previous patch having extended the pinned lifetime of contexts by referencing the previous context from the current request until the latter is retired (completed by the GPU), we can now remove usage of execlist retired queue entirely. This is because the above now

[Intel-gfx] [PATCH v2 04/21] drm/i915: Introduce i915_vm_to_ggtt()

2016-04-24 Thread Chris Wilson
In a couple of places, we have an i915_address_space that we know is really an i915_ggtt that we want to use. Create an inline helper to convert from the i915_address_space subclass into its container. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtin

[Intel-gfx] [PATCH v2 16/21] drm/i915: Move the magical deferred context allocation into the request

2016-04-24 Thread Chris Wilson
We can hide more details of execlists from higher level code by removing the explicit call to create an execlist context from execbuffer and into its first use by execlists. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 dri

[Intel-gfx] [PATCH v2 10/21] drm/i915: Remove early l3-remap

2016-04-24 Thread Chris Wilson
Since we do the l3-remap on context switch, we can remove the redundant early call to set the mapping prior to performing the first context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i91

[Intel-gfx] [PATCH 17/21] drm/i915: Move releasing of the GEM request from free to retire/cancel

2016-04-24 Thread Chris Wilson
If we move the release of the GEM request (i.e. decoupling it from the various lists used for client and context tracking) after it is complete (either by the GPU retiring the request, or by the caller cancelling the request), we can remove the requirement that the final unreference of the GEM requ

[Intel-gfx] [PATCH 16/21] drm/i915: Move the magical deferred context allocation into the request

2016-04-24 Thread Chris Wilson
We can hide more details of execlists from higher level code by removing the explicit call to create an execlist context from execbuffer and into its first use by execlists. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 dri

[Intel-gfx] [PATCH 15/21] drm/i915: Move context initialisation to first-use

2016-04-24 Thread Chris Wilson
Instead of allocating a new request when allocating a context, use the request that initiated the allocation to emit the context initialisation. This serves two purposes, it makes the initialisation atomic with first use (simplifying scheduling and our own error handling). Secondly, it enables us t

[Intel-gfx] [PATCH 18/21] drm/i915: Track the previous pinned context inside the request

2016-04-24 Thread Chris Wilson
As the contexts are accessed by the hardware until the switch is completed to a new context, the hardware may still be writing to the context object after the breadcrumb is visible. We must not unpin/unbind/prune that object whilst still active and so we keep the previous context pinned until the f

[Intel-gfx] [PATCH 20/21] drm/i915: Stop tracking execlists retired requests

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin With the previous patch having extended the pinned lifetime of contexts by referencing the previous context from the current request until the latter is retired (completed by the GPU), we can now remove usage of execlist retired queue entirely. This is because the above now

[Intel-gfx] [PATCH 14/21] drm/i915: Refactor execlists default context pinning

2016-04-24 Thread Chris Wilson
Refactor pinning and unpinning of contexts, such that the default context for an engine is pinned during initialisation and unpinned during teardown (pinning of the context handles the reference counting). Thus we can eliminate the special case handling of the default context that was required to m

[Intel-gfx] [PATCH 19/21] drm/i915: Store LRC hardware id in the request

2016-04-24 Thread Chris Wilson
From: Tvrtko Ursulin This way in the following patch we can disconnect requests from contexts. Signed-off-by: Tvrtko Ursulin Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_lrc.c | 3 ++- 2 files changed, 4 inserti

[Intel-gfx] [PATCH 03/21] io-mapping: Specify mapping size for io_mapping_map_wc()

2016-04-24 Thread Chris Wilson
The ioremap() hidden behind the io_mapping_map_wc() convenience helper can be used for remapping multiple pages. Extend the helper so that future callers can use it for larger ranges. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Daniel Vetter Cc: Jani Nikula Cc: David Airlie Cc: Yishai

[Intel-gfx] [PATCH 10/21] drm/i915: Remove early l3-remap

2016-04-24 Thread Chris Wilson
Since we do the l3-remap on context switch, we can remove the redundant early call to set the mapping prior to performing the first context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i91

[Intel-gfx] [PATCH 05/21] drm/i915: Move ioremap_wc tracking onto VMA

2016-04-24 Thread Chris Wilson
By tracking the iomapping on the VMA itself, we can share that area between multiple users. Also by only revoking the iomapping upon unbinding from the mappable portion of the GGTT, we can keep that iomap across multiple invocations (e.g. execlists context pinning). Note that by moving the iounnma

[Intel-gfx] [PATCH 07/21] drm/i915: Mark the current context as lost on suspend

2016-04-24 Thread Chris Wilson
In order to force a reload of the context image upon resume, we first need to mark its absence on suspend. Currently we are failing to restore the golden context state and any context w/a to the default context after resume. One oversight corrected, is that we had forgotten to reapply the L3 remap

[Intel-gfx] [PATCH 06/21] drm/i915: Use i915_vma_pin_iomap on the ringbuffer object

2016-04-24 Thread Chris Wilson
Similarly to i915_gem_object_pin_map on LLC platforms, we can use the new VMA based io mapping on !LLC to amoritize the cost of ringbuffer pinning and unpinning. Signed-off-by: Tvrtko Ursulin Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 01/21] drm/i915/fbdev: Call intel_unpin_fb_obj() on release

2016-04-24 Thread Chris Wilson
When releasing the intel_fbdev, we should unpin the framebuffer that we pinned during construction. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_fbdev.c | 7 ++- 3 files changed, 8 insert

[Intel-gfx] [PATCH 11/21] drm/i915: Rearrange switch_context to load the aliasing ppgtt on first use

2016-04-24 Thread Chris Wilson
The code to switch_mm() is already handled by i915_switch_context(), the only difference required to setup the aliasing ppgtt is that we need to emit te switch_mm() on the first context, i.e. when transitioning from engine->last_context == NULL. This allows us to defer the initialisation of the GPU

[Intel-gfx] [PATCH 12/21] drm/i915: Assign every HW context a unique ID

2016-04-24 Thread Chris Wilson
The hardware tracks contexts and expects all live contexts (those active on the hardware) to have a unique identifier. This is used by the hardware to assign pagefaults and the like to a particular context. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_de

[Intel-gfx] [PATCH 13/21] drm/i915: Replace the pinned context address with its unique ID

2016-04-24 Thread Chris Wilson
Rather than reuse the current location of the context in the global GTT for its hardware identifier, use the context's unique ID assigned to it for its whole lifetime. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_debugfs.c | 12 +--- drivers/gpu/

[Intel-gfx] [PATCH 02/21] drm/i915/overlay: Replace i915_gem_obj_ggtt_offset() with the known flip_addr

2016-04-24 Thread Chris Wilson
When setting up the overlay page, we pin it into the GGTT (when using virtual addresses) and store the offset as overlay->flip_addr. Rather than doing a lookup of the GGTT address everytime, we can use the known address instead. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko

[Intel-gfx] [PATCH 09/21] drm/i915: Consolidate L3 remapping LRI

2016-04-24 Thread Chris Wilson
We can use a single MI_LOAD_REGISTER_IMM command packet to write all the L3 remapping registers, shrinking the number of bytes required to emit the context switch. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem_context.c | 16 ++

[Intel-gfx] [PATCH 08/21] drm/i915: L3 cache remapping is part of context switching

2016-04-24 Thread Chris Wilson
Move the i915_gem_l3_remap function such that it next to the context switching, which is where we perform the L3 remap. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_gem.c | 31 --- drivers/gpu/drm/i

[Intel-gfx] [PATCH 04/21] drm/i915: Introduce i915_vm_to_ggtt()

2016-04-24 Thread Chris Wilson
In a couple of places, we have an i915_address_space that we know is really an i915_ggtt that we want to use. Create an inline helper to convert from the i915_address_space subclass into its container. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Tvrtko Ursulin Reviewed-by: Joonas Lahtin