== Series Details ==
Series: drm/i915: Rework sdvo proxy i2c locking
URL : https://patchwork.freedesktop.org/series/27907/
State : success
== Summary ==
Series 27907v1 drm/i915: Rework sdvo proxy i2c locking
https://patchwork.freedesktop.org/api/1.0/series/27907/revisions/1/mbox/
Test kms_pip
Hi all,
I noticed a set of commits that have no Signed-off-by from their
committer:
d9864a1d2dfc ("drm/stm: drv: Rename platform driver name")
to
ed34d261a12a ("drm/stm: dsi: Constify phy ops structure")
--
Cheers,
Stephen Rothwell
___
Intel-gfx
lockdep complaints about a locking recursion for the i2c bus lock
because both the sdvo ddc proxy bus and the gmbus nested within use
the same locking class. It's not really a deadlock since we never nest
the other way round, but it's annoying.
Fix it by pulling the gmbus locking into the i2c lock
Chris Wilson writes:
> Quoting Gabriel Krisman Bertazi (2017-07-25 19:19:22)
>> power = (power & 0x1f00) >> 8;
>> units = 100 / (1 << power); /* convert to uJ */
>> power = I915_READ(MCH_SECP_NRG_STTS);
>
> Just after this is a useless cast. Though it will be neater to
On 7/21/2017 5:32 AM, Chris Wilson wrote:
The purpose of the test was to check per-engine resets would fallback to
the global reset when required, but first we actually need a test for a
basic i915_handle_error()!
Cc: Mika Kuoppala
Cc: Michel Thierry
Signed-off-by: Chris Wilson
---
drivers/
== Series Details ==
Series: drm/i915: Eliminate dead code in intel_sanitize_enable_ppgtt() (rev2)
URL : https://patchwork.freedesktop.org/series/8105/
State : success
== Summary ==
Series 8105v2 drm/i915: Eliminate dead code in intel_sanitize_enable_ppgtt()
https://patchwork.freedesktop.org/a
From: Damien Lespiau
We exit early if has_aliasing_ppgtt is 0, so towards the end of the
function has_aliasing_ppgtt can only be 1.
Also:
if (foo)
return 1;
else
return 0;
when foo is already a bool is really just:
return foo;
v2:
- Sim
Quoting Matthew Auld (2017-07-25 20:21:23)
> Support inserting 1G gtt pages into the 48b PPGTT.
>
> v2: sanity check sg->length against page_size
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 73
> ++
== Series Details ==
Series: huge gtt pages (rev5)
URL : https://patchwork.freedesktop.org/series/25118/
State : success
== Summary ==
Series 25118v5 huge gtt pages
https://patchwork.freedesktop.org/api/1.0/series/25118/revisions/5/mbox/
Test kms_flip:
Subgroup basic-flip-vs-modeset:
Quoting Matthew Auld (2017-07-25 20:21:18)
> @@ -471,25 +473,31 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64
> alignment, u64 flags)
> if (ret)
> return ret;
>
GEM_BUG_ON(vma->pages);
> + if (!vma->pages) {
> + ret = vma->vm->set_pages(vma)
For gen8+ platforms which support the 48b PPGTT, enable platform level
support for 2M pages. Also enable for mock testing.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_pci.c | 6 --
drivers/gpu/drm/i915/selftests/mock_gem_d
Now that we support multiple page sizes for the ppgtt, it would be
useful to track the real usage for debugging purposes.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c| 10 ++
drivers/gpu/drm/i915/i915_gem_object.h | 10 +++
For gen9+ enable platform level support for 64K pages. Also enable for
mock testing.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 ++-
2 files changed, 4 inser
Good to know, mostly for debugging purposes.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 42 +
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
v2: mock test page support configurations and add MI_STORE_DWORD test
v3: run all mockable huge page tests on all platforms via the mock_device
v4: add pin_update regression test
various improvements suggested by Chris
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
For gen8+ enable platforms which support the 48b PPGTT, enable support
for 1G pages. Also enable for mock testing.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_pci.c | 6 --
drivers/gpu/drm/i915/selftests/mock_gem_device.c
Currently gvt gtt handling doesn't support huge page entries, so disable
for now.
Suggested-by: Zhenyu Wang
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Zhenyu Wang
---
drivers/gpu/drm/i915/i915_gem.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/driver
Try to mix sg page sizes for 4K, 64K and 2M pages.
v2: s/BIT(x) >> 12/BIT(x) >> PAGE_SHIFT/
Suggested-by: Chris Wilson
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/selftests/scatterlist.c | 15 +++
1 file changed, 15 insertions(+)
dif
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index acd
Support inserting 1G gtt pages into the 48b PPGTT.
v2: sanity check sg->length against page_size
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 73 +++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +
2 f
We can't mix 64K and 4K pte's in the same page-table, so for now we
align 64K objects to 2M to avoid any potential mixing. This is
potentially wasteful but in reality shouldn't be too bad since this only
applies to the virtual address space of a 48b PPGTT.
v2: don't separate logically connected op
Move the setting/clearing of the vma->pages to a vm operation. Doing so
neatens things up a little, but more importantly gives us a sane place
to also set/clear the vma->pages_sizes, which we introduce later in
preparation for supporting huge-pages.
Suggested-by: Chris Wilson
Signed-off-by: Matth
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 26 ++
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_
When SW enables the use of 2M/1G pages, it must disable the GTT cache.
v2: don't disable for Cherryview which doesn't even support 48b PPGTT!
v3: explicitly check that the system does support 2M/1G pages
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i91
Before we can enable 64K pages through the IPS bit, we must first enable
it through MMIO, otherwise the page-walker will simply ignore it.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem.c | 11 +++
drivers/gpu/drm/i915/i915_reg.h | 3
In preparation for supporting huge gtt pages for the ppgtt, we introduce
page size members for gem objects. We fill in the page sizes by
scanning the sg table.
v2: pass the sg_mask to set_pages
v3: calculate the sg_mask inline with populating the sg_table where
possible, and pass to set_pages al
Enable transparent-huge-pages through gemfs by mounting with
huge=within_size.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/i915_gemfs.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gemfs.c
b/driver
For the 48b PPGTT try to align the vma start address to the required
page size boundary to guarantee we use said page size in the gtt. If we
are dealing with multiple page sizes, we can't guarantee anything and
just align to the largest. For soft pinning and objects which need to be
tightly packed
In preparation for huge gtt pages expose a page_size_mask as part of the
device info, to indicate the page sizes supported by the HW. Currently
only 4K is supported.
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Chris Wilson
Reviewed-by: Joonas Lahtinen
---
drivers/g
Some updates to the kselftests as per Chris' comments.
Matthew Auld (21):
mm/shmem: introduce shmem_file_setup_with_mnt
drm/i915: introduce simple gemfs
drm/i915/gemfs: enable THP
drm/i915: introduce page_size_mask to dev_info
drm/i915: introduce page_size members
drm/i915: introduce v
We are planning to use our own tmpfs mnt in i915 in place of the
shm_mnt, such that we can control the mount options, in particular
huge=, which we require to support huge-gtt-pages. So rather than roll
our own version of __shmem_file_setup, it would be preferred if we could
just give shmem our mnt
Not a fully blown gemfs, just our very own tmpfs kernel mount. Doing so
moves us away from the shmemfs shm_mnt, and gives us the much needed
flexibility to do things like set our own mount options, namely huge=
which should allow us to enable the use of transparent-huge-pages for
our shmem backed o
Quoting Gabriel Krisman Bertazi (2017-07-25 19:19:22)
> When reading the i915_energy_uJ debugfs file, it tries to fetch
> MSR_RAPL_POWER_UNIT, which might not be available, like in a vm
> environment, causing the exception shown below.
>
> We can easily prevent it by doing a rdmsrl_safe read inste
== Series Details ==
Series: drm/i915: Handle msr read failure gracefully
URL : https://patchwork.freedesktop.org/series/27884/
State : success
== Summary ==
Series 27884v1 drm/i915: Handle msr read failure gracefully
https://patchwork.freedesktop.org/api/1.0/series/27884/revisions/1/mbox/
Te
Em Qua, 2017-07-19 às 00:27 +0530, Praveen Paneri escreveu:
> When FBC is enabled for linear, legacy Y-tiled and Yf-tiled
> surfaces on gen9, the cfb stride must be programmed by SW as
>
> cfb_stride = ceiling[(at least plane width in pixels)/
> (32 * compression limit factor)]
Thanks for the review !
Manasi
Em Seg, 2017-07-17 às 15:05 -0700, Manasi Navare escreveu:
> The condition for setting the Loadgen Select bit of
> PORT_TX_DW4 register during DDI Vswing Sequence should be Bit rate <=6
> GHz whereas the existing code checks only Bit Rate < 6GHz. This patch
> fix
When reading the i915_energy_uJ debugfs file, it tries to fetch
MSR_RAPL_POWER_UNIT, which might not be available, like in a vm
environment, causing the exception shown below.
We can easily prevent it by doing a rdmsrl_safe read instead, which will
handle the exception, allowing us to abort the de
Em Seg, 2017-07-17 às 15:05 -0700, Manasi Navare escreveu:
> The condition for setting the Loadgen Select bit of
> PORT_TX_DW4 register during DDI Vswing Sequence should be
> Bit rate <=6 GHz whereas the existing code checks only
> Bit Rate < 6GHz. This patch fixes this condition.
> While at it als
== Series Details ==
Series: Kernel PSR Fix-ups
URL : https://patchwork.freedesktop.org/series/27879/
State : failure
== Summary ==
Series 27879v1 Kernel PSR Fix-ups
https://patchwork.freedesktop.org/api/1.0/series/27879/revisions/1/mbox/
Test core_auth:
Subgroup basic-auth:
On Tue, Jul 25, 2017 at 09:48:07AM -0700, Jim Bride wrote:
> These patches, along with an upcoming series for IGT, enable our
> PSR IGT tests to run reliably once again on HSW, BDW, and SKL.
> The first change enables us to run the PSR tests on some RVP platforms
> whose panels have too slow of a s
I like this patch, however there's a mistake in it:
On Tue, 2017-07-25 at 15:48 +0300, Paul Kocialkowski wrote:
> Since the chamelium is not a very usual piece of hardware and
> requires
> pulling-in lots of specific dependencies, it makes sense to keep it
> disabled by default.
>
> An explicit -
R-b'd and pushed, thanks!
On Tue, 2017-07-25 at 15:48 +0300, Paul Kocialkowski wrote:
> This adds a list of dependencies required to build chamelium support,
> so that what needs to be installed to get it going is more obvious.
>
> As done previously in the file, the list is relevant for Debian a
R-b'd and pushed, thanks!
On Tue, 2017-07-25 at 15:48 +0300, Paul Kocialkowski wrote:
> Chamelium testing has a hard dependency on udev. This makes this
> dependency explicit in configure instead of failing the build when it
> is missing.
>
> Signed-off-by: Paul Kocialkowski
> ---
> configure.a
On SKL+ there is a bit in SRD_CTL that software is not supposed to
modify, but we currently clobber that bit when we enable PSR. In
order to preserve the value of that bit, go ahead and read SRD_CTL and
do a field-wise setting of the various bits that we need to initialize
before writing the regis
This set of changes has some history to them. There were several attempts
to add what was called "fast link training" to i915, which actually wasn't
fast link training as per the DP spec. These changes were
5fa836a9d859 ("drm/i915: DP link training optimization")
4e96c97742f4 ("drm/i915: eDP lin
According to the eDP spec, when the count field in TEST_SINK_MISC
increments then the six bytes of sink CRC information in the DPCD
should be valid. Unfortunately, this doesn't seem to be the case
on some panels, and as a result we get some incorrect and inconsistent
values from the sink CRC DPCD
These patches, along with an upcoming series for IGT, enable our
PSR IGT tests to run reliably once again on HSW, BDW, and SKL.
The first change enables us to run the PSR tests on some RVP platforms
whose panels have too slow of a setup time when running in their
preferred mode. The second fixes a
Some fixed resolution panels actually support more than one mode,
with the only thing different being the refresh rate. Having this
alternate mode available to us is desirable, because it allows us to
test PSR on panels whose setup time at the preferred mode is too long.
With this patch we allow t
On 25/07/17 12:30, Datczuk, Andrzej wrote:
I think you looked only at the changes prepared previously by Matthew and just
ported by me. I made a change on top of it in a third patch to alight the
whitelist with MDAPI needs.
The change you're looking for is "Subject: [PATCH 3/3] drm/i915: extend
On Tue, Jul 25, 2017 at 03:18:04PM +0300, Paul Kocialkowski wrote:
> On Tue, 2017-07-25 at 10:16 +0200, Daniel Vetter wrote:
> > On Tue, Jul 25, 2017 at 10:58:55AM +0300, Paul Kocialkowski wrote:
> > > On Tue, 2017-07-25 at 09:34 +0200, Daniel Vetter wrote:
> > > > On Tue, Jul 25, 2017 at 9:25 AM,
Quoting Ewelina Musial (2017-07-25 16:26:09)
> In some cases we observed that forcewake isn't kept after
> resume and checking RC6 residency is a simple way to verify that.
> If forcewake is kept after resume residency should be constant.
>
> Cc: Lukasz Fiedorowicz
> Cc: Radoslaw Szwichtenberg
>
On Tuesday 25 July 2017 08:48 PM, Paulo Zanoni wrote:
Em Ter, 2017-07-18 às 22:52 +0530, Praveen Paneri escreveu:
This series adds Y-tiled buffer creation support into IGT libraries
and
goes on to use this capability to add support into FBC tests to use
Y-tiled buffers.
Everything reviewed &
In some cases we observed that forcewake isn't kept after
resume and checking RC6 residency is a simple way to verify that.
If forcewake is kept after resume residency should be constant.
Cc: Lukasz Fiedorowicz
Cc: Radoslaw Szwichtenberg
Cc: Michal Winiarski
Signed-off-by: Ewelina Musial
---
Gem_mocs_settings and pm_rc6_residency tests are defining
the same functionality to read residency from sysfs.
Moving that function to lib/igt_aux and updating tests.
Signed-off-by: Ewelina Musial
---
lib/igt_aux.c | 8
lib/igt_aux.h | 5 +
tests/gem_mocs_s
Em Ter, 2017-07-18 às 22:52 +0530, Praveen Paneri escreveu:
> This series adds Y-tiled buffer creation support into IGT libraries
> and
> goes on to use this capability to add support into FBC tests to use
> Y-tiled buffers.
Everything reviewed & merged. Thanks for the patches.
Patch 5 contained
On Tue, Jul 25, 2017 at 10:01:21AM +0200, Daniel Vetter wrote:
> It's dead code, the core handles all this directly now.
>
> The only special case is nouveau and tda988x which used one function
> for both legacy modeset code and -nv50 atomic world instead of 2
> vtables. But amounts to exactly the
Quoting Chris Wilson (2017-07-25 13:53:36)
> After rebasing af2788925ae0 ("drm/i915: Squelch reset messages during
> selftests"), I missed fixing up a call to i915_reset().
>
> Reported-by: kbuild test robot
> Fixes: af2788925ae0 ("drm/i915: Squelch reset messages during selftests")
> Signed-off-
On Tue, Jul 25, 2017 at 01:53:36PM +0100, Chris Wilson wrote:
> After rebasing af2788925ae0 ("drm/i915: Squelch reset messages during
> selftests"), I missed fixing up a call to i915_reset().
>
> Reported-by: kbuild test robot
> Fixes: af2788925ae0 ("drm/i915: Squelch reset messages during selfte
Gem_mocs_settings and pm_rc6_residency tests are defining
the same functionality to read residency from sysfs.
Moving that function to lib/igt_aux and updating tests.
Signed-off-by: Ewelina Musial
---
lib/igt_aux.c | 8
lib/igt_aux.h | 5 +
tests/gem_mocs_s
Hi Daniel,
Thank you for the patch.
On Tuesday 25 Jul 2017 10:01:21 Daniel Vetter wrote:
> It's dead code, the core handles all this directly now.
>
> The only special case is nouveau and tda988x which used one function
> for both legacy modeset code and -nv50 atomic world instead of 2
> vtables
== Series Details ==
Series: drm/i915/sdvo: Shut up state checker with hdmi cards on gen3
URL : https://patchwork.freedesktop.org/series/27860/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/uts
The hdmi bits simply don't exist, so nerf them. I think audio doesn't
work on gen3 at all, and for the limited color range we should
probably use the colorimetry sdvo paramater instead of the bit in the
port.
But fixing sdvo isn't my goal, I just want to get the backtrace out of
the way, and this
== Series Details ==
Series: drm/i915/selftests: Fix kbuild error
URL : https://patchwork.freedesktop.org/series/27856/
State : success
== Summary ==
Series 27856v1 drm/i915/selftests: Fix kbuild error
https://patchwork.freedesktop.org/api/1.0/series/27856/revisions/1/mbox/
Test kms_cursor_le
On Tue, Jul 25, 2017 at 03:41:46PM +0300, David Weinehall wrote:
> On 2017-07-25 02:15, Puthikorn Voravootivat wrote:
> > I saw a DP 1.3 panel that advertise AUX backlight brightness control
> > but not working properly. So it should work but not in real world.
> > I think that is good reason enoug
Quoting Tvrtko Ursulin (2017-07-24 09:06:28)
>
>
> On 21/07/2017 17:11, Chris Wilson wrote:
> > We require the caller to ensure that the packets they wish to emit into
> > the CS ring are qword aligned (i.e. have an even number of dwords).
> > Double check this.
> >
> > Signed-off-by: Chris Wils
Quoting Chris Wilson (2017-07-25 13:53:36)
> After rebasing af2788925ae0 ("drm/i915: Squelch reset messages during
> selftests"), I missed fixing up a call to i915_reset().
s/rebasing/applying patches out of order due to review timing/
> Reported-by: kbuild test robot
> Fixes: af2788925ae0 ("drm
After rebasing af2788925ae0 ("drm/i915: Squelch reset messages during
selftests"), I missed fixing up a call to i915_reset().
Reported-by: kbuild test robot
Fixes: af2788925ae0 ("drm/i915: Squelch reset messages during selftests")
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/i
Since the chamelium is not a very usual piece of hardware and requires
pulling-in lots of specific dependencies, it makes sense to keep it
disabled by default.
An explicit --enable-chamelium argument is provided to enable it when
necessary. This also leads to more predictable results than
automati
Chamelium testing has a hard dependency on udev. This makes this
dependency explicit in configure instead of failing the build when it
is missing.
Signed-off-by: Paul Kocialkowski
---
configure.ac | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configure.ac b/configure.ac
index dec3e923..
This adds a list of dependencies required to build chamelium support,
so that what needs to be installed to get it going is more obvious.
As done previously in the file, the list is relevant for Debian and its
derivatives but should provide a template for other systems as well.
Signed-off-by: Pau
On 2017-07-25 02:15, Puthikorn Voravootivat wrote:
I saw a DP 1.3 panel that advertise AUX backlight brightness control
but not working properly. So it should work but not in real world.
I think that is good reason enough to add this as a heuristic.
Either key it on eDP 1.4 and hope that it's
On Mon, Jul 24, 2017 at 2:12 PM, Ramalingam C wrote:
> DRM connector property is created to represent the content protection
> state of the connector and to configure the same.
>
> Content protection states defined:
> DRM_MODE_CONTENT_PROTECTION_UNSUPPORTED - Unsupported
>
tree: git://anongit.freedesktop.org/drm-intel for-linux-next
head: af2788925ae0b83737ee847c5b2e9f19c5bf3630
commit: af2788925ae0b83737ee847c5b2e9f19c5bf3630 [4/4] drm/i915: Squelch reset
messages during selftests
config: i386-randconfig-x013-201730 (attached as .config)
compiler: gcc-6 (Debian
On Tue, 2017-07-25 at 10:16 +0200, Daniel Vetter wrote:
> On Tue, Jul 25, 2017 at 10:58:55AM +0300, Paul Kocialkowski wrote:
> > On Tue, 2017-07-25 at 09:34 +0200, Daniel Vetter wrote:
> > > On Tue, Jul 25, 2017 at 9:25 AM, Paul Kocialkowski
> > > wrote:
> > > > On Tue, 2017-07-25 at 08:53 +0200,
On Tue, Jul 25, 2017 at 12:49:11PM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2017-07-25 12:37:08)
> > I spent too much time going wtf why does this test not run until
> > realizing that vgem is missing. This should help a lot for tests that
> > need multiple different drm drivers.
> >
>
== Series Details ==
Series: acquire ctx for everyone! (rev3)
URL : https://patchwork.freedesktop.org/series/27835/
State : failure
== Summary ==
CHK include/config/kernel.release
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CHK include/
The reason behind the original indirection through the helper
functions was to allow existing drivers to overwrite how they handle
properties. For example when a vendor-specific userspace had
expectations that didn't match atomic. That seemed likely, since
atomic is standardizing a _lot_ more of th
Atomic drivers only use the property value store for immutable (i.e.
can't be set by userspace, but the kernel can still adjust it)
properties. The only tricky part is the removal of the update in
drm_atomic_helper_update_legacy_modeset_state().
This was added in
commit 8c10342cb48f3140d9abeadcfd
Quoting Daniel Vetter (2017-07-25 12:37:08)
> I spent too much time going wtf why does this test not run until
> realizing that vgem is missing. This should help a lot for tests that
> need multiple different drm drivers.
>
> Signed-off-by: Daniel Vetter
> ---
> lib/drmtest.c | 21 ++
I spent too much time going wtf why does this test not run until
realizing that vgem is missing. This should help a lot for tests that
need multiple different drm drivers.
Signed-off-by: Daniel Vetter
---
lib/drmtest.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
I think you looked only at the changes prepared previously by Matthew and just
ported by me. I made a change on top of it in a third patch to alight the
whitelist with MDAPI needs.
The change you're looking for is "Subject: [PATCH 3/3] drm/i915: extended oa
reg addresses whitelist". To make it
Quoting Michel Thierry (2017-07-24 20:32:21)
> On 7/24/2017 6:32 AM, Chris Wilson wrote:
> > Quoting Chris Wilson (2017-07-21 13:32:33)
> >> If the request has been completed before the reset took effect, we don't
> >> need to mark it up as being a victim. Touching fence->error after the
> >> fence
On 25/07/17 05:26, Zhenyu Wang wrote:
On 2017.07.21 14:01:01 +0100, Lionel Landwerlin wrote:
I think Chris' comments show this isn't actually tested.
It turned out that's true...so currently Pengyuan just tried to
filter by exposed vGPU ctx_hw_id with global mode in gputop. Would
that be ok wit
Hi Andrzej,
Thanks for the feedback. Can you tell me if that following changes are
correct?
Cheers,
-
Lionel
On 25/07/17 10:06, Datczuk, Andrzej wrote:
Hi Lionel,
What about the corrected whitelist I sent you before? Without allowing those
registers the patch for MDAPI is basically useles
Op 25-07-17 om 11:27 schreef Daniel Vetter:
> On Tue, Jul 25, 2017 at 11:11 AM, Maarten Lankhorst
> wrote:
>> Op 25-07-17 om 10:23 schreef Daniel Vetter:
>>> On Wed, Jul 19, 2017 at 04:39:15PM +0200, Maarten Lankhorst wrote:
/*
- * Don't do an async update if there is an outstan
On 07/24/2017 05:46 AM, Ben Widawsky wrote:
> Second attempt (although most patches are much further along than that) and
> the
> blob property for modifiers.
>
> This small series adds the DRM blob property that allows clients to be made
> aware of per plane modifiers and the formats which are
On 07/25/2017 10:01 AM, Daniel Vetter wrote:
> It's dead code, the core handles all this directly now.
>
> The only special case is nouveau and tda988x which used one function
> for both legacy modeset code and -nv50 atomic world instead of 2
> vtables. But amounts to exactly the same.
>
> v2:
On 07/25/2017 10:01 AM, Daniel Vetter wrote:
> It's dead code because this is now handled in the core.
>
> Signed-off-by: Daniel Vetter
> Cc: Boris Brezillon
> Cc: Daniel Vetter
> Cc: Jani Nikula
> Cc: Sean Paul
> Cc: David Airlie
> Cc: Ben Skeggs
> Cc: Tomi Valkeinen
> Cc: Laurent Pinch
On 07/25/2017 10:01 AM, Daniel Vetter wrote:
> It's dead code, the core handles all this directly now. This also
> allows us to unexport drm_atomic_helper_plane_set_property.
>
> Signed-off-by: Daniel Vetter
> Cc: Liviu Dudau
> Cc: Brian Starkey
> Cc: Mali DP Maintainers
> Cc: Boris Brezillo
== Series Details ==
Series: drm/i915/gvt: Dma-buf support for GVT-g
URL : https://patchwork.freedesktop.org/series/27844/
State : warning
== Summary ==
Series 27844v1 drm/i915/gvt: Dma-buf support for GVT-g
https://patchwork.freedesktop.org/api/1.0/series/27844/revisions/1/mbox/
Test gem_rin
On 07/25/2017 01:31 PM, Daniel Vetter wrote:
It's dead code, the core handles all this directly now. This also
allows us to unexport drm_atomic_helper_plane_set_property.
Reviewed-by: Archit Taneja
Signed-off-by: Daniel Vetter
Cc: Liviu Dudau
Cc: Brian Starkey
Cc: Mali DP Maintainers
On 07/25/2017 01:31 PM, Daniel Vetter wrote:
It's dead code because this is now handled in the core.
Reviewed-by: Archit Taneja
Signed-off-by: Daniel Vetter
Cc: Boris Brezillon
Cc: Daniel Vetter
Cc: Jani Nikula
Cc: Sean Paul
Cc: David Airlie
Cc: Ben Skeggs
Cc: Tomi Valkeinen
Cc: L
This patch introduces a guest's framebuffer sharing mechanism based on
dma-buf subsystem. With this sharing mechanism, guest's framebuffer can
be shared between guest VM and host.
Signed-off-by: Tina Zhang
---
drivers/gpu/drm/i915/gvt/Makefile | 2 +-
drivers/gpu/drm/i915/gvt/dmabuf.c
On 07/25/2017 01:31 PM, Daniel Vetter wrote:
The reason behind the original indirection through the helper
functions was to allow existing drivers to overwrite how they handle
properties. For example when a vendor-specific userspace had
expectations that didn't match atomic. That seemed likely,
Add VFIO_DEVICE_QUERY_GFX_PLANE ioctl command to let user mode query and
get the plan and its related information.
The dma-buf's life cycle is handled by user mode and tracked by kernel.
The returned fd in struct vfio_device_query_gfx_plane can be a new
fd or an old fd of a re-exported dma-buf. Ho
Op 25-07-17 om 10:01 schreef Daniel Vetter:
> Finally all users are gone!
>
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_atomic.c | 32
> include/drm/drm_atomic.h | 2 --
> 2 files changed, 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_at
GEM proxy is a kind of GEM, whose backing physical memory is pinned
and produced by guest VM and is used by host as read only. With GEM
proxy, host is able to access guest physical memory through GEM object
interface. As GEM proxy is such a special kind of GEM, a new flag
I915_GEM_OBJECT_IS_PROXY i
Windows guest UPT driver can use operegion to configure the setting
for display. Without the opregion support, the display registers won't
be set and this blocks display model to get the correct information
of the guest display plane.
Signed-off-by: Bing Niu
Signed-off-by: Xiaoguang Chen
Signed-
The RGB 64-bit 16:16:16:16 float pixel format is needed by windows 10
guest VM. This patch is to add this pixel format support to gvt device
model. Without this patch, some Apps, e.g. "DXGIGammaVM.exe", will crash
and make guest screen black.
Signed-off-by: Xiaoguang Chen
Signed-off-by: Tina Zhan
The RGB 64-bit 16:16:16:16 float pixel format is needed by windows
guest VM. This patch is to introduce the format to drm.
v1:
Suggested by Ville to submit this patch to dri-devel.
Signed-off-by: Xiaoguang Chen
Signed-off-by: Tina Zhang
---
include/uapi/drm/drm_fourcc.h | 4
1 file change
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