[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Let's use more enum intel_dpll_id pll_id.

== Series Details == Series: series starting with [1/2] drm/i915: Let's use more enum intel_dpll_id pll_id. URL : https://patchwork.freedesktop.org/series/32245/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw)

[Intel-gfx] [PULL] drm-intel-fixes

Hi Dave, Here goes another round of drm/i915 fixes for 4.14. drm-intel-fixes-2017-10-18-1: Fix for stable: - Fix DDI translation tables for BDW (Chris). Critical fix: - Fix GPU Hang on GVT (Changbin). Other fixes: - Fix eviction when GGTT is idle (Chris). - CNL PLL fixes (Rodrigo). - Fix

[Intel-gfx] ✓ Fi.CI.IGT: success for DDI buf trans cleanup (rev3)

== Series Details == Series: DDI buf trans cleanup (rev3) URL : https://patchwork.freedesktop.org/series/32049/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test kms_chv_cursor_fail: Subgroup

Re: [Intel-gfx] [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

On 2017.10.18 13:25:43 +0300, Joonas Lahtinen wrote: > When running under virtualization (vGPU active), we must disable > the azy PPGTT page table initialization optimization introduced by: > > 14826673247e ("drm/i915: Only initialize partially filled pagetables") > > We must do this because

[Intel-gfx] ✗ Fi.CI.BAT: warning for tests/kms_fbcon_fbt: Report fbc_status on error

== Series Details == Series: tests/kms_fbcon_fbt: Report fbc_status on error URL : https://patchwork.freedesktop.org/series/32256/ State : warning == Summary == IGT patchset tested on top of latest successful build 9a3f6f59d4c208219f7d3178106bdef628ff68d0 tests/intel-ci: Remove

[Intel-gfx] ✓ Fi.CI.IGT: success for tests/pm_rps: Move some test logic out of boost function (rev2)

== Series Details == Series: tests/pm_rps: Move some test logic out of boost function (rev2) URL : https://patchwork.freedesktop.org/series/32131/ State : success == Summary == Test prime_self_import: Subgroup export-vs-gem_close-race: fail -> PASS

[Intel-gfx] ✓ Fi.CI.IGT: success for igt/prime_mmap_coherency: Call prime_sync_start before read after write

== Series Details == Series: igt/prime_mmap_coherency: Call prime_sync_start before read after write URL : https://patchwork.freedesktop.org/series/32219/ State : success == Summary == Test prime_self_import: Subgroup export-vs-gem_close-race: fail -> PASS

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [RFC,1/2] drm/i915: Add connector property to force bpc

== Series Details == Series: series starting with [RFC,1/2] drm/i915: Add connector property to force bpc URL : https://patchwork.freedesktop.org/series/32251/ State : warning == Summary == Series 32251v1 series starting with [RFC,1/2] drm/i915: Add connector property to force bpc

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL

On Wed, Oct 18, 2017 at 09:50:59PM +, Rodrigo Vivi wrote: > On Wed, Oct 18, 2017 at 08:48:24PM +, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Track the system agent voltage we request from pcode in the cdclk state > > on CNL. Annoyingly we can't

[Intel-gfx] [RFC 1/2] drm/i915: Add connector property to force bpc

Currently the user space does not have a way to force the bpc. The default bpc to be programmed is decided by the driver and is run against connector limitations. Creating a new property for the userspace to recommend a certain color depth while scanning out the pixels. Cc: Ville Syrjälä

[Intel-gfx] [RFC 2/2] drm/i915: Allow force_bpc property to limit pipe_bpp

Use the newly added force_bpc connector property to limit pipe bpp. Cc: Ville Syrjälä Cc: Paulo Zanoni Cc: Manasi Navare Signed-off-by: Radhakrishna Sripada ---

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] lib: Add DROP_IDLE

== Series Details == Series: series starting with [1/4] lib: Add DROP_IDLE URL : https://patchwork.freedesktop.org/series/32211/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 Test kms_flip: Subgroup

[Intel-gfx] [I-G-T CI 4/4] lib: Free all internal buffers before measuring available memory

Release the internal caches (by flushing the idle_worker) to maximise the available memory for use by tests (and to reduce sporadic skipping when on the cusp). Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen --- lib/intel_os.c

[Intel-gfx] [I-G-T CI 2/4] lib: Idle the GT when quiescing the GPU

As part of the general procedure for ensuring the GPU is idle, we also want to ask the driver to flush its idle_worker. The idle_worker is responsible for releasing both the driver's internal cache of buffers and cache of state (such as the prolonged GT wakeref). By flushing the idle_worker we

[Intel-gfx] [I-G-T CI 3/4] lib: Flush the driver's internal cache of objects before counting

As the driver itself keeps a cache of objects, these too need to be flushed prior to producing a stable count of objects. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102655 Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen

Re: [Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2)

Quoting Patchwork (2017-10-18 22:36:41) > == Series Details == > > Series: drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2) > URL : https://patchwork.freedesktop.org/series/32102/ > State : warning > > == Summary == > > Test perf: > Subgroup polling: >

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL

On Wed, Oct 18, 2017 at 08:48:24PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Track the system agent voltage we request from pcode in the cdclk state > on CNL. Annoyingly we can't actually read out the current value since > there's no pcode command to do

Re: [Intel-gfx] [PATCH v7 4/4] drm/i915/guc : Decouple logs and ADS from submission

On Wed, 18 Oct 2017 00:50:49 +0200, Sujaritha Sundaresan wrote: The Additional Data Struct (ADS) contains objects that are required by guc post FW load and are not necessarily submission-only (although that's our current only use-case). If in the future we

[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2)

== Series Details == Series: drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2) URL : https://patchwork.freedesktop.org/series/32102/ State : warning == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 Test

Re: [Intel-gfx] [PATCH v7 3/4] drm/i915/guc : Updating GuC and HuC FW select function

On Wed, 18 Oct 2017 12:29:13 +0200, Sagar Arun Kamble wrote: On 10/18/2017 4:20 AM, Sujaritha Sundaresan wrote: Updating GuC and HuC firmware select function to support removing i915_modparams.enable_guc_loading module parameter. v2: Clarifying the commit

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitly

On Mon, Oct 16, 2017 at 05:57:01PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > encoder->type is unreliable for DP/HDMI, so pass it in explicity into > cnl_ddi_vswing_sequence(). This matches what we do for BXT. > I still dont get why we cant use

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing

== Series Details == Series: drm/i915: CNL DVFS thing URL : https://patchwork.freedesktop.org/series/32247/ State : warning == Summary == Series 32247v1 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/1/mbox/ Test debugfs_test: Subgroup

[Intel-gfx] [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on CNL. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. Cc: Mika Kahola

[Intel-gfx] [PATCH 8/8] drm/i915: Adjust system agent voltage on CNL if required by DDI ports

From: Ville Syrjälä On CNL we may need to bump up the system agent voltage not only due to CDCLK but also when driving DDI port with a sufficiently high clock. To that end start tracking the minimum acceptable voltage for each crtc. We do the tracking via crtcs

[Intel-gfx] [PATCH 5/8] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on SKL/KBL/CFL. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. Cc: Mika

[Intel-gfx] [PATCH 6/8] drm/i915: Use cdclk_state->voltage on BXT/GLK

From: Ville Syrjälä Track the system agent voltage we request from pcode in the cdclk state on BXT/GLK. Annoyingly we can't actually read out the current value since there's no pcode command to do that, so we'll have to just assume that it worked. Cc: Mika Kahola

[Intel-gfx] [PATCH 3/8] drm/i915: USe cdclk_state->voltage on VLV/CHV

From: Ville Syrjälä Store the punit DSPFREQUAR value into cdclk_state->voltage on VLV/CHV. Since we can actually read that out from the hardware this can give us a bit more cross checking between the hardware and software state. Cc: Mika Kahola

[Intel-gfx] [PATCH 2/8] drm/i915: Start tracking voltage level in the cdclk state

From: Ville Syrjälä For CNL we'll need to start considering the port clocks when we select the voltage level for the system agent. To that end start tracking the voltage in the cdclk state (since that already has to adjust it). Cc: Mika Kahola

[Intel-gfx] [PATCH 1/8] drm/i915: Clean up some cdclk switch statements

From: Ville Syrjälä Redo some switch statements in the cdclk code to use a common fall through for the default case. Makes everything look a bit more uniform Cc: Mika Kahola Cc: Manasi Navare Cc: Rodrigo Vivi

[Intel-gfx] [PATCH 0/8] drm/i915: CNL DVFS thing

From: Ville Syrjälä Here's my idea on how the CNL DVFS thing ought to be implemented. Not sure I gleaned the details of the port clock limits correctly, but other than that I think this should work. Entire series available here: git://github.com/vsyrjala/linux.git

[Intel-gfx] ✗ Fi.CI.IGT: failure for tests/kms_plane_lowres: Rework tests to work without fbcon. (rev2)

== Series Details == Series: tests/kms_plane_lowres: Rework tests to work without fbcon. (rev2) URL : https://patchwork.freedesktop.org/series/32016/ State : failure == Summary == Test kms_plane_lowres: Subgroup pipe-A-tiling-none: pass -> SKIP (shard-hsw)

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Extract intel_ddi_get_buf_trans_hdmi()

On Wed, Oct 18, 2017 at 08:09:24PM +0300, Ville Syrjälä wrote: > On Mon, Oct 16, 2017 at 04:41:49PM -0700, Ausmus, James wrote: > > On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala > > wrote: > > > From: Ville Syrjälä > > > > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Let's use more enum intel_dpll_id pll_id.

== Series Details == Series: series starting with [1/2] drm/i915: Let's use more enum intel_dpll_id pll_id. URL : https://patchwork.freedesktop.org/series/32245/ State : success == Summary == Series 32245v1 series starting with [1/2] drm/i915: Let's use more enum intel_dpll_id pll_id.

Re: [Intel-gfx] [PATCH v2 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

On Wed, Oct 18, 2017 at 09:19:34PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Handle missing buf trans tables, or out of bounds buf trans levels > the same way everywhere. These should never be hit under normal > conditions, but let's play it safe for

Re: [Intel-gfx] [PATCH v2 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

On Wed, Oct 18, 2017 at 09:19:58PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > A bunch of functions are now exclusively used for HDMI, so naming the > variables with hdmi prefix/suffix is redundant. Also use int rather > than u32 for the translation level

[Intel-gfx] ✓ Fi.CI.IGT: success for kms_atomic_transition: Output more finegrained progress info to avoid CI watchdog timeout

== Series Details == Series: kms_atomic_transition: Output more finegrained progress info to avoid CI watchdog timeout URL : https://patchwork.freedesktop.org/series/32206/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL

Re: [Intel-gfx] [PATCH 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

On Wed, Oct 18, 2017 at 08:54:12PM +0300, Ville Syrjälä wrote: > On Wed, Oct 18, 2017 at 10:43:54AM -0700, James Ausmus wrote: > > On Mon, Oct 16, 2017 at 05:57:05PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > A bunch of functions are now

[Intel-gfx] [PATCH 1/2] drm/i915: Let's use more enum intel_dpll_id pll_id.

No functional change expected. Just let's use this enum when possible and also same standard pll_id name so we can rework gen9+ port clock later. Cc: Mika Kahola Cc: Paulo Zanoni Signed-off-by: Rodrigo Vivi Reviewed-by:

[Intel-gfx] [PATCH 2/2] drm/i915/cnl: extract cnl_dvfs_{pre, post}_change

From: Paulo Zanoni These functions even have their own page in our spec, so extract them from cnl_set_cdclk(). v2: (By Rodrigo) Fixed inverted logic on error return of cnl_dvfs_pre_change. v3: Rebase on top of rps rework with pcu_lock. Cc: Ville Syrjälä

[Intel-gfx] ✗ Fi.CI.IGT: failure for tests/kms_cursor_legacy: Remove strict vblank checking on 2x-*-vs-cursor tests.

== Series Details == Series: tests/kms_cursor_legacy: Remove strict vblank checking on 2x-*-vs-cursor tests. URL : https://patchwork.freedesktop.org/series/32202/ State : failure == Summary == Test kms_atomic_transition: Subgroup plane-all-transition-nonblocking-fencing:

[Intel-gfx] ✓ Fi.CI.BAT: success for DDI buf trans cleanup (rev3)

== Series Details == Series: DDI buf trans cleanup (rev3) URL : https://patchwork.freedesktop.org/series/32049/ State : success == Summary == Series 32049v3 DDI buf trans cleanup https://patchwork.freedesktop.org/api/1.0/series/32049/revisions/3/mbox/ fi-bdw-5557u total:289 pass:268

Re: [Intel-gfx] [PATCH 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

On Wed, Oct 18, 2017 at 09:15:09PM +0300, Ville Syrjälä wrote: > On Wed, Oct 18, 2017 at 08:52:40PM +0300, Ville Syrjälä wrote: > > On Wed, Oct 18, 2017 at 10:41:44AM -0700, James Ausmus wrote: > > > On Mon, Oct 16, 2017 at 05:57:04PM +0300, Ville Syrjala wrote: > > > > From: Ville Syrjälä

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable lazy PPGTT page table optimization for vGPU

== Series Details == Series: drm/i915: Disable lazy PPGTT page table optimization for vGPU URL : https://patchwork.freedesktop.org/series/32201/ State : success == Summary == Test perf: Subgroup polling: fail -> PASS (shard-hsw) fdo#102252 fdo#102252

Re: [Intel-gfx] [PATCH 10/13] drm/i915/cnl: Unify dvfs level selection.

Em Qui, 2017-10-05 às 07:59 -0700, Rodrigo Vivi escreveu: > On Wed, Oct 04, 2017 at 01:20:57PM +, Mika Kahola wrote: > > On Tue, 2017-10-03 at 00:06 -0700, Rodrigo Vivi wrote: > > > When port clock is zero or undefined we base our > > > calculation on cdclk. So, same function can be used > > >

[Intel-gfx] [PATCH v2 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

From: Ville Syrjälä A bunch of functions are now exclusively used for HDMI, so naming the variables with hdmi prefix/suffix is redundant. Also use int rather than u32 for the translation level consistently. v2: Rebase due to hdmi_level=-1 avoidance Cc: James

[Intel-gfx] [PATCH v2 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

From: Ville Syrjälä Handle missing buf trans tables, or out of bounds buf trans levels the same way everywhere. These should never be hit under normal conditions, but let's play it safe for now. v2: Avoid the hdmi_level=-1 case (James) Cc: James Ausmus

Re: [Intel-gfx] [PATCH 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

On Wed, Oct 18, 2017 at 08:52:40PM +0300, Ville Syrjälä wrote: > On Wed, Oct 18, 2017 at 10:41:44AM -0700, James Ausmus wrote: > > On Mon, Oct 16, 2017 at 05:57:04PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Handle missing buf trans tables,

Re: [Intel-gfx] [PATCH 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

On Wed, Oct 18, 2017 at 10:43:54AM -0700, James Ausmus wrote: > On Mon, Oct 16, 2017 at 05:57:05PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > A bunch of functions are now exclusively used for HDMI, so naming the > > variables with hdmi

Re: [Intel-gfx] [PATCH 09/10] drm/i915: Unify error handling for missing DDI buf trans tables

On Wed, Oct 18, 2017 at 10:41:44AM -0700, James Ausmus wrote: > On Mon, Oct 16, 2017 at 05:57:04PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Handle missing buf trans tables, or out of bounds buf trans levels > > the same way everywhere. These

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Extract intel_ddi_get_buf_trans_hdmi()

On Wed, Oct 18, 2017 at 08:09:24PM +0300, Ville Syrjälä wrote: > On Mon, Oct 16, 2017 at 04:41:49PM -0700, Ausmus, James wrote: > > On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala > > wrote: > > > From: Ville Syrjälä > > > > > >

Re: [Intel-gfx] [PATCH 10/10] drm/i915: Drop the redundant hdmi prefix/suffix from a lot of variables

On Mon, Oct 16, 2017 at 05:57:05PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > A bunch of functions are now exclusively used for HDMI, so naming the > variables with hdmi prefix/suffix is redundant. Also use int rather > than u32 for the translation level

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Do not rely on wm preservation for ILK watermarks

== Series Details == Series: drm/i915: Do not rely on wm preservation for ILK watermarks URL : https://patchwork.freedesktop.org/series/32197/ State : failure == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test perf:

Re: [Intel-gfx] [PATCH 08/10] drm/i915: Centralize the SKL DDI A/E vs. B/C/D buf trans handling

On Mon, Oct 16, 2017 at 05:57:03PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > SKL DDI B/C/D only have 9 usable buf trans registers for DP/eDP. That > matches the normal DP buf trans tables, but the low vswing eDP tables > have 10 entries. Thus the eDP

Re: [Intel-gfx] [PATCH 02/10] drm/i915: Extract intel_ddi_get_buf_trans_hdmi()

On Mon, Oct 16, 2017 at 04:41:49PM -0700, Ausmus, James wrote: > On Mon, Oct 16, 2017 at 7:56 AM, Ville Syrjala > wrote: > > From: Ville Syrjälä > > > > Introduce intel_ddi_get_buf_trans_hdmi() and start using it where we > > can. > >

[Intel-gfx] ✓ Fi.CI.IGT: success for lib/i915: Move submission related helpers to lib/i915/gem_submission

== Series Details == Series: lib/i915: Move submission related helpers to lib/i915/gem_submission URL : https://patchwork.freedesktop.org/series/32184/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 Test

Re: [Intel-gfx] [PATCH 07/10] drm/i915: Kill off the BXT buf_trans default_index

On Mon, Oct 16, 2017 at 05:57:02PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > default_index contained in the BXT buf_trans tables is actually useless. > For DP we should always have a valid level selected (otherwise the link > training logic would be

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitly

On Mon, Oct 16, 2017 at 05:57:01PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > encoder->type is unreliable for DP/HDMI, so pass it in explicity into > cnl_ddi_vswing_sequence(). This matches what we do for BXT. > > v2: Pass intel_encoder down to

Re: [Intel-gfx] [PATCH v7 2/4] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

On 10/18/2017 09:50 AM, Joonas Lahtinen wrote: On Wed, 2017-10-18 at 09:25 -0700, Sujaritha wrote: On 10/18/2017 03:58 AM, Joonas Lahtinen wrote: On Tue, 2017-10-17 at 15:50 -0700, Sujaritha Sundaresan wrote: We currently have two module parameters that control GuC: "enable_guc_loading" and

Re: [Intel-gfx] [PATCH v7 2/4] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

On Wed, 2017-10-18 at 09:25 -0700, Sujaritha wrote: > > On 10/18/2017 03:58 AM, Joonas Lahtinen wrote: > > On Tue, 2017-10-17 at 15:50 -0700, Sujaritha Sundaresan wrote: > > > We currently have two module parameters that control GuC: > > > "enable_guc_loading" and "enable_guc_submission".

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

On 18/10/17 09:04, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24) On 13/10/17 09:37, Daniele Ceraolo Spurio wrote: On 13/10/17 01:31, Chris Wilson wrote: Quoting Chris Wilson (2017-10-12 23:57:38) Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27)

Re: [Intel-gfx] [PATCH v2 05/10] drm/i915: Integrate BXT into intel_ddi_dp_voltage_max()

On Mon, Oct 16, 2017 at 05:57:00PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Make BXT less special by following the CNL approach and handling > it in intel_ddi_dp_voltage_max() alognside every other DDI platform. > > v2: Clean up the argument types to

Re: [Intel-gfx] [PATCH v7 2/4] drm/i915/guc : Removing i915_modparams.enable_guc_loading module parameter

On 10/18/2017 03:58 AM, Joonas Lahtinen wrote: On Tue, 2017-10-17 at 15:50 -0700, Sujaritha Sundaresan wrote: We currently have two module parameters that control GuC: "enable_guc_loading" and "enable_guc_submission". Whenever we need i915_modparams.enable_guc_submission=1, we also need

Re: [Intel-gfx] linux-next: manual merge of the sound-asoc tree with the drm-misc tree

On Wed, Oct 18, 2017 at 02:33:37PM +, Deucher, Alexander wrote: Please fix your mail client to word wrap within paragraphs at something substantially less than 80 columns. Doing this makes your messages much easier to read and reply to. > Your conflict change affectively reverted

Re: [Intel-gfx] [PATCH 06/11] drm/i915/guc: Only release GuC log object during submission_fini

On 10/18/2017 6:42 PM, Tvrtko Ursulin wrote: On 18/10/2017 07:46, Sagar Arun Kamble wrote: GuC log runtime/relay channel data is released during i915 unregister, So only GuC log vma needs to be released during submission_fini. Signed-off-by: Sagar Arun Kamble Cc:

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24) > > > On 13/10/17 09:37, Daniele Ceraolo Spurio wrote: > > > > > > On 13/10/17 01:31, Chris Wilson wrote: > >> Quoting Chris Wilson (2017-10-12 23:57:38) > >>> Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27) > +igt_cork_t

Re: [Intel-gfx] [PATCH 05/11] drm/i915/guc: Make GuC log related functions depend only on log level

On 10/18/2017 6:37 PM, Tvrtko Ursulin wrote: On 18/10/2017 07:46, Sagar Arun Kamble wrote: With guc_log_level parameter sanitized we can remove the GuC submission checks from flush_guc_logs and i915_guc_log_register/unregister and intel_uc_fini_hw. It is important to note that GuC log

[Intel-gfx] ✓ Fi.CI.BAT: success for tests/pm_rps: Move some test logic out of boost function (rev2)

== Series Details == Series: tests/pm_rps: Move some test logic out of boost function (rev2) URL : https://patchwork.freedesktop.org/series/32131/ State : success == Summary == IGT patchset tested on top of latest successful build 9a3f6f59d4c208219f7d3178106bdef628ff68d0 tests/intel-ci:

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

On 13/10/17 09:37, Daniele Ceraolo Spurio wrote: On 13/10/17 01:31, Chris Wilson wrote: Quoting Chris Wilson (2017-10-12 23:57:38) Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27) +igt_cork_t *igt_cork_new(int fd); _new does not imply plugged. +void igt_cork_signal(igt_cork_t

Re: [Intel-gfx] [PATCH 04/11] drm/i915/guc: Sanitize module parameter guc_log_level

On 10/18/2017 6:29 PM, Tvrtko Ursulin wrote: On 18/10/2017 07:46, Sagar Arun Kamble wrote: Parameter guc_log_level needs to be sanitized based on GuC support and enable_guc_loading parameter since it depends on them like enable_guc_submission. This will make GuC logging paths independent of

[Intel-gfx] [PATCH i-g-t v2] tests/pm_rps: Move some test logic out of boost function

Moving code out of the boost function will allow its usage in other/new test scenarios. Signed-off-by: Radoslaw Szwichtenberg --- tests/pm_rps.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/tests/pm_rps.c

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/crt: split compute_config hook by platforms

== Series Details == Series: drm/i915/crt: split compute_config hook by platforms URL : https://patchwork.freedesktop.org/series/32135/ State : success == Summary == Test drv_suspend: Subgroup sysfs-reader-hibernate: dmesg-fail -> FAIL (shard-hsw) k.org#196691

Re: [Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Call prime_sync_start before read after write

Quoting Daniel Vetter (2017-10-18 15:47:27) > On Wed, Oct 18, 2017 at 03:19:44PM +0100, Chris Wilson wrote: > > We never declared that we were about to read from the mmap after copying > > into using the BLT (a missed call to prime_sync_start); leaving its > > coherency ill-defined. For

Re: [Intel-gfx] linux-next: manual merge of the sound-asoc tree with the drm-misc tree

On Wed, Oct 18, 2017 at 02:30:50PM +, Deucher, Alexander wrote: > The patch below effectively reverts 1e4448648333a. If you drop the patch > below, you should be fine. As I said in my followup mail I've dropped all these patches due to build failures, please resend both the pull request

Re: [Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Call prime_sync_start before read after write

On Wed, Oct 18, 2017 at 03:19:44PM +0100, Chris Wilson wrote: > We never declared that we were about to read from the mmap after copying > into using the BLT (a missed call to prime_sync_start); leaving its > coherency ill-defined. For completeness, add the missing > prime_sync_end() as well. > >

Re: [Intel-gfx] linux-next: manual merge of the sound-asoc tree with the drm-misc tree

> -Original Message- > From: Mark Brown [mailto:broo...@kernel.org] > Sent: Wednesday, October 18, 2017 5:58 AM > To: Deucher, Alexander; Mukunda, Vijendar; Zhu, Rex; Daniel Vetter; Intel > Graphics; DRI; Liam Girdwood > Cc: Linux-Next Mailing List; Linux Kernel Mailing List > Subject:

Re: [Intel-gfx] [PATCH 1/5] drm/i915: move adjusted_x/y from crtc to cache.

On Tue, Oct 17, 2017 at 11:08:07PM +0300, Juha-Pekka Heikkila wrote: This one lacked a commit message. I just slapped in something rudimentary this time. In the future make sure the commit messages are there, and that they're useful ;) Entire series pushed to dinq. Thanks for the patches. >

[Intel-gfx] ✓ Fi.CI.BAT: success for igt/prime_mmap_coherency: Call prime_sync_start before read after write

== Series Details == Series: igt/prime_mmap_coherency: Call prime_sync_start before read after write URL : https://patchwork.freedesktop.org/series/32219/ State : success == Summary == IGT patchset tested on top of latest successful build 9a3f6f59d4c208219f7d3178106bdef628ff68d0

Re: [Intel-gfx] [PATCH i-g-t] kms_atomic_transition: Output more finegrained progress info to avoid CI watchdog timeout

On Wed, Oct 18, 2017 at 02:43:38PM +0300, Petri Latvala wrote: > On Wed, Oct 18, 2017 at 02:29:33PM +0300, Imre Deak wrote: > > The CI software watchdog (owatch) will timeout if the test doesn't > > output anything for a long time on standard out or error. At least the > >

Re: [Intel-gfx] linux-next: manual merge of the sound-asoc tree with the drm-misc tree

> -Original Message- > From: Mark Brown [mailto:broo...@kernel.org] > Sent: Wednesday, October 18, 2017 6:08 AM > To: Deucher, Alexander; Mukunda, Vijendar; Zhu, Rex; Daniel Vetter; Intel > Graphics; DRI; Liam Girdwood > Cc: Linux-Next Mailing List; Linux Kernel Mailing List;

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: remove g4x lowfreq_avail and has_pipe_cxsr

== Series Details == Series: drm/i915: remove g4x lowfreq_avail and has_pipe_cxsr URL : https://patchwork.freedesktop.org/series/32134/ State : success == Summary == Test drv_suspend: Subgroup sysfs-reader-hibernate: dmesg-fail -> FAIL (shard-hsw) k.org#196691

Re: [Intel-gfx] [PATCH] drm/i915: Debugfs to disable context banning

On Wed, Oct 18, 2017 at 11:01:13AM +0200, Daniel Vetter wrote: > On Tue, Oct 17, 2017 at 09:23:43AM -0700, Jeff McGee wrote: > > On Tue, Oct 17, 2017 at 05:36:54PM +0200, Daniel Vetter wrote: > > > On Tue, Oct 17, 2017 at 08:25:33AM -0700, jeff.mc...@intel.com wrote: > > > > From: Jeff McGee

[Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Call prime_sync_start before read after write

We never declared that we were about to read from the mmap after copying into using the BLT (a missed call to prime_sync_start); leaving its coherency ill-defined. For completeness, add the missing prime_sync_end() as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103168

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Export low level PM IRQ functions to control from GuC functions

On 10/18/2017 6:12 PM, Tvrtko Ursulin wrote: On 18/10/2017 07:46, Sagar Arun Kamble wrote: In order to separate GuC IRQ handling functions from i915_irq.c we need to export the low level pm irq handlers. Export pm_iir, reset_pm_iir and enable/disable_pm_irq functions. Suggested-by: Michal

Re: [Intel-gfx] [PATCH i-g-t] tests/pm_rps: Move some test logic out of boost function

On 10/18/2017 4:33 PM, Szwichtenberg, Radoslaw wrote: On Wed, 2017-10-18 at 11:10 +0530, Sagar Arun Kamble wrote: On 10/17/2017 6:13 PM, Radoslaw Szwichtenberg wrote: Moving code out of the boost function will allow its usage in other/new test scenarios. Signed-off-by: Radoslaw

[Intel-gfx] ✓ Fi.CI.IGT: success for GuC Interrupts/Log updates

== Series Details == Series: GuC Interrupts/Log updates URL : https://patchwork.freedesktop.org/series/32179/ State : success == Summary == Test drv_suspend: Subgroup sysfs-reader-hibernate: dmesg-fail -> FAIL (shard-hsw) k.org#196691 k.org#196691

Re: [Intel-gfx] [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling

On Tue, Oct 17, 2017 at 04:23:07PM -0700, Rodrigo Vivi wrote: > On Tue, Oct 17, 2017 at 08:36:14PM +, Ville Syrjälä wrote: > > On Tue, Oct 17, 2017 at 09:02:05PM +0300, Ville Syrjälä wrote: > > > On Tue, Oct 17, 2017 at 10:45:22AM -0700, Rodrigo Vivi wrote: > > > > On Tue, Oct 17, 2017 at

Re: [Intel-gfx] [PATCH 06/11] drm/i915/guc: Only release GuC log object during submission_fini

On 18/10/2017 07:46, Sagar Arun Kamble wrote: GuC log runtime/relay channel data is released during i915 unregister, So only GuC log vma needs to be released during submission_fini. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko

Re: [Intel-gfx] [PATCH 05/11] drm/i915/guc: Make GuC log related functions depend only on log level

On 18/10/2017 07:46, Sagar Arun Kamble wrote: With guc_log_level parameter sanitized we can remove the GuC submission checks from flush_guc_logs and i915_guc_log_register/unregister and intel_uc_fini_hw. It is important to note that GuC log runtime/relay channel data has to be freed during

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] lib: Add DROP_IDLE

== Series Details == Series: series starting with [1/4] lib: Add DROP_IDLE URL : https://patchwork.freedesktop.org/series/32211/ State : success == Summary == IGT patchset tested on top of latest successful build 9a3f6f59d4c208219f7d3178106bdef628ff68d0 tests/intel-ci: Remove

Re: [Intel-gfx] [PATCH igt 1/4] lib: Add DROP_IDLE

On Wed, 2017-10-18 at 13:34 +0100, Chris Wilson wrote: > A new flag for an old API; now we can request that the driver flush its > idle_worker to release internal caches. > > Signed-off-by: Chris Wilson Whole series is; Reviewed-by: Joonas Lahtinen

Re: [Intel-gfx] [PATCH 04/11] drm/i915/guc: Sanitize module parameter guc_log_level

On 18/10/2017 07:46, Sagar Arun Kamble wrote: Parameter guc_log_level needs to be sanitized based on GuC support and enable_guc_loading parameter since it depends on them like enable_guc_submission. This will make GuC logging paths independent of enable_guc_submission parameter in further

Re: [Intel-gfx] [PATCH v2] drm/i915: Flush the idle-worker for debugfs/i915_drop_caches

On Wed, 2017-10-18 at 13:16 +0100, Chris Wilson wrote: > After being requested to idle the GPU, flush the idle worker to drop the > residual active state, and any internal object caches. > > v2: By popular demand, introduce DROP_IDLE for fine-grained control from > userspace, though it should be

Re: [Intel-gfx] [PATCH 03/11] drm/i915/guc: Pass intel_guc struct parameter to GuC interrupts functions

On 18/10/2017 07:46, Sagar Arun Kamble wrote: GuC interrupts handling functions are GuC specific functions hence update the parameter from dev_priv to intel_guc struct. Signed-off-by: Sagar Arun Kamble Cc: Michal Wajdeczko Cc: Daniele

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2)

== Series Details == Series: drm/i915: Flush the idle-worker for debugfs/i915_drop_caches (rev2) URL : https://patchwork.freedesktop.org/series/32102/ State : success == Summary == Series 32102v2 drm/i915: Flush the idle-worker for debugfs/i915_drop_caches

Re: [Intel-gfx] [PATCH 02/11] drm/i915/guc: Move GuC interrupts related functions from i915_irq.c to intel_guc.c

On 18/10/2017 07:46, Sagar Arun Kamble wrote: GuC interrupts handling is core GuC functionality. Better to keep it with other core functions in intel_guc.c. Since they are used from uC functions, GuC logging, i915 irq handling keeping them grouped in intel_guc.c instead of intel_uc.c.

Re: [Intel-gfx] [PATCH v3 11/22] drm/i915/cnl: Move GT and Display workarounds from init_clock_gating

On Fri, Oct 13, 2017 at 01:54:05PM -0700, Oscar Mateo wrote: > To their rightful place inside intel_workarounds.c > > Signed-off-by: Oscar Mateo > Cc: Rodrigo Vivi > Cc: Chris Wilson > Cc: Mika Kuoppala

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Export low level PM IRQ functions to control from GuC functions

On 18/10/2017 07:46, Sagar Arun Kamble wrote: In order to separate GuC IRQ handling functions from i915_irq.c we need to export the low level pm irq handlers. Export pm_iir, reset_pm_iir and enable/disable_pm_irq functions. Suggested-by: Michal Wajdeczko

[Intel-gfx] [PATCH igt 1/4] lib: Add DROP_IDLE

A new flag for an old API; now we can request that the driver flush its idle_worker to release internal caches. Signed-off-by: Chris Wilson --- lib/igt_debugfs.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/igt_debugfs.h

[Intel-gfx] [PATCH igt 3/4] lib: Flush the driver's internal cache of objects before counting

As the driver itself keeps a cache of objects, these too need to be flushed prior to producing a stable count of objects. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102655 Signed-off-by: Chris Wilson --- lib/igt_debugfs.c | 3 ++- 1 file changed, 2

[Intel-gfx] [PATCH igt 2/4] lib: Idle the GT when quiescing the GPU

As part of the general procedure for ensuring the GPU is idle, we also want to ask the driver to flush its idle_worker. The idle_worker is responsible for releasing both the driver's internal cache of buffers and cache of state (such as the prolonged GT wakeref). By flushing the idle_worker we

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