[Intel-gfx] ✓ Fi.CI.BAT: success for tests/kms_fbcon_fbt: Report fbc_status on error (rev2)

== Series Details == Series: tests/kms_fbcon_fbt: Report fbc_status on error (rev2) URL : https://patchwork.freedesktop.org/series/32256/ State : success == Summary == IGT patchset tested on top of latest successful build abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers

[Intel-gfx] [PATCH i-g-t v2] tests/kms_fbcon_fbt: Report fbc_status on error

knowing the assertion triggered on wait_until_enabled() is not that useful without knowing what exactly caused the failure. It might be an user error, like too little stolen memory by the bios, or an actual issue in the kernel. So, let's make life easier, particularly for the CI, by printing the

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fb-helper: Add .last_close and .output_poll_changed helpers

== Series Details == Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers URL : https://patchwork.freedesktop.org/series/32332/ State : success == Summary == Test kms_setmode: Subgroup basic: pass -> FAIL (shard-hsw) fdo#99912 fdo#99912

Re: [Intel-gfx] [PATCH] drm/i915: Apply Wa Display #1183 on skl, kbl, and cfl.

On Tue, Oct 17, 2017 at 07:25:46PM +, Ville Syrjälä wrote: > On Tue, Oct 17, 2017 at 10:38:19AM -0700, Rodrigo Vivi wrote: > > Wa Display #1183 was recently added to workaround > > "Failures when enabling DPLL0 with eDP link rate 2.16 > > or 4.32 GHz and CD clock frequency 308.57 or 617.14 MHz

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: CNL DVFS thing (rev2)

== Series Details == Series: drm/i915: CNL DVFS thing (rev2) URL : https://patchwork.freedesktop.org/series/32247/ State : success == Summary == Test kms_busy: Subgroup extended-modeset-hang-oldfb-with-reset-render-C: pass -> DMESG-WARN (shard-hsw) fdo#102249 +1

Re: [Intel-gfx] [PATCH 8/8] drm/i915: Adjust system agent voltage on CNL if required by DDI ports

On Wed, Oct 18, 2017 at 08:48:25PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > On CNL we may need to bump up the system agent voltage not only due > to CDCLK but also when driving DDI port with a sufficiently high clock. > To that end start tracking the

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitly

On Thu, Oct 19, 2017 at 01:38:06PM +0300, Ville Syrjälä wrote: > On Wed, Oct 18, 2017 at 02:11:46PM -0700, Manasi Navare wrote: > > On Mon, Oct 16, 2017 at 05:57:01PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > encoder->type is unreliable for

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL

On Thu, Oct 19, 2017 at 10:48:04AM +, Ville Syrjälä wrote: > On Wed, Oct 18, 2017 at 02:50:59PM -0700, Rodrigo Vivi wrote: > > On Wed, Oct 18, 2017 at 08:48:24PM +, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Track the system agent voltage we

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL

On Wed, Oct 18, 2017 at 08:48:22PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Track the system agent voltage we request from pcode in the cdclk state > on SKL/KBL/CFL. Annoyingly we can't actually read out the current value since > there's no pcode

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fb-helper: Add .last_close and .output_poll_changed helpers

== Series Details == Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers URL : https://patchwork.freedesktop.org/series/32332/ State : success == Summary == Series 32332v1 drm/fb-helper: Add .last_close and .output_poll_changed helpers

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Use cdclk_state->voltage on BDW

On Wed, Oct 18, 2017 at 08:48:21PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Track the system agent voltage we request from pcode in the cdclk state > on BDW. Annoyingly we can't actually read out the current value since > there's no pcode command to do

Re: [Intel-gfx] [PATCH v2 3/8] drm/i915: Use cdclk_state->voltage on VLV/CHV

On Thu, Oct 19, 2017 at 05:43:29PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > Store the punit DSPFREQUAR value into cdclk_state->voltage on > VLV/CHV. Since we can actually read that out from the hardware > this can give us a bit more cross checking

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Start tracking voltage level in the cdclk state

On Wed, Oct 18, 2017 at 08:48:19PM +, Ville Syrjala wrote: > From: Ville Syrjälä > > For CNL we'll need to start considering the port clocks when we select > the voltage level for the system agent. To that end start tracking the > voltage in the cdclk state

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev2)

== Series Details == Series: drm/i915: CNL DVFS thing (rev2) URL : https://patchwork.freedesktop.org/series/32247/ State : success == Summary == Series 32247v2 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/ Test kms_flip: Subgroup

[Intel-gfx] [PATCH 13/15] drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Mark Yao Signed-off-by: Noralf Trønnes ---

[Intel-gfx] [PATCH 12/15] drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() in its .lastclose function. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Alex Deucher Cc: "Christian König" Signed-off-by: Noralf Trønnes

[Intel-gfx] [PATCH 14/15] drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Thierry Reding Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/tegra/drm.c |

[Intel-gfx] [PATCH 11/15] drm/omap: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Tomi Valkeinen Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/omapdrm/omap_drv.c

[Intel-gfx] [PATCH 15/15] staging: vboxvideo: Use drm_fb_helper_lastclose()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. Cc: Hans de Goede Signed-off-by: Noralf Trønnes --- drivers/staging/vboxvideo/vbox_drv.c | 2 +- drivers/staging/vboxvideo/vbox_drv.h | 1 -

[Intel-gfx] [PATCH 10/15] drm/nouveau: Use drm_fb_helper_output_poll_changed()

This driver can use drm_fb_helper_output_poll_changed() instead of its own nouveau_fbcon_output_poll_changed(). Cc: Ben Skeggs Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/nouveau/nouveau_display.c | 3 ++- drivers/gpu/drm/nouveau/nouveau_fbcon.c

[Intel-gfx] [PATCH 03/15] drm/fb-helper: Add .last_close and .output_poll_changed helpers

This adds helpers for the drm_driver->last_close and the drm_mode_config_funcs->output_poll_changed callbacks. Signed-off-by: Noralf Trønnes Reviewed-by: Daniel Vetter --- drivers/gpu/drm/drm_fb_helper.c | 28

[Intel-gfx] [PATCH 08/15] drm/i915: Use drm_fb_helper_output_poll_changed()

This driver can use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Jani Nikula Cc: Joonas Lahtinen Cc: Rodrigo Vivi Signed-off-by: Noralf Trønnes ---

[Intel-gfx] [PATCH 07/15] drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Patrik Jakobsson Signed-off-by: Noralf Trønnes ---

[Intel-gfx] [PATCH 01/15] drm/fb-helper: Handle function NULL argument

Make functions tolerate that the drm_fb_helper argument is NULL. This is useful for drivers that continue probing when fbdev emulation fails and not having to do this check themselves. Update docs for functions that already handles this. Signed-off-by: Noralf Trønnes

[Intel-gfx] [PATCH 05/15] drm/armada: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Russell King Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/armada/armada_drm.h

[Intel-gfx] [PATCH 02/15] drm: Add drm_device->drm_fb_helper_private pointer

drm_fb_helper is *the* way of doing fbdev emulation so add a pointer to struct drm_device. This makes it possible to add callback helpers for .last_close and .output_poll_changed further reducing fbdev emulation footprint in drivers. The pointer is set by drm_fb_helper_init() and cleared by

[Intel-gfx] [PATCH 06/15] drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Inki Dae Cc: Joonyoung Shim Cc: Seung-Woo Kim Cc:

[Intel-gfx] [PATCH 09/15] drm/msm: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() as its .lastclose callback. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Rob Clark Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/msm/msm_drv.c | 18

[Intel-gfx] [PATCH 04/15] drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()

This driver can use drm_fb_helper_lastclose() in its .lastclose function. It can also use drm_fb_helper_output_poll_changed() as its .output_poll_changed callback. Cc: Alex Deucher Cc: "Christian König" Signed-off-by: Noralf Trønnes

[Intel-gfx] [PATCH 00/15] drm/fb-helper: Add .last_close and .output_poll_changed helpers

This patchset adds fbdev .last_close and .output_poll_changed helpers to reduce fbdev emulation footprint in drivers. I don't know which drivers have their own tree or not, so if you want me to apply your patch to drm-misc, please let me know. I will do a separate patchset for the cma helper

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)

== Series Details == Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) URL : https://patchwork.freedesktop.org/series/32305/ State : success == Summary == Test kms_force_connector_basic: Subgroup force-load-detect: skip -> PASS (shard-hsw) Test

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)

== Series Details == Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) URL : https://patchwork.freedesktop.org/series/32305/ State : success == Summary == Series 32305v3 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

Starting on CNL we now need to map VBT DDC Pin to BSPec DDC Pin values. Not a direct translation anymore. According to VBT Block 2 (General Bytes Definition) DDC Bus +--+---++ | DDI Type | VBT Value | Bspec Mapped Value |

[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev2)

== Series Details == Series: igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev2) URL : https://patchwork.freedesktop.org/series/32272/ State : failure == Summary == IGT patchset tested on top of latest successful build abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Guc/HuC firmware details to error state (rev3)

== Series Details == Series: drm/i915: Add Guc/HuC firmware details to error state (rev3) URL : https://patchwork.freedesktop.org/series/32293/ State : failure == Summary == Series 32293v3 drm/i915: Add Guc/HuC firmware details to error state

[Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Remove manual gem_sync() calls

Emphasize that we want to test synchronisation using the dmabuf API (prime_sync_start, prime_sync_end) and so drop the manual synchronisation using the GEM API (gem_sync). Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter ---

[Intel-gfx] [PATCH v3] drm/i915: Add Guc/HuC firmware details to error state

Include GuC and HuC firmware details in captured error state to provide additional debug information. To reuse existing uc firmware pretty printer, introduce new drm-printer variant that works with our i915_error_state_buf output. Also update uc firmware pretty printer to accept const input. v2:

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

On 19/10/17 11:12, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2017-10-18 17:50:33) On 18/10/17 09:04, Chris Wilson wrote: Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24) On 13/10/17 09:37, Daniele Ceraolo Spurio wrote: On 13/10/17 01:31, Chris Wilson wrote: Quoting

[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing (rev2)

== Series Details == Series: drm/i915: CNL DVFS thing (rev2) URL : https://patchwork.freedesktop.org/series/32247/ State : warning == Summary == Series 32247v2 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/ Test kms_flip: Subgroup

Re: [Intel-gfx] [PATCH 13/14] drm/i915/guc: Workaround the missing user interrupt after preemption

Quoting Michał Winiarski (2017-10-19 19:36:18) > With GuC, we're scheduling tasklet on USER_INTERRUPT - since some work > has completed, perhaps we're able to submit some more work. We're doing > similar thing for preemption - after preemption has completed, it's time > to schedule the tasklet and

Re: [Intel-gfx] [PATCH v2 06/14] drm/i915/guc: Add a second client, to be used for preemption

On Thu, 19 Oct 2017 20:36:11 +0200, Michał Winiarski wrote: From: Dave Gordon This second client is created with priority KMD_HIGH, and marked as preemptive. This will allow us to request preemption using GuC actions. v2: Extract

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Guc/HuC firmware details to error state (rev2)

== Series Details == Series: drm/i915: Add Guc/HuC firmware details to error state (rev2) URL : https://patchwork.freedesktop.org/series/32293/ State : failure == Summary == Series 32293v2 drm/i915: Add Guc/HuC firmware details to error state

Re: [Intel-gfx] [PATCH v2] drm/i915: Add Guc/HuC firmware details to error state

Quoting Michal Wajdeczko (2017-10-19 20:02:57) > +static void i915_capture_uc_state(struct drm_i915_private *dev_priv, > + struct i915_gpu_state *error) > +{ > + error->guc_fw = dev_priv->guc.fw; > + error->huc_fw = dev_priv->huc.fw; > + > + /*

Re: [Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

Quoting Michał Winiarski (2017-10-19 19:36:16) > @@ -855,10 +853,10 @@ static void intel_lrc_irq_handler(unsigned long data) > > if (status & GEN8_CTX_STATUS_ACTIVE_IDLE && > buf[2*head + 1] == PREEMPT_ID) { > -

Re: [Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

Quoting Michał Winiarski (2017-10-19 19:36:16) > diff --git a/drivers/gpu/drm/i915/intel_lrc.c > b/drivers/gpu/drm/i915/intel_lrc.c > index f9852c422ea0..dd4708904c85 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -354,8 +354,11 @@ static void

Re: [Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

Quoting Michał Winiarski (2017-10-19 19:36:17) > diff --git a/drivers/gpu/drm/i915/intel_lrc.h > b/drivers/gpu/drm/i915/intel_lrc.h > index 689fde1a63a9..17182ce29674 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.h > +++ b/drivers/gpu/drm/i915/intel_lrc.h > @@ -107,7 +107,6 @@

Re: [Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

Quoting Michał Winiarski (2017-10-19 19:36:17) > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index ef14c6d570dc..7d52baf4f3bd 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -2904,6 +2904,16 @@

[Intel-gfx] ✗ Fi.CI.BAT: failure for Preemption with GuC, third attempt

== Series Details == Series: Preemption with GuC, third attempt URL : https://patchwork.freedesktop.org/series/32320/ State : failure == Summary == Series 32320v1 Preemption with GuC, third attempt https://patchwork.freedesktop.org/api/1.0/series/32320/revisions/1/mbox/ Test gem_ringfill:

[Intel-gfx] [PATCH v2] drm/i915: Add Guc/HuC firmware details to error state

Include GuC and HuC firmware details in captured error state to provide additional debug information. To reuse existing uc firmware pretty printer, introduce new drm-printer variant that works with our i915_error_state_buf output. Also update uc firmware pretty printer to accept const input. v2:

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2)

== Series Details == Series: drm/i915: CNL DVFS thing (rev2) URL : https://patchwork.freedesktop.org/series/32247/ State : failure == Summary == Series 32247v2 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/ Test kms_busy: Subgroup

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

== Series Details == Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks URL : https://patchwork.freedesktop.org/series/32301/ State : success == Summary == Test kms_flip: Subgroup plain-flip-fb-recreate-interruptible: pass

Re: [Intel-gfx] [PATCH] drm/i915: Add Guc/HuC firmware details to error state

On Thu, 19 Oct 2017 15:30:44 +0200, Chris Wilson wrote: Quoting Michal Wajdeczko (2017-10-19 13:57:06) @@ -774,6 +793,11 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m, err_print_capabilities(m, >device_info);

[Intel-gfx] [PATCH 13/14] drm/i915/guc: Workaround the missing user interrupt after preemption

With GuC, we're scheduling tasklet on USER_INTERRUPT - since some work has completed, perhaps we're able to submit some more work. We're doing similar thing for preemption - after preemption has completed, it's time to schedule the tasklet and submit more work (since the engine is now idle).

[Intel-gfx] [PATCH 14/14] HAX Enable GuC Submission for CI

Also: Revert "drm/i915/guc: Assert that we switch between known ggtt->invalidate functions" This reverts commit 04f7b24eccdfae680a36e9825fe0d61dcd5ed528. --- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++-- drivers/gpu/drm/i915/i915_params.h | 4 ++-- 2 files changed, 4 insertions(+), 8

[Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

We would also like to make use of execlist_cancel_port_requests and unwind_incomplete_requests in GuC preemption backend. Let's rename the functions to use the correct prefixes, so that we can simply add the declarations in the following patch. Similar thing for applies for can_preempt, except

[Intel-gfx] [PATCH 10/14] drm/i915/guc: Keep request->priority for its lifetime

We also want to support preemption with GuC submission backend. In order to do that, we need to remember the priority, like we do on execlists path. Signed-off-by: Michał Winiarski Cc: Chris Wilson Cc: Jeff McGee Cc:

[Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

Pretty similar to what we have on execlists. We're reusing most of the GEM code, however, due to GuC quirks we need a couple of extra bits. Preemption is implemented as GuC action, and actions can be pretty slow. Because of that, we're using a mutex to serialize them. Since we're requesting

[Intel-gfx] [PATCH 09/14] drm/i915: Add information needed to track engine preempt state

We shouldn't inspect ELSP context status (or any other bits depending on specific submission backend) when using GuC submission. Let's use another piece of HWSP for preempt context, to write its bit of information, meaning that preemption has finished, and hardware is now idle. Signed-off-by:

[Intel-gfx] [PATCH v2 08/14] drm/i915: Extract "emit write" part of emit breadcrumb functions

Let's separate the "emit" part from touching any internal structures, this way we can have a generic "emit coherent GGTT write" function. We would like to reuse this functionality for emitting HWSP write, to confirm that preempt-to-idle has finished. v2: Reorder args to match emit_pipe_control,

[Intel-gfx] [PATCH 07/14] drm/i915/guc: Split guc_wq_item_append

We're using a special preempt context for HW to preempt into. We don't want to emit any requests there, but we still need to wrap this context into a valid GuC work item. Let's cleanup the functions operating on GuC work items. We can extract guc_request_add - responsible for adding GuC work item

[Intel-gfx] [PATCH 05/14] drm/i915/guc: Add preemption action to GuC firmware interface

We're using GuC action to request preemption. However, after requesting preemption we need to wait for GuC to finish its own post-processing before we start submitting our requests. Firmware is using shared context to report its status. Let's update GuC firmware interface with those new

[Intel-gfx] [PATCH v2 06/14] drm/i915/guc: Add a second client, to be used for preemption

From: Dave Gordon This second client is created with priority KMD_HIGH, and marked as preemptive. This will allow us to request preemption using GuC actions. v2: Extract clients creation into a helper, debugfs fixups. (Michał) Recreate doorbell on init. (Daniele) Move

[Intel-gfx] [PATCH 04/14] drm/i915/guc: Initialize GuC before restarting engines

Now that we're handling request resubmission the same way as regular submission (from the tasklet), we can move GuC initialization earlier, before restarting the engines. This way, we're no longer being in the state of flux during engine restart - we're already in user requested submission mode.

[Intel-gfx] [PATCH 02/14] drm/i915/guc: Extract GuC stage desc pool creation into a helper

Since it's a two-step process, we can have a cleaner error handling in the caller if we do the allocations in a helper. Signed-off-by: Michał Winiarski Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Cc: Jeff

[Intel-gfx] [PATCH v2 03/14] drm/i915/guc: Allocate separate shared data object for GuC communication

We were using first page of kernel context render state for sharing data with GuC. While it's justified by the fact that those pages are not used (note, GuC still enforces this layout and refuses to work if we remove the extra page in front), it's also confusing (why are we using this particular

[Intel-gfx] [PATCH 01/14] drm/i915/guc: Do not use 0 for GuC doorbell cookie

Apparently, this value is reserved and may be interpreted as changing doorbell ownership. Even though we're not observing any side effects now, let's skip over it to be consistent with the spec. Suggested-by: Sagar Arun Kamble Signed-off-by: Michał Winiarski

[Intel-gfx] [PATCH 00/14] Preemption with GuC, third attempt

It turns out that preempt failures were caused by GuC not expecting multiple workitems when preempt action was requested. Another thing that deserves attention is the workaround for missing USER_INTERRUPT. The value I've used for the delayed work timer is just a semi-educated guess at this point.

Re: [Intel-gfx] [PATCH i-g-t v2 3/3] igt: Add VC4 purgeable BO tests

Boris Brezillon writes: > Signed-off-by: Boris Brezillon I got a build error without including . Rebased branch with that changed is "purgeable" in my tree. signature.asc Description: PGP signature

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2)

== Series Details == Series: drm/i915: CNL DVFS thing (rev2) URL : https://patchwork.freedesktop.org/series/32247/ State : failure == Summary == Series 32247v2 drm/i915: CNL DVFS thing https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/ Test kms_busy: Subgroup

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

Quoting Daniele Ceraolo Spurio (2017-10-18 17:50:33) > > > On 18/10/17 09:04, Chris Wilson wrote: > > Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24) > >> > >> > >> On 13/10/17 09:37, Daniele Ceraolo Spurio wrote: > >>> > >>> > >>> On 13/10/17 01:31, Chris Wilson wrote: > Quoting Chris

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

== Series Details == Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks URL : https://patchwork.freedesktop.org/series/32301/ State : success == Summary == Series 32301v1 series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK

[Intel-gfx] [PATCH v2 3/8] drm/i915: Use cdclk_state->voltage on VLV/CHV

From: Ville Syrjälä Store the punit DSPFREQUAR value into cdclk_state->voltage on VLV/CHV. Since we can actually read that out from the hardware this can give us a bit more cross checking between the hardware and software state. v2: Don't break waiting for cdclk

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing

On Wed, Oct 18, 2017 at 09:07:37PM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: CNL DVFS thing > URL : https://patchwork.freedesktop.org/series/32247/ > State : warning > > == Summary == > > Series 32247v1 drm/i915: CNL DVFS thing >

Re: [Intel-gfx] [PATCH i-g-t 5/8] tools/intel_vbt_decode: unify child device printing across versions

On Thu, Oct 19, 2017 at 06:22:56PM +0300, Jani Nikula wrote: > Make it easier to compare dumping against the struct definition. > > Signed-off-by: Jani Nikula > --- > tools/intel_vbt_decode.c | 128 > ++- > 1 file changed, 71

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)

== Series Details == Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) URL : https://patchwork.freedesktop.org/series/32305/ State : success == Summary == Test kms_busy: Subgroup extended-modeset-hang-newfb-with-reset-render-B: pass -> DMESG-WARN

[Intel-gfx] ✗ Fi.CI.BAT: failure for lib: Ask the kernel to quiesce the GPU (rev2)

== Series Details == Series: lib: Ask the kernel to quiesce the GPU (rev2) URL : https://patchwork.freedesktop.org/series/31850/ State : failure == Summary == IGT patchset tested on top of latest successful build abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers before

[Intel-gfx] ✗ Fi.CI.BAT: failure for tools/intel_vbt_decode: refactoring and cleanups

== Series Details == Series: tools/intel_vbt_decode: refactoring and cleanups URL : https://patchwork.freedesktop.org/series/32302/ State : failure == Summary == IGT patchset tested on top of latest successful build abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)

== Series Details == Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) URL : https://patchwork.freedesktop.org/series/32305/ State : success == Summary == Series 32305v2 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Series Details == Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. URL : https://patchwork.freedesktop.org/series/32305/ State : success == Summary == Series 32305v1 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

On Thu, Oct 19, 2017 at 08:45:21AM -0700, Rodrigo Vivi wrote: > Starting on CNL we now need to map VBT DDC Pin to > BSPec DDC Pin values. Not a direct translation anymore. > > According to VBT > Block 2 (General Bytes Definition) > DDC Bus > > +--+---++ > |

[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

Starting on CNL we now need to map VBT DDC Pin to BSPec DDC Pin values. Not a direct translation anymore. According to VBT Block 2 (General Bytes Definition) DDC Bus +--+---++ | DDI Type | VBT Value | Bspec Mapped Value |

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Move execlists port head instead of memmoving array

Quoting Mika Kuoppala (2017-10-19 15:39:42) > From: Mika Kuoppala > > As all our access to execlist ports are through head and tail > helpers, we can now move the head instead of memmoving the array. > > Cc: Michał Winiarski > Cc: Joonas

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

== Series Details == Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks URL : https://patchwork.freedesktop.org/series/32301/ State : warning == Summary == Series 32301v1 series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK

[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

Starting on CNL we now need to map VBT DDC Pin to BSPec DDC Pin values. Not a direct translation anymore. According to VBT Block 2 (General Bytes Definition) DDC Bus +--+---++ | DDI Type | VBT Value | Bspec Mapped Value |

[Intel-gfx] [PATCH igt] lib: Ask the kernel to quiesce the GPU

Since the introduction of debugfs/i915_drop_caches, we have offered the ability to wait upon all outstanding batches. This is more efficient and less error prone (one example is the use of context priorities, we have to idle at the lowest in order not to jump over any low priority tasks we want to

[Intel-gfx] [PATCH i-g-t 8/8] tools/intel_vbt_decode: abstract child devices printing more

Unify the common code for current and legacy blocks. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 70 +--- 1 file changed, 31 insertions(+), 39 deletions(-) diff --git a/tools/intel_vbt_decode.c

[Intel-gfx] [PATCH i-g-t 1/8] tools/intel_vbt_decode: make a copy of child devices before dumping

Take child device size into account, avoid reading past the actual child device. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 20 ++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/tools/intel_vbt_decode.c

[Intel-gfx] [PATCH i-g-t 3/8] tools/intel_vbt_decode: use %.*s instead of duplicating a string

child->device_id may not be terminated, but we can use %.*s format specifier to define the max length to print. No need to make a copy. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t 7/8] tools/intel_vbt_decode: dump more child device data for version < 152

There's no evidence that this is the limit. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c index 3cce60bf2ee2..ebc65b82bbde 100644 ---

[Intel-gfx] [PATCH i-g-t 5/8] tools/intel_vbt_decode: unify child device printing across versions

Make it easier to compare dumping against the struct definition. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 128 ++- 1 file changed, 71 insertions(+), 57 deletions(-) diff --git a/tools/intel_vbt_decode.c

[Intel-gfx] [PATCH i-g-t 6/8] tools/intel_vbt_decode: unify legacy child device block dumping

It's the same stuff as in the new child devices. Signed-off-by: Jani Nikula --- tools/intel_bios.h | 30 +++--- tools/intel_vbt_decode.c | 37 + 2 files changed, 24 insertions(+), 43 deletions(-) diff

[Intel-gfx] [PATCH i-g-t 2/8] tools/intel_vbt_decode: update dvo port name dumping

Add names for new ports, throw out unused macros. Signed-off-by: Jani Nikula --- tools/intel_bios.h | 12 tools/intel_vbt_decode.c | 47 +-- 2 files changed, 25 insertions(+), 34 deletions(-) diff --git

[Intel-gfx] [PATCH i-g-t 4/8] tools/intel_vbt_decode: abstract DSI bridge type dump

Cleaner than having it inline. Signed-off-by: Jani Nikula --- tools/intel_vbt_decode.c | 31 --- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c index

[Intel-gfx] [PATCH i-g-t 0/8] tools/intel_vbt_decode: refactoring and cleanups

Flush some old branches to the list... BR, Jani. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

The original intent was to preserve watermarks as much as possible in intel_pipe_wm.raw_wm, and put the validated ones in intel_pipe_wm.wm. It seems this approach is insufficient and we don't always preserve the raw watermarks, so just use the atomic iterator we're already using to get a const

[Intel-gfx] [PATCH 2/2] drm/i915: Calculate ironlake intermediate watermarks correctly, v2.

The watermarks it should calculate against are the old optimal watermarks. The currently active crtc watermarks are pure fiction, and are invalid in case of a nonblocking modeset, page flip enabling/disabling planes or any other reason. When the crtc is disabled or during a modeset the

[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Introduce execlist_port_* accessors

== Series Details == Series: series starting with [1/2] drm/i915: Introduce execlist_port_* accessors URL : https://patchwork.freedesktop.org/series/32300/ State : warning == Summary == Series 32300v1 series starting with [1/2] drm/i915: Introduce execlist_port_* accessors

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Last part of DDI encoder->type cleanup

== Series Details == Series: drm/i915: Last part of DDI encoder->type cleanup URL : https://patchwork.freedesktop.org/series/32298/ State : success == Summary == Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (shard-hsw) fdo#102707 Test

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Introduce execlist_port_* accessors

Quoting Mika Kuoppala (2017-10-19 15:39:41) > +#define __port_add(start, n, mask) (((start) + (n)) & (mask)) > +#define port_head_add(e, n) __port_add((e)->port_head, n, (e)->port_mask) > + > +/* Index starting from port_head */ > +static inline struct execlist_port * > +execlists_port(struct

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Introduce execlist_port_* accessors

Quoting Mika Kuoppala (2017-10-19 15:39:41) > while (test_bit(ENGINE_IRQ_EXECLIST, >irq_posted)) { > + struct execlist_port *port; > + > /* The HWSP contains a (cacheable) mirror of the CSB */ > const u32 *buf = > >

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