[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6)

2018-05-25 Thread Patchwork
== Series Details == Series: drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6) URL : https://patchwork.freedesktop.org/series/40478/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4244_full -> Patchwork_9127_full = == Summary - WARNING == Minor unknown changes

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev4)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev4) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4244_full -> Patchwork_9126_full = == Summary - SUCCESS == No regressions found.

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Measure sampler intervals

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Measure sampler intervals URL : https://patchwork.freedesktop.org/series/43795/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4243_full -> Patchwork_9124_full = == Summary - WARNING == Minor unknown changes coming with Patchwork

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: fix icl_unmap/map_plls_to_ports (rev2)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/icl: fix icl_unmap/map_plls_to_ports (rev2) URL : https://patchwork.freedesktop.org/series/43510/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4242_full -> Patchwork_9123_full = == Summary - WARNING == Minor unknown changes coming w

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove stale asserts from i915_gem_find_active_request()

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915: Remove stale asserts from i915_gem_find_active_request() URL : https://patchwork.freedesktop.org/series/43781/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4242_full -> Patchwork_9122_full = == Summary - SUCCESS == No regressions f

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: Switch to kernel context before idling at runtime

2018-05-25 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: Switch to kernel context before idling at runtime URL : https://patchwork.freedesktop.org/series/43808/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4246 -> Patchwork_9132 = == Summary - SUCCESS == No

[Intel-gfx] ✓ Fi.CI.BAT: success for Workarounds for Icelake (rev4)

2018-05-25 Thread Patchwork
== Series Details == Series: Workarounds for Icelake (rev4) URL : https://patchwork.freedesktop.org/series/42055/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4246 -> Patchwork_9131 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.free

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: New interface files for GuC starting in Gen11

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/guc: New interface files for GuC starting in Gen11 URL : https://patchwork.freedesktop.org/series/43806/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4246 -> Patchwork_9130 = == Summary - SUCCESS == No regressions found. External

[Intel-gfx] [CI 2/2] drm/i915: "Race-to-idle" after switching to the kernel context

2018-05-25 Thread Chris Wilson
During suspend we want to flush out all active contexts and their rendering. To do so we queue a request from the kernel's context, once we know that request is done, we know the GPU is completely idle. To speed up that switch bump the GPU clocks. Switching to the kernel context prior to idling is

[Intel-gfx] [CI 1/2] drm/i915: Switch to kernel context before idling at runtime

2018-05-25 Thread Chris Wilson
We can reduce our exposure to random neutrinos by resting on the kernel context having flushed out the user contexts to system memory and beyond. The corollary is that we then we require two passes through the idle handler to go to sleep, which on a truly idle system involves an extra pass through

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: New interface files for GuC starting in Gen11

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/guc: New interface files for GuC starting in Gen11 URL : https://patchwork.freedesktop.org/series/43806/ State : warning == Summary == $ dim checkpatch origin/drm-tip b16e12e83432 drm/i915/guc: New interface files for GuC starting in Gen11 -:38: WARNING:FI

[Intel-gfx] [PATCH 11/11] drm/i915/icl: Wa_1406463099

2018-05-25 Thread Oscar Mateo
Prevents an error in the GAM unit. Also known as WaGamTlbPendError References: HSDES#1406463099 References: HSDES#1406465643 Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 5 +++-- drivers/gpu/drm/i915/intel_workarounds.c | 7 +++ 2 files changed, 10 insertions(+),

[Intel-gfx] [PATCH 04/11] drm/i915/icl: WaEnableFloatBlendOptimization

2018-05-25 Thread Oscar Mateo
Enables blend optimization for floating point RTs v2: Rebased on top of the WA refactoring v3: Added References (Mika) References: HSDES#1406393558 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_workarounds.c | 3 ++

[Intel-gfx] [PATCH 10/11] drm/i915/icl: WaEnablePreemptionGranularityControlByUMD

2018-05-25 Thread Oscar Mateo
Apparently HW did not whitelist this register properly. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. References: HSDES#1305642430 Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/int

[Intel-gfx] [PATCH 02/11] drm/i915/icl: WaEnableStateCacheRedirectToCS

2018-05-25 Thread Oscar Mateo
Redirects the state cache to the CS Command buffer section for performance reasons. v2: Rebased v3: Rebased on top of the WA refactoring v3: Added References (Mika) References: HSDES#1604325460 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 1 + dri

[Intel-gfx] [PATCH 08/11] drm/i915/icl: WaAllowUmdWriteTRTTRootTable

2018-05-25 Thread Oscar Mateo
Required for TR-TT (Tiled Resource Translation Table) support. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: For whatever reason, this ended up in KBL (??!!) v3: Rebased on top of the

[Intel-gfx] [PATCH 03/11] drm/i915/icl: Wa_2006665173

2018-05-25 Thread Oscar Mateo
Disable blend embellishment in RCC. Also, some other registers style fixed in passing. v2: Rebased on top of the WA refactoring v3: Added References (Mika) v4: - Fixed in B0 - Mentioned style fixes in commit message References: HSDES#2006665173 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo

[Intel-gfx] [PATCH 06/11] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken2

2018-05-25 Thread Oscar Mateo
Required to dinamically set 'Small PL Lossless Fix Enable' Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: For whatever reason, this ended up in KBL (??!!) v3: Rebased on top of the WA r

[Intel-gfx] [PATCH 05/11] drm/i915/icl: WaSendPushConstantsFromMMIO

2018-05-25 Thread Oscar Mateo
Allows UMDs to set 'Disable Gather at Set Shader Common Slice'. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it... v2: Rebased v3: Rebased on top of the WA refactoring v4: Rebased on top of t

[Intel-gfx] [PATCH v4 00/11] Workarounds for Icelake

2018-05-25 Thread Oscar Mateo
The remaining WA patches that haven't been merged to date, plus two new ones (WaEnablePreemptionGranularityControlByUMD & Wa_1406463099). Oscar Mateo (11): drm/i915/icl: WaDisableImprovedTdlClkGating drm/i915/icl: WaEnableStateCacheRedirectToCS drm/i915/icl: Wa_2006665173 drm/i915/icl: WaE

[Intel-gfx] [PATCH 07/11] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7

2018-05-25 Thread Oscar Mateo
Required to dinamically set 'Trilinear Filter Quality Mode' Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: For whatever reason, this ended up in KBL (??!!) v3: Rebased on top of the WA

[Intel-gfx] [PATCH 09/11] drm/i915/icl: WaAllowUMDToModifySamplerMode

2018-05-25 Thread Oscar Mateo
Required for Bindless samplers. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: Rebased on top of the WA refactoring (Michel) v3: Added References (Mika) References: HSDES#1404695891 Cc

[Intel-gfx] [PATCH 01/11] drm/i915/icl: WaDisableImprovedTdlClkGating

2018-05-25 Thread Oscar Mateo
Revert to the legacy implementation. v2: GEN7_ROW_CHICKEN2 is masked v3: - Rebased - Renamed to Wa_2006611047 - A0 and B0 only v4: - Add spaces around '<<' (and fix the surrounding code as well) - Mark the WA as pre-prod v5: Rebased on top of the WA refactoring v6: Added References (Mika

[Intel-gfx] [RFC PATCH] drm/i915/guc: New interface files for GuC starting in Gen11

2018-05-25 Thread Oscar Mateo
GuC interface has been redesigned (or cleaned up, rather) starting with Gen11, as a stepping stone towards a new branching strategy that helps maintain backwards compatibility with previous Gens, as well as sideward compatibility with other OSes. The interface is split in two header files: one for

Re: [Intel-gfx] [PATCH] drm/i915 : clip yuv primary planes to hw constraints

2018-05-25 Thread Fritz Koenig
On Fri, May 25, 2018 at 11:12 AM Ville Syrjälä < ville.syrj...@linux.intel.com> wrote: > On Fri, May 25, 2018 at 11:00:23AM -0700, Fritz Koenig wrote: > > YUV planes need to be multiples of 2 to scan out. This was > > handled correctly for planes other than the primary in the > > intel_check_sprit

[Intel-gfx] ✗ Fi.CI.BAT: failure for More ICL display patches (rev11)

2018-05-25 Thread Patchwork
== Series Details == Series: More ICL display patches (rev11) URL : https://patchwork.freedesktop.org/series/43546/ State : failure == Summary == Applying: drm/i915/icl: Extend AUX F interrupts to ICL Applying: drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Applying: drm/i915/icl: i

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915 : clip yuv primary planes to hw constraints (rev2)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915 : clip yuv primary planes to hw constraints (rev2) URL : https://patchwork.freedesktop.org/series/43796/ State : failure == Summary == Applying: drm/i915 : clip yuv primary planes to hw constraints error: Failed to merge in the changes. Using index info to

Re: [Intel-gfx] [PATCH v2] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

2018-05-25 Thread Chris Wilson
Quoting Dhinakaran Pandiyan (2018-05-25 20:43:13) > The Graphics System Event(GSE) interrupt bit has a new location in the > GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registers. Since GSE was the only > DE_MISC interrupt that was enabled, with this change we don't enable/handle > any of DE_MISC interr

[Intel-gfx] [PATCH v2] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

2018-05-25 Thread Dhinakaran Pandiyan
The Graphics System Event(GSE) interrupt bit has a new location in the GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registers. Since GSE was the only DE_MISC interrupt that was enabled, with this change we don't enable/handle any of DE_MISC interrupts for gen11. Credits to Paulo for pointing out the regi

Re: [Intel-gfx] [PATCH v5] drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c

2018-05-25 Thread Chris Wilson
Quoting Michal Wajdeczko (2018-05-25 13:18:58) > Some functions already use i915 name instead of dev_priv. > Let's rename this param in all remaining functions, except > those that still use legacy macros. > > v2: don't forget about function descriptions (Sagar) > v3: rebased > v4: rebased > v5: r

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6)

2018-05-25 Thread Patchwork
== Series Details == Series: drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6) URL : https://patchwork.freedesktop.org/series/40478/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4244 -> Patchwork_9127 = == Summary - WARNING == Minor unknown changes coming wi

[Intel-gfx] [PATCH] drm/i915 : clip yuv primary planes to hw constraints

2018-05-25 Thread Fritz Koenig
YUV planes need to be multiples of 2 to scan out. This was handled correctly for planes other than the primary in the intel_check_sprite_plane, where the code fixes up the plane and makes it compliant. Move this code into a location that allows the primary check to access it as well. Signed-off-by

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Simplify ilk-ivb underrun suppression

2018-05-25 Thread Ville Syrjälä
On Fri, May 25, 2018 at 04:55:36PM +0100, Chris Wilson wrote: > Quoting Ville Syrjälä (2018-05-25 16:43:42) > > On Fri, May 25, 2018 at 04:20:07PM +0100, Chris Wilson wrote: > > > Quoting Ville Syrjala (2018-05-24 20:04:06) > > > > From: Ville Syrjälä > > > > > > > > Let's suppress the underruns

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6)

2018-05-25 Thread Patchwork
== Series Details == Series: drm: Eliminate plane->fb/crtc usage for atomic drivers (rev6) URL : https://patchwork.freedesktop.org/series/40478/ State : warning == Summary == $ dim checkpatch origin/drm-tip 727d70b71efd drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset() e501808

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen11: Preempt-to-idle support in execlists. (rev4)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev4) URL : https://patchwork.freedesktop.org/series/40747/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4244 -> Patchwork_9126 = == Summary - WARNING == Minor unknown changes coming wit

[Intel-gfx] [PATCH v3 06/24] drm/i915/icl: Add register definition for DFLEXDPMLE

2018-05-25 Thread Manasi Navare
DFLEXDPMLE register is required to tell the FIA hardware which main links of DP are enabled on TCC Connectors. FIA uses this information to program PHY to Controller signal mapping. This register is applicable in both TC connector's Alternate mode as well as DP connector mode. v2: * Remove _ICL pr

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c URL : https://patchwork.freedesktop.org/series/43770/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4238_full -> Patchwork_9121_full = == Summary - WARNING == Minor unknown changes coming wit

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev4)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev4) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/gen11: Preempt-to-idle support in execlists. -drivers/gpu/drm/i915/selftest

[Intel-gfx] [PATCH v2 13/13] drm: Stop updating plane->crtc/fb/old_fb on atomic drivers

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä Stop playing around with plane->crtc/fb/old_fb with atomic drivers. Make life a lot simpler when we don't have to do the magic old_fb vs. fb dance around plane updates. That way we can't risk plane->fb getting out of sync with plane->state->fb and we're less likely to leak any

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gen11: Preempt-to-idle support in execlists. (rev4)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/gen11: Preempt-to-idle support in execlists. (rev4) URL : https://patchwork.freedesktop.org/series/40747/ State : warning == Summary == $ dim checkpatch origin/drm-tip e56337e6a35d drm/i915/gen11: Preempt-to-idle support in execlists. -:133: CHECK:COMPARIS

[Intel-gfx] [PATCH v2 12/13] drm/vc4: Stop updating plane->fb/crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->fb/crtc on atomic drivers. Stop setting them. Cc: Eric Anholt Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst Reviewed-by: Daniel Vetter --- drivers/gpu/drm/vc4/vc4_crtc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/driv

[Intel-gfx] [PATCH v2 06/13] drm/vmwgfx: Stop messing about with plane->fb/old_fb/crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä plane->fb/old_fb/crtc should no longer be used by atomic drivers. Stop messing about with them. Cc: Deepak Rawat Cc: Thomas Hellstrom Cc: Sinclair Yeh Cc: VMware Graphics Cc: Daniel Vetter Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 24 ---

[Intel-gfx] [PATCH v2 07/13] drm/amdgpu/dc: Stop updating plane->fb

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->fb on atomic drivers. Stop setting it. Cc: Alex Deucher Cc: "Christian König" Cc: "David (ChunMing) Zhou" Cc: Harry Wentland Cc: amd-...@lists.freedesktop.org Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst Reviewed-by: Harry Wen

[Intel-gfx] [PATCH v2 09/13] drm/exynos: Stop updating plane->crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->crtc on atomic drivers. Stop setting it. Cc: Inki Dae Cc: Joonyoung Shim Cc: Seung-Woo Kim Cc: Kyungmin Park Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst Reviewed-by: Daniel Vetter Acked-by: Inki Dae --- drivers/gpu/drm/exy

[Intel-gfx] [PATCH v2 11/13] drm/virtio: Stop updating plane->crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->crtc on atomic drivers. Stop setting it. v2: s/fb/crtc/ in the commit message (Gerd) Cc: David Airlie Cc: Gerd Hoffmann Cc: virtualizat...@lists.linux-foundation.org Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst Reviewed-by: Dan

[Intel-gfx] [PATCH v2 10/13] drm/msm: Stop updating plane->fb/crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->fb/crtc on atomic drivers. Stop setting them. v2: Catch a few more cases Cc: Rob Clark Cc: linux-arm-...@vger.kernel.org Cc: freedr...@lists.freedesktop.org Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst #v1 Reviewed-by: Daniel Ve

[Intel-gfx] [PATCH v2 05/13] drm/vmwgfx: Stop using plane->fb in atomic_enable()

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä Instead of looking at the (soon to be deprecated) plane->fb we'll examing plane->state->fb instead. We can do this because vmw_du_crtc_atomic_check() prevents us from enabling a crtc without the primary plane also being enabled. Due to that same reason, I'm actually not sure

[Intel-gfx] [PATCH v2 08/13] drm/i915: Stop updating plane->fb/crtc

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->fb/crtc on atomic drivers. Stop setting them. v2: Fix up the comment in intel_crtc_active() and nuke the rest of the stale comments (Daniel) Signed-off-by: Ville Syrjälä Reviewed-by: Maarten Lankhorst #v1 Reviewed-by: Daniel Vetter --- dr

[Intel-gfx] [PATCH v2 03/13] drm/vmwgfx: Stop using plane->fb in vmw_kms_update_implicit_fb()

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä The only caller of vmw_kms_update_implicit_fb() is the page_flip hook which itself gets called with the plane mutex already held. Hence we can look at plane->state safely. Toss in a lockdep assert to make the situation more clear. Cc: Deepak Rawat Cc: Thomas Hellstrom Cc: S

[Intel-gfx] [PATCH v2 04/13] drm/vmwgfx: Stop updating plane->fb

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä We want to get rid of plane->fb on atomic drivers. Stop setting it. Cc: Deepak Rawat Cc: Thomas Hellstrom Cc: Sinclair Yeh Cc: VMware Graphics Cc: Daniel Vetter Signed-off-by: Ville Syrjälä Reviewed-by: Deepak Rawat --- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 -- dri

[Intel-gfx] [PATCH v2 01/13] drm/vmwgfx: Stop using plane->fb in vmw_kms_atomic_check_modeset()

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä Instead of looking at plane->fb let's look at the proper new plane state. Not that the code makes a ton of sense. It's only going through the crtcs in the atomic state, so assuming not all of them are included we're not even calculating the total bandwidth here. Also we're no

[Intel-gfx] [PATCH v2 00/13] drm: Eliminate plane->fb/crtc usage for atomic drivers

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä Here are again the last (?) bits of eliminating the plane->fb/crtc usage for atomic drivers. I've pushed everything else (thanks to everyone who reviewed them). Deepak said he'd tested the vmwgfx stuff, so I think it should be safe to land. Just missing a bit of review... C

[Intel-gfx] [PATCH v2 02/13] drm/vmwgfx: Stop using plane->fb in vmw_kms_helper_dirty()

2018-05-25 Thread Ville Syrjala
From: Ville Syrjälä Instead of plane->fb (which we're going to deprecate for atomic drivers) we need to look at plane->state->fb. The maze of code leading to vmw_kms_helper_dirty() wasn't particularly clear, but my analysis concluded that the calls originating from vmw_*_primary_plane_atomic_upda

[Intel-gfx] [PATCH v2 06/24] drm/i915/ICL: Add register definition for DFLEXDPMLE

2018-05-25 Thread Manasi Navare
DFLEXDPMLE register is required to tell the FIA hardware which main links of DP are enabled on TCC Connectors. FIA uses this information to program PHY to Controller signal mapping. This register is applicable in both TC connector's Alternate mode as well as DP connector mode. v2: * Remove _ICL pr

Re: [Intel-gfx] [PATCH 27/24] drm/i915/dp: Add support for HBR3 and TPS4 during link training

2018-05-25 Thread James Ausmus
On Thu, May 24, 2018 at 04:42:38PM -0700, Paulo Zanoni wrote: > From: Manasi Navare > > DP spec 1.4 supports training pattern set 4 (TPS4) for HBR3 link > rate. This will be used in link training's channel equalization > phase if supported by both source and sink. > This patch adds the helpers to

Re: [Intel-gfx] [PATCH 26/24] drm/i915/icl: Add allowed DP rates for Icelake

2018-05-25 Thread James Ausmus
On Thu, May 24, 2018 at 04:42:37PM -0700, Paulo Zanoni wrote: > From: Manasi Navare > > For ICL, on Combo PHY the allowed max rates are: > - HBR3 8.1 eDP (DDIA) > - HBR2 5.4 DisplayPort (DDIB) > and for MG PHY/TC DDI Ports allowed DP rates are: > - HBR3 8.1 DisplayPort (DP alternate mode, DP o

[Intel-gfx] [PATCH v4] drm/i915/gen11: Preempt-to-idle support in execlists.

2018-05-25 Thread Tomasz Lis
The patch adds support of preempt-to-idle requesting by setting a proper bit within Execlist Control Register, and receiving preemption result from Context Status Buffer. Preemption in previous gens required a special batch buffer to be executed, so the Command Streamer never preempted to idle dir

Re: [Intel-gfx] [PATCH] drm/i915 : clip yuv primary planes to hw constraints

2018-05-25 Thread Ville Syrjälä
On Fri, May 25, 2018 at 11:00:23AM -0700, Fritz Koenig wrote: > YUV planes need to be multiples of 2 to scan out. This was > handled correctly for planes other than the primary in the > intel_check_sprite_plane, where the code fixes up the plane > and makes it compliant. Move this code into a locat

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915 : clip yuv primary planes to hw constraints

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915 : clip yuv primary planes to hw constraints URL : https://patchwork.freedesktop.org/series/43796/ State : failure == Summary == Applying: drm/i915 : clip yuv primary planes to hw constraints error: Failed to merge in the changes. Using index info to recons

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Measure sampler intervals

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/pmu: Measure sampler intervals URL : https://patchwork.freedesktop.org/series/43795/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4243 -> Patchwork_9124 = == Summary - SUCCESS == No regressions found. External URL: https://patch

[Intel-gfx] [PATCH] drm/i915 : clip yuv primary planes to hw constraints

2018-05-25 Thread Fritz Koenig
YUV planes need to be multiples of 2 to scan out. This was handled correctly for planes other than the primary in the intel_check_sprite_plane, where the code fixes up the plane and makes it compliant. Move this code into a location that allows the primary check to access it as well. Signed-off-by

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Measure sampler intervals

2018-05-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-05-25 18:31:35) > > On 25/05/2018 18:11, Chris Wilson wrote: > > hrtimer is not reliable enough to assume fixed intervals, and so even > > coarse accuracy (in the face of kasan and similar heavy debugging) we > > need to measure the actual interval between sample. > >

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Measure sampler intervals

2018-05-25 Thread Tvrtko Ursulin
On 25/05/2018 18:11, Chris Wilson wrote: hrtimer is not reliable enough to assume fixed intervals, and so even coarse accuracy (in the face of kasan and similar heavy debugging) we need to measure the actual interval between sample. It doesn't even average out to something acceptable under suc

Re: [Intel-gfx] DRM Inquiry

2018-05-25 Thread Jani Nikula
On Fri, 25 May 2018, "Taylor, Clinton A" wrote: > Looks like the seek=%d in the sprintf is not working. Yeah. Try skip=%d instead. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org

[Intel-gfx] [PATCH] drm/i915/pmu: Measure sampler intervals

2018-05-25 Thread Chris Wilson
hrtimer is not reliable enough to assume fixed intervals, and so even coarse accuracy (in the face of kasan and similar heavy debugging) we need to measure the actual interval between sample. While using a single timestamp to compute the interval does not allow very fine accuracy (consider the imp

Re: [Intel-gfx] [PATCH 06/24] drm/i915/ICL: Add register definition for DFLEXDPMLE

2018-05-25 Thread Manasi Navare
On Fri, May 25, 2018 at 09:14:57AM -0700, Lucas De Marchi wrote: > On Thu, May 24, 2018 at 05:26:38PM -0700, Paulo Zanoni wrote: > > Em Seg, 2018-05-21 às 17:25 -0700, Paulo Zanoni escreveu: > > > From: Manasi Navare > > > > > > DFLEXDPMLE register is required to tell the FIA hardware which > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: fix icl_unmap/map_plls_to_ports (rev2)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/icl: fix icl_unmap/map_plls_to_ports (rev2) URL : https://patchwork.freedesktop.org/series/43510/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4242 -> Patchwork_9123 = == Summary - SUCCESS == No regressions found. External URL:

Re: [Intel-gfx] [PATCH 07/24] drm/i915/icl: Add DDI HDMI level selection for ICL

2018-05-25 Thread Lucas De Marchi
On Mon, May 21, 2018 at 05:25:41PM -0700, Paulo Zanoni wrote: > From: Manasi Navare > > This patch adds a proper HDMI DDI entry level for vswing > programming sequences on ICL. > > Spec doesn't specify any default for HDMI tables, > so let's pick the last entry as the default for now > to stay c

Re: [Intel-gfx] [PATCH 25/24] drm/i915/icl: fix gmbus gpio pin mapping

2018-05-25 Thread Lucas De Marchi
On Fri, May 25, 2018 at 07:24:07PM +0300, Ville Syrjälä wrote: > On Thu, May 24, 2018 at 05:36:37PM -0700, Lucas De Marchi wrote: > > On Thu, May 24, 2018 at 04:42:36PM -0700, Paulo Zanoni wrote: > > > From: Mahesh Kumar > > > > > > ICP has GPIO pin 1/2 mapped to combo-phy ports & GPIO pins 9/10/

Re: [Intel-gfx] [PATCH 25/24] drm/i915/icl: fix gmbus gpio pin mapping

2018-05-25 Thread Ville Syrjälä
On Thu, May 24, 2018 at 05:36:37PM -0700, Lucas De Marchi wrote: > On Thu, May 24, 2018 at 04:42:36PM -0700, Paulo Zanoni wrote: > > From: Mahesh Kumar > > > > ICP has GPIO pin 1/2 mapped to combo-phy ports & GPIO pins 9/10/11/12 > > mapped to tc ports[1-4]. > > This patch defines GPIOCTL registe

Re: [Intel-gfx] [PATCH 06/24] drm/i915/ICL: Add register definition for DFLEXDPMLE

2018-05-25 Thread Lucas De Marchi
On Thu, May 24, 2018 at 05:26:38PM -0700, Paulo Zanoni wrote: > Em Seg, 2018-05-21 às 17:25 -0700, Paulo Zanoni escreveu: > > From: Manasi Navare > > > > DFLEXDPMLE register is required to tell the FIA hardware which > > main links of DP are enabled on TCC Connectors. FIA uses this > > informatio

Re: [Intel-gfx] DRM Inquiry

2018-05-25 Thread Taylor, Clinton A
Looks like the seek=%d in the sprintf is not working. 0x11 0x0A are being returned by the monitor from DPCD’s 0x and 0x0001 repeatedly. The first is DPCD revision (1.1) and the second is maximum Link Rate (0x0a) which is 2.7 Gbps. You might want to do a printf of call to make sure seek is be

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Simplify ilk-ivb underrun suppression

2018-05-25 Thread Chris Wilson
Quoting Ville Syrjälä (2018-05-25 16:43:42) > On Fri, May 25, 2018 at 04:20:07PM +0100, Chris Wilson wrote: > > Quoting Ville Syrjala (2018-05-24 20:04:06) > > > From: Ville Syrjälä > > > > > > Let's suppress the underruns around every modeset sequence instead > > > of trying to avoid it. Planes

[Intel-gfx] [PATCH] drm/i915/icl: fix icl_unmap/map_plls_to_ports

2018-05-25 Thread Lucas De Marchi
From: Mahesh Kumar All connectors may not have best_encoder attached, so don't dereference encoder pointer for each connector. Fixes: c27e917e2bda (drm/i915/icl: add basic support for the ICL clocks) Signed-off-by: Mahesh Kumar Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_ddi.c

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove stale asserts from i915_gem_find_active_request()

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915: Remove stale asserts from i915_gem_find_active_request() URL : https://patchwork.freedesktop.org/series/43781/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4242 -> Patchwork_9122 = == Summary - WARNING == Minor unknown changes comi

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB

2018-05-25 Thread Ville Syrjälä
On Fri, May 25, 2018 at 06:19:17PM +0300, Jani Nikula wrote: > On Fri, 25 May 2018, Ville Syrjälä wrote: > > On Thu, May 24, 2018 at 10:19:02PM +0100, Chris Wilson wrote: > >> Quoting Ville Syrjala (2018-05-24 20:04:05) > >> > From: Ville Syrjälä > >> > > >> > My ILK seems to generate a spurious

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Simplify ilk-ivb underrun suppression

2018-05-25 Thread Ville Syrjälä
On Fri, May 25, 2018 at 04:20:07PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2018-05-24 20:04:06) > > From: Ville Syrjälä > > > > Let's suppress the underruns around every modeset sequence instead > > of trying to avoid it. Planes are disabled at this point anyway so > > we don't really

Re: [Intel-gfx] [PATCH v6 7/7] drm/i915: add a sysfs entry to let users set sseu configs

2018-05-25 Thread Lionel Landwerlin
On 24/05/18 11:39, Tvrtko Ursulin wrote: --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -981,7 +981,8 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,   break;   }   -    if (!capable(C

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Simplify ilk-ivb underrun suppression

2018-05-25 Thread Chris Wilson
Quoting Ville Syrjala (2018-05-24 20:04:06) > From: Ville Syrjälä > > Let's suppress the underruns around every modeset sequence instead > of trying to avoid it. Planes are disabled at this point anyway so > we don't really gain anything from keeping the underrun reporting > enabled. Also for PCH

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB

2018-05-25 Thread Jani Nikula
On Fri, 25 May 2018, Ville Syrjälä wrote: > On Thu, May 24, 2018 at 10:19:02PM +0100, Chris Wilson wrote: >> Quoting Ville Syrjala (2018-05-24 20:04:05) >> > From: Ville Syrjälä >> > >> > My ILK seems to generate a spurious PCH underrun with most interlaced >> > HDMI modes. Add a second vblank w

[Intel-gfx] [PATCH i-g-t] igt/perf_pmu: Flush to idle after hang

2018-05-25 Thread Chris Wilson
We may not idle immediately after a hang, and indeed may send a pulse down the pipeline periodically to become idle. Rather than make a flimsy assumption about how long we need to sleep before the system idles, wait for the system to declare itself idle; flushing it to idle in the process! Signed-

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Try to suppress more spurious PCH underruns on ILK-IVB

2018-05-25 Thread Ville Syrjälä
On Thu, May 24, 2018 at 10:19:02PM +0100, Chris Wilson wrote: > Quoting Ville Syrjala (2018-05-24 20:04:05) > > From: Ville Syrjälä > > > > My ILK seems to generate a spurious PCH underrun with most interlaced > > HDMI modes. Add a second vblank wait to avoid it. > > Fwiw, a second vblank becaus

Re: [Intel-gfx] [PATCH v4 1/1] drm/i915: Consult VBT "LVDS config" bits to determine whether internal LVDS is present

2018-05-25 Thread Ville Syrjälä
On Fri, May 18, 2018 at 06:01:38PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > VBT seems to have some bits to tell us whether the internal LVDS port > has something hooked up. In theory one might expect the VBT to not have > a child device for the LVDS port if there's no panel hooked up

[Intel-gfx] [PATCH] drm/i915: Remove stale asserts from i915_gem_find_active_request()

2018-05-25 Thread Chris Wilson
Since we use i915_gem_find_active_request() from inside intel_engine_dump() and may call that at any time, we do not guarantee that the engine is paused nor that the signal kthreads and irq handler are suspended, so we cannot assert that the breadcrumb doesn't advance and that the irq hasn't happen

Re: [Intel-gfx] [PATCH] drm/edid: Fix up edid_cea_modes[] formatting

2018-05-25 Thread Ville Syrjälä
On Fri, May 25, 2018 at 10:21:20AM -0400, Alex Deucher wrote: > On Thu, May 24, 2018 at 3:20 PM, Ville Syrjala > wrote: > > From: Ville Syrjälä > > > > Fix up a bunch of bad indentation and insconsistent comments > > inconsistent Dang. Pulled the trigger on dim mere seconds before seeing your r

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/18] drm/i915: Prepare GEM for suspend earlier

2018-05-25 Thread Patchwork
== Series Details == Series: series starting with [01/18] drm/i915: Prepare GEM for suspend earlier URL : https://patchwork.freedesktop.org/series/43765/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4238_full -> Patchwork_9120_full = == Summary - FAILURE == Serious unkn

Re: [Intel-gfx] [PATCH] drm/edid: Fix up edid_cea_modes[] formatting

2018-05-25 Thread Alex Deucher
On Thu, May 24, 2018 at 3:20 PM, Ville Syrjala wrote: > From: Ville Syrjälä > > Fix up a bunch of bad indentation and insconsistent comments inconsistent With that fixed: Reviewed-by: Alex Deucher > in edid_cea_modes[]. > > v2: Instead of stripping the aspect ratio comments let's > add th

Re: [Intel-gfx] [PATCH] drm/i915: Prepare GEM for suspend earlier

2018-05-25 Thread Chris Wilson
Quoting Ville Syrjälä (2018-05-25 11:51:13) > On Fri, May 25, 2018 at 10:26:29AM +0100, Chris Wilson wrote: > > In order to prepare the GPU for sleeping, we may want to submit commands > > to it. This is a complicated process that may even require some swapping > > in from shmemfs, if the GPU was i

Re: [Intel-gfx] [PATCH 02/18] drm/i915: Switch to kernel context before idling at runtime

2018-05-25 Thread Mika Kuoppala
Chris Wilson writes: > We can reduce our exposure to random neutrinos by resting on the kernel > context having flushed out the user contexts to system memory and > beyond. The corollary is that we then we require two passes through the > idle handler to go to sleep, which on a truly idle system

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Prepare GEM for suspend earlier (rev5)

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915: Prepare GEM for suspend earlier (rev5) URL : https://patchwork.freedesktop.org/series/43575/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4238_full -> Patchwork_9119_full = == Summary - WARNING == Minor unknown changes coming with

Re: [Intel-gfx] [PATCH 04/18] drm/i915: After reset on sanitization, reset the engine backends

2018-05-25 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2018-05-25 14:13:19) >> Chris Wilson writes: >> >> > As we reset the GPU on suspend/resume, we also do need to reset the >> > engine state tracking so call into the engine backends. This is >> > especially important so that we can also sanitize the

Re: [Intel-gfx] [PATCH 04/18] drm/i915: After reset on sanitization, reset the engine backends

2018-05-25 Thread Chris Wilson
Quoting Mika Kuoppala (2018-05-25 14:13:19) > Chris Wilson writes: > > > As we reset the GPU on suspend/resume, we also do need to reset the > > engine state tracking so call into the engine backends. This is > > especially important so that we can also sanitize the state tracking > > across resu

Re: [Intel-gfx] [PATCH 04/18] drm/i915: After reset on sanitization, reset the engine backends

2018-05-25 Thread Mika Kuoppala
Chris Wilson writes: > As we reset the GPU on suspend/resume, we also do need to reset the > engine state tracking so call into the engine backends. This is > especially important so that we can also sanitize the state tracking > across resume. > > Signed-off-by: Chris Wilson > --- > drivers/gp

Re: [Intel-gfx] [PATCH 01/18] drm/i915: Prepare GEM for suspend earlier

2018-05-25 Thread Mika Kuoppala
Chris Wilson writes: > In order to prepare the GPU for sleeping, we may want to submit commands > to it. This is a complicated process that may even require some swapping > in from shmemfs, if the GPU was in the wrong state. As such, we need to > do this preparation step synchronously before the

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/trace: Describe engines as class:instance pairs

2018-05-25 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915/trace: Describe engines as class:instance pairs URL : https://patchwork.freedesktop.org/series/43763/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4238_full -> Patchwork_9117_full = == Summary - WARNING ==

Re: [Intel-gfx] [PATCH v4] drm/i915: Flush the ring stop bit after clearing RING_HEAD in reset

2018-05-25 Thread Chris Wilson
Quoting Tvrtko Ursulin (2018-05-25 09:36:18) > > On 24/05/2018 14:40, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2018-05-24 14:34:41) > >> > >> On 19/05/2018 10:04, Chris Wilson wrote: > >>> Quoting Tvrtko Ursulin (2018-05-18 15:42:00) > > On 18/05/2018 15:13, Chris Wilson wrote: >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c

2018-05-25 Thread Patchwork
== Series Details == Series: drm/i915/uc: Trivial s/dev_priv/i915 in intel_uc.c URL : https://patchwork.freedesktop.org/series/43770/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4238 -> Patchwork_9121 = == Summary - SUCCESS == No regressions found. External URL: ht

Re: [Intel-gfx] [PATCH] drm/i915/execlists: Wait for ELSP submission on restart

2018-05-25 Thread Chris Wilson
Quoting Chris Wilson (2018-05-22 11:19:37) > After a reset, we will ensure that there is at least one request > submitted to HW to ensure that a context is loaded for powersaving. > Let's wait for this submission via a tasklet to complete before we drop > our forcewake, ensuring the system is ready

Re: [Intel-gfx] [PATCH 5/9] drm/fb-helper: Add generic fbdev emulation .fb_probe function

2018-05-25 Thread Noralf Trønnes
Den 24.05.2018 11.16, skrev Daniel Vetter: On Wed, May 23, 2018 at 04:34:07PM +0200, Noralf Trønnes wrote: This is the first step in getting generic fbdev emulation. A drm_fb_helper_funcs.fb_probe function is added which uses the DRM client API to get a framebuffer backed by a dumb buffer. A t

Re: [Intel-gfx] [PATCH 08/18] drm/i915/execlists: Wait for ELSP submission on restart

2018-05-25 Thread Mika Kuoppala
Chris Wilson writes: > After a reset, we will ensure that there is at least one request > submitted to HW to ensure that a context is loaded for powersaving. > Let's wait for this submission via a tasklet to complete before we drop > our forcewake, ensuring the system is ready for rc6 before we l

  1   2   >