== Series Details ==
Series: Enable Y210, Y212, Y216 formats for ICL
URL : https://patchwork.freedesktop.org/series/48729/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c9d04d7941bb drm: Add Y210, Y212, Y216 format definitions and fourcc
-:33: WARNING:LONG_LINE: line over 100 c
Hi,
On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies a DWORD.
Y210: Valid data occupies MSB 10 bits.
== Series Details ==
Series: Enable Y210, Y212, Y216 formats for ICL
URL : https://patchwork.freedesktop.org/series/48729/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4706 -> Patchwork_10019 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10019 ne
Hi,
Please include platform name in subject line:
On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas
Added needed plane control flag definitions for Y210, Y212 and
Y216 formats.
may be, add more info in commit message
-Mahesh
Signed-off-by: Swati Sharma
Signed-off-by: Vid
Am 26.08.2018 um 10:40 schrieb Tetsuo Handa:
On 2018/08/24 22:52, Michal Hocko wrote:
@@ -180,11 +180,15 @@ void amdgpu_mn_unlock(struct amdgpu_mn *mn)
*/
static int amdgpu_mn_read_lock(struct amdgpu_mn *amn, bool blockable)
{
- if (blockable)
- mutex_lock(&amn->read_l
On 8/27/2018 12:47 PM, Kumar, Mahesh wrote:
Hi,
On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies a DWO
Hi,
On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas
Signed-off-by: Swati Sharma
Signed-off-by: Vidya Srinivas
---
drivers/gpu/drm/i915/intel_display.c | 15 +++
drivers/gpu/drm/i915/intel_sprite.c | 3 +++
2 files changed, 18 insertions(+)
diff --git a/dri
On 8/27/2018 12:17 PM, Swati Sharma wrote:
From: Vidya Srinivas
In this patch, a list for icl specific pixel formats is created
in which Y210, Y212 and Y216 pixel formats are added along with
legacy pixel formats for primary and sprite plane.
Signed-off-by: Swati Sharma
Signed-off-by: Vidya
== Series Details ==
Series: Enable Y210, Y212, Y216 formats for ICL
URL : https://patchwork.freedesktop.org/series/48729/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4706_full -> Patchwork_10019_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues
On Sat, 25 Aug 2018, Lyude Paul wrote:
> From: Jan-Marek Glogowski
>
> This re-applies the workaround for "some DP sinks, [which] are a
> little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
> quality check unconditionally during long pulse").
> It makes the secondary AOC E2460P monitor
On 21.08.2018 17:26, Sharma, Swati2 wrote:
On 16-Aug-18 6:25 PM, Juha-Pekka Heikkila wrote:
Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/i915
Op 16-08-18 om 14:55 schreef Juha-Pekka Heikkila:
> Preparations for enabling P010, P012 and P016 formats. These
> formats will extend NV12 for larger bit depths.
>
> Signed-off-by: Juha-Pekka Heikkila
> Reviewed-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/intel_atomic.c | 3 +-
>
On Fri, Aug 24, 2018 at 07:56:34PM +, Souza, Jose wrote:
> On Thu, 2018-07-19 at 21:22 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Move the skl+ specific framebuffer related checks from
> > intel_plane_atomic_check_with_state() into a new function
> > (skl_plane_check_fb()) wh
On Fri, Aug 24, 2018 at 01:38:55PM -0700, Dhinakaran Pandiyan wrote:
> skl_plane_has_planar is hard to read, simplify the logic by checking for
> support in the order of platform, pipe and plane.
I had a slightly different version of this somewhere. But this one might
be even better.
>
> No chan
On Fri, Aug 24, 2018 at 01:38:56PM -0700, Dhinakaran Pandiyan wrote:
> ICL requires two planes for scanning out a NV12 framebuffer. Do
> not advertize support for creating NV12 framebuffers until required
> plane programming is implemented.
>
> v2: Do not allow adding buffers.
> Check inside s
On Sat, Aug 25, 2018 at 03:10:35PM -0400, Lyude Paul wrote:
> From: Jan-Marek Glogowski
>
> This re-applies the workaround for "some DP sinks, [which] are a
> little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
> quality check unconditionally during long pulse").
> It makes the seconda
These patches enable RGB565 format to be rotated 90 and 270 degrees
on gen11 and later.
Related changes to IGT here:
https://patchwork.freedesktop.org/series/48756/
/Juha-Pekka
Juha-Pekka Heikkila (2):
drm/i915: Move 90/270 rotation validity check into its own function
drm/i915: Enable RGB56
This makes intel_plane_atomic_check_with_state() generally shorter.
v2: (Ville Syrjälä) move all rotation related checks into new function and
don't pass dev_priv pointer around.
v3: (Ville Syljälä) rename new function.
v4: rebase
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm
From gen11 onwards RGB565 90/270 plane rotation is supported on hardware.
IGT: https://patchwork.freedesktop.org/series/48756/
Signed-off-by: Juha-Pekka Heikkila
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu
== Series Details ==
Series: Enable RGB565 rotation from gen11 onwards
URL : https://patchwork.freedesktop.org/series/48758/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
44ee504222cb drm/i915: Move 90/270 rotation validity check into its own function
-:12: WARNING:COMMIT_LOG_L
On 27.08.2018 14:28, Maarten Lankhorst wrote:
Op 16-08-18 om 14:55 schreef Juha-Pekka Heikkila:
Preparations for enabling P010, P012 and P016 formats. These
formats will extend NV12 for larger bit depths.
Signed-off-by: Juha-Pekka Heikkila
Reviewed-by: Maarten Lankhorst
---
drivers/gpu/drm/
== Series Details ==
Series: Enable RGB565 rotation from gen11 onwards
URL : https://patchwork.freedesktop.org/series/48758/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4706 -> Patchwork_10020 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10020
On Fri, Aug 24, 2018 at 06:02:16PM -0700, Radhakrishna Sripada wrote:
> At times 12bpc HDMI cannot be driven due to faulty cables, dongles
> level shifters etc. To workaround them we may need to drive the output
> at a lower bpc. Currently the user space does not have a way to limit
> the bpc. The
> Once there is an actual request to have some metrics from vanilla kernels
> through some end-user tools (not a developer tool, like here), I'll be glad
> to discuss about how to provide the information the best for them in a stable
> manner.
Sorry for my ignorance, but looks like I don't unde
== Series Details ==
Series: Enable RGB565 rotation from gen11 onwards
URL : https://patchwork.freedesktop.org/series/48758/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4706_full -> Patchwork_10020_full =
== Summary - SUCCESS ==
No regressions found.
== Known issu
On Mon, 2018-08-27 at 11:43 +0300, Jani Nikula wrote:
> On Sat, 25 Aug 2018, Lyude Paul wrote:
> > From: Jan-Marek Glogowski
> >
> > This re-applies the workaround for "some DP sinks, [which] are a
> > little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
> > quality check unconditional
On Mon, 2018-08-27 at 15:08 +0300, Ville Syrjälä wrote:
> On Sat, Aug 25, 2018 at 03:10:35PM -0400, Lyude Paul wrote:
> > From: Jan-Marek Glogowski
> >
> > This re-applies the workaround for "some DP sinks, [which] are a
> > little nuts" from commit 1a36147bb939 ("drm/i915: Perform link
> > quali
On Mon, 2018-08-27 at 14:56 +0300, Ville Syrjälä wrote:
> On Fri, Aug 24, 2018 at 01:38:55PM -0700, Dhinakaran Pandiyan wrote:
> > skl_plane_has_planar is hard to read, simplify the logic by
> > checking for
> > support in the order of platform, pipe and plane.
>
> I had a slightly different ver
On Mon, Aug 27, 2018 at 01:45:48PM -0400, Lyude Paul wrote:
> On Mon, 2018-08-27 at 15:08 +0300, Ville Syrjälä wrote:
> > On Sat, Aug 25, 2018 at 03:10:35PM -0400, Lyude Paul wrote:
> > > From: Jan-Marek Glogowski
> > >
> > > This re-applies the workaround for "some DP sinks, [which] are a
> > >
From: Ville Syrjälä
If we have only a single active pipe and the cdclk change only requires
the cd2x divider to be updated bxt+ can do the update with forcing a full
modeset on the pipe. Try to hook that up.
Signed-off-by: Ville Syrjälä
Signed-off-by: Abhay Kumar
---
drivers/gpu/drm/i915/i915
== Series Details ==
Series: drm/i915: Skip modeset for cdclk changes if possible
URL : https://patchwork.freedesktop.org/series/48763/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ef26dd111408 drm/i915: Skip modeset for cdclk changes if possible
-:324: CHECK:LINE_SPACING: Ple
== Series Details ==
Series: drm/i915: Skip modeset for cdclk changes if possible
URL : https://patchwork.freedesktop.org/series/48763/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Skip modeset for cdclk changes if possible
+drivers/gpu/drm/i915/intel_cdclk.c:212
== Series Details ==
Series: drm/i915: Skip modeset for cdclk changes if possible
URL : https://patchwork.freedesktop.org/series/48763/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4709 -> Patchwork_10021 =
== Summary - FAILURE ==
Serious unknown changes coming with Pat
On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> > index 4a34b7be..8a0e3e76 100644
> > --- a/intel/intel_chipset.h
> > +++ b/intel/intel_chipset.h
> > @@ -568,6 +568,26 @@
>
Hi all,
Commit
ccb748df0058 ("drm/vc4: Fix the "no scaling" case on multi-planar YUV
formats")
is missing a Signed-off-by from its committer.
It was rebased.
--
Cheers,
Stephen Rothwell
pgpuW2ZnMKi1K.pgp
Description: OpenPGP digital signature
_
Quoting Lucas De Marchi (2018-08-27 22:19:54)
> On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> > Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > That should help cut down the object size expansion. But longer term I'd
>
> I'm not opposed to turning it into inline function, but i
No functional change. But let's get first i915 pointer
directly from intel_dp so we can clean up a lot of code
later.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 109 +++
drivers/gpu/drm/i915/intel_drv.h | 6 ++
2 files changed, 57 insertions(
Now that we have a generic caller let's simplify it and
clean up the intel_psr.c code a bit.
Cc: Dhinakaran Pandiyan
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_psr.c | 50 +---
1 file changed, 14 insertions(+), 36 deletions(-)
diff --git a/drivers/gp
We currently verify that all doorbells can be registerd with GuC and
HW but don't check that all works as expected after a db ring.
Do a nop ring of all doorbells to make sure we haven't misprogrammed
any WQ or stage descriptor data. This will also help validating
upcoming changes in the db progra
== Series Details ==
Series: series starting with [1/2] drm/i915: introduce dp_to_i915() helper
URL : https://patchwork.freedesktop.org/series/48767/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4712 -> Patchwork_10022 =
== Summary - SUCCESS ==
No regressions found.
skl_plane_has_planar is hard to read, simplify the logic by checking for
support in the order of platform, pipe and plane.
No change in functionality intended.
v2: Fix logic for primary plane (Ville)
Cc: Ville Syrjälä
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_display.c
== Series Details ==
Series: drm/i915/selftests: ring all doorbells in igt_guc_doorbells
URL : https://patchwork.freedesktop.org/series/48768/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b370a2de90ed drm/i915/selftests: ring all doorbells in igt_guc_doorbells
-:6: WARNING:TYP
On Mon, Aug 27, 2018 at 10:40:28PM +0100, Chris Wilson wrote:
> Quoting Lucas De Marchi (2018-08-27 22:19:54)
> > On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> > > Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > > That should help cut down the object size expansion. But longer t
== Series Details ==
Series: drm/i915/selftests: ring all doorbells in igt_guc_doorbells
URL : https://patchwork.freedesktop.org/series/48768/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4712 -> Patchwork_10023 =
== Summary - SUCCESS ==
No regressions found.
Externa
On 8/27/2018 3:36 PM, Daniele Ceraolo Spurio wrote:
We currently verify that all doorbells can be registerd with GuC and
^registered
HW but don't check that all works as expected after a db ring.
Do a nop ring of all doorbells to make sure we hav
== Series Details ==
Series: series starting with [1/2] drm/i915: introduce dp_to_i915() helper
URL : https://patchwork.freedesktop.org/series/48767/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4712_full -> Patchwork_10022_full =
== Summary - SUCCESS ==
No regressions
== Series Details ==
Series: series starting with [v2] drm/i915: Clean up skl_plane_has_planar()
(rev2)
URL : https://patchwork.freedesktop.org/series/48687/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4713 -> Patchwork_10024 =
== Summary - SUCCESS ==
No regressions f
== Series Details ==
Series: drm/i915/selftests: ring all doorbells in igt_guc_doorbells
URL : https://patchwork.freedesktop.org/series/48768/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4712_full -> Patchwork_10023_full =
== Summary - SUCCESS ==
No regressions found.
Now that DRM can create these debugfs nodes automatically; this isn't
needed.
Signed-off-by: Lyude Paul
Cc: Maarten Lankhorst
Cc: Daniel Stone
---
drivers/gpu/drm/i915/i915_debugfs.c | 32 -
1 file changed, 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_deb
There's no actual reason we pass the connector ID instead of a pointer
to the connector itself, and we're going to need the entire connector
(but only temporarily) in order to name MST debugfs folders properly
since connector IDs can't be looked up until the driver has been
registered with userspac
This is the next version of my patch series for teaching DRM how to
automatically create debugfs nodes for drivers with MST topologies. This
was originally intended just for nouveau, but has since been expanded to
all DRM drivers.
Cc: Maarten Lankhorst
Cc: Daniel Stone
Lyude Paul (4):
drm/deb
Add Support to load DMC on Icelake.
While at it, also add support to load the firmware
during system resume.
v2: load firmware during system resume.(Imre)
v3: enable has_csr for icelake.(Jyoti)
v4: Only load the firmware in this patch
Cc: Jyoti Yadav
Cc: Imre Deak
Cc: Rodrigo Vivi
Cc: Paulo
Adding PR for CI to pick:
The following changes since commit fea76a04f25fd0a217c0d566ff5ff8f23ad3e648:
amdgpu: sync up polaris10 firmware with 18.30 release (2018-08-25 15:43:50
-0400)
are available in the git repository at:
git://anongit.freedesktop.org/git/drm/drm-firmware.git/ master
fo
On Sat, Aug 25, 2018 at 10:35:23AM +0100, Chris Wilson wrote:
> Quoting Lucas De Marchi (2018-08-25 00:56:46)
> > diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> > index 4a34b7be..8a0e3e76 100644
> > --- a/intel/intel_chipset.h
> > +++ b/intel/intel_chipset.h
> > @@ -568,6 +568,26 @@
>
== Series Details ==
Series: Load DMC v1.07 on Icelake (rev2)
URL : https://patchwork.freedesktop.org/series/48773/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4713 -> Patchwork_10025 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10025 absolut
== Series Details ==
Series: series starting with [v2] drm/i915: Clean up skl_plane_has_planar()
(rev2)
URL : https://patchwork.freedesktop.org/series/48687/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4713_full -> Patchwork_10024_full =
== Summary - SUCCESS ==
No reg
Hi,
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Patchwork
> Sent: tiistai 28. elokuuta 2018 4.10
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] ✗ Fi.CI.BAT: failure for Load DMC v1.07 on Icelak
Hi Jani,
I am already debugging this issue. Issue got reproduced when we are
locally running the icl_dmc_ver1_07.bin on ICL HW.
We could not see this issue with previous FW version icl_dmc_ver1_01.bin
file.
Already in discussion with DMC FW folks. There are two FW stepping
integrated in l
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