[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction

2019-11-13 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction URL : https://patchwork.freedesktop.org/series/69366/ State : success == Summary == CI Bug Log - changes from CI_DRM_7323_full -> Patchwork_15241_full

[Intel-gfx] [PATCH] drm/i915/dsi: conn_state->max_requested_bpc is not a thing on DSI

2019-11-13 Thread Jani Nikula
FIXUP to "drm/i915/dsi: add support for DSC". Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/icl_dsi.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 823dbd9d4d06..52bb

Re: [Intel-gfx] [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required

2019-11-13 Thread Tvrtko Ursulin
On 08/11/2019 14:22, Chris Wilson wrote: Within this set of fence execution tests, we never once try to modeset; being KMS master is not required. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_fence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/i915/gem_e

Re: [Intel-gfx] [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks

2019-11-13 Thread Tvrtko Ursulin
On 08/11/2019 14:22, Chris Wilson wrote: The pair of *-hang-all will generate sufficient hangs for the kernel to ban the client. This is unfortunate as it means all further tests are skipped. Ask nicely not to be banned. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_fence.c | 7 +++

Re: [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps

2019-11-13 Thread Tvrtko Ursulin
On 08/11/2019 14:22, Chris Wilson wrote: The kernel is now enforcing that clients are not allowed to block higher priority contexts from accessing the GPU; one is no longer allowed to sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short enough not to anger the preempt-off che

Re: [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps

2019-11-13 Thread Chris Wilson
Quoting Tvrtko Ursulin (2019-11-13 10:54:58) > > On 08/11/2019 14:22, Chris Wilson wrote: > > The kernel is now enforcing that clients are not allowed to block higher > > priority contexts from accessing the GPU; one is no longer allowed to > > sleep for a second hogging the GPU. Reduce the sleep

[Intel-gfx] [PATCH] drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Chris Wilson
As we want to be able to run inside atomic context for retiring the i915_active, and we are no longer allowed to abuse mutex_trylock, split the tree management portion of i915_active.mutex into an irq-safe spinlock. References: a0855d24fc22d ("locking/mutex: Complain upon mutex API misuse in IRQ

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others

2019-11-13 Thread Patchwork
== Series Details == Series: series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others URL : https://patchwork.freedesktop.org/series/69382/ State : success == Summary == CI Bug Log - changes from CI_DRM_7323_full -> Patchwork_15244_full =

Re: [Intel-gfx] [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

2019-11-13 Thread Anshuamn Gupta
On 2019-10-31 at 17:14:22 -0700, José Roberto de Souza wrote: > A recent change in BSpec allow us to change EXTLINE while transcoder > is enabled so this allow us to change it even when doing the first > fastset after taking over previous hardware state set by BIOS. > BIOS don't enable PSR, so if s

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table for EHL"

2019-11-13 Thread Patchwork
== Series Details == Series: series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table for EHL" URL : https://patchwork.freedesktop.org/series/69383/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7323_full -> Patchwork_15245_full ==

Re: [Intel-gfx] [PATCH 3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

2019-11-13 Thread Imre Deak
On Wed, Nov 13, 2019 at 05:08:21PM +0530, Anshuamn Gupta wrote: > On 2019-10-31 at 17:14:22 -0700, José Roberto de Souza wrote: > > A recent change in BSpec allow us to change EXTLINE while transcoder > > is enabled so this allow us to change it even when doing the first > > fastset after taking ov

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix detection for a CMP-V PCH

2019-11-13 Thread Imre Deak
On Tue, Nov 12, 2019 at 04:21:43PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Fix detection for a CMP-V PCH > URL : https://patchwork.freedesktop.org/series/69345/ > State : success > > == Summary == Thanks for the review, pushed to -dinq. > > CI Bug Log - changes f

Re: [Intel-gfx] [PATCH 1/3] drm/i915/psr: Share the computation of idle frames

2019-11-13 Thread Anshuamn Gupta
Looks good to me, there is a minor comment see below. On 2019-10-31 at 17:14:20 -0700, José Roberto de Souza wrote: > Both activate functions and the dc3co disable function were doing the > same thing, so better move to a function and share. > Also while at it adding a WARN_ON to catch invalid valu

[Intel-gfx] [PATCH i-g-t 9/9] i915: Exercise I915_CONTEXT_PARAM_RINGSIZE

2019-11-13 Thread Chris Wilson
I915_CONTEXT_PARAM_RINGSIZE specifies how large to create the command ringbuffer for logical ring contects. This directly affects the number of batches userspace can submit before blocking waiting for space. Signed-off-by: Chris Wilson --- tests/Makefile.sources| 3 + tests/i915/gem_ct

[Intel-gfx] [PATCH i-g-t 4/9] i915: Start putting the mmio_base to wider use

2019-11-13 Thread Chris Wilson
Several tests depend upon the implicit engine->mmio_base but have no means of determining the physical layout. Since the kernel has started providing this information, start putting it to use. Signed-off-by: Chris Wilson --- lib/i915/gem_engine_topology.c | 84 ++

[Intel-gfx] [PATCH i-g-t 8/9] i915: Exercise timeslice sysfs property

2019-11-13 Thread Chris Wilson
We [will] expose various per-engine scheduling controls. One of which, 'timeslice_duration_ms', defines the scheduling quantum. If a context exhausts its timeslice, it will be preempted in favour of running one of its compatriots. Signed-off-by: Chris Wilson --- tests/Makefile.sources

[Intel-gfx] [PATCH i-g-t 3/9] i915/gem_exec_schedule: Beware priority inversion from iova faults

2019-11-13 Thread Chris Wilson
Check that if two contexts (one high priority, one low) share the same buffer that has taken a page fault that we do not create an implicit dependency between the two contexts for servicing that page fault and binding the vma. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_schedule.c | 166

[Intel-gfx] [PATCH i-g-t 6/9] i915: Exercise preemption timeout controls in sysfs

2019-11-13 Thread Chris Wilson
We [will] expose various per-engine scheduling controls. One of which, 'preempt_timeout_ms', defines how we wait for a preemption request to be honoured by the currently executing context. If it fails to relieve the GPU within the required timeout, the engine is reset and the miscreant forcibly evi

[Intel-gfx] [PATCH i-g-t 2/9] i915/gem_exec_schedule: Exercise priority inversion from resource contention

2019-11-13 Thread Chris Wilson
One of the hardest priority inversion tasks to both handle and to simulate in testing is inversion due to resource contention. The challenge is that a high priority context should never be blocked by a low priority context, even if both are starving for resources -- ideally, at least for some RT OS

[Intel-gfx] [PATCH i-g-t 5/9] i915/gem_ctx_isolation: Check engine relative registers

2019-11-13 Thread Chris Wilson
Some of the non-privileged registers are at the same offset on each engine. We can improve our coverage for unknown HW layout by using the reported engine->mmio_base for relative offsets. Signed-off-by: Chris Wilson --- tests/i915/gem_ctx_isolation.c | 164 - 1 fi

[Intel-gfx] [PATCH i-g-t 7/9] i915: Exercise sysfs heartbeat controls

2019-11-13 Thread Chris Wilson
We [will] expose various per-engine scheduling controls. One of which, 'heartbeat_duration_ms', defines how often we send a heartbeat down the engine to check upon the health of the engine. If a heartbeat does not complete within the interval (or two), the engine is declared hung. Signed-off-by: C

[Intel-gfx] [PATCH i-g-t 1/9] i915/gem_exec_schedule: Split pi-ringfull into two tests

2019-11-13 Thread Chris Wilson
pi-ringfull uses 2 contexts that share a buffer. The intent was that the contexts were independent, but it was the effect of the global lock held by the low priority client that prevented the high priority client from executing. I began to add a second variant where there was a shared resource whic

Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/tgl: MOCS table update

2019-11-13 Thread Lis, Tomasz
On 2019-11-13 02:09, Lucas De Marchi wrote: On Tue, Nov 12, 2019 at 02:47:57PM -0800, Matt Roper wrote: The bspec was just updated with a minor correction to entry 61 (it shouldn't have had the SCF bit set). v2: - Add a MOCS_ENTRY_UNUSED() and use it to declare the   explicitly-reserved MOCS e

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Fix a bug calling sleep function in atomic context URL : https://patchwork.freedesktop.org/series/69385/ State : success == Summary == CI Bug Log - changes from CI_DRM_7324_full -> Patchwork_15246_full

[Intel-gfx] [PATCH i-g-t] i915/gem_create: Check for cache bypass around zeroed pages

2019-11-13 Thread Chris Wilson
Check that even if userspace tries to sneak around the CPU caches of its zeroed pages, it sees nothing but zeroes. Suggested-by: Joonas Lahtinen Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Matthew Auld --- tests/i915/gem_create.c | 45 +++-- 1 file

[Intel-gfx] [PATCH i-g-t] i915/gem_create: Check for cache bypass around zeroed pages

2019-11-13 Thread Chris Wilson
Check that even if userspace tries to sneak around the CPU caches of its zeroed pages, it sees nothing but zeroes. Suggested-by: Joonas Lahtinen Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Matthew Auld --- tests/i915/gem_create.c | 44 +++-- 1 file

[Intel-gfx] [PATCH i-g-t] i915/gem_create: Check for cache bypass around zeroed pages

2019-11-13 Thread Chris Wilson
Check that even if userspace tries to sneak around the CPU caches of its zeroed pages, it sees nothing but zeroes. Suggested-by: Joonas Lahtinen Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Matthew Auld --- tests/i915/gem_create.c | 48 +++-- 1 file

[Intel-gfx] [PULL] drm-misc-fixes

2019-11-13 Thread Maxime Ripard
Hi Dave, Daniel, Here's a PR for this week's drm-misc-fixes. Maxime drm-misc-fixes-2019-11-13: - One fix to the dotclock dividers range for sun4i The following changes since commit 105401b659b7eb9cb42d6b5b75d5c049ad4b3dca: drm/shmem: Add docbook comments for drm_gem_shmem_object madvise field

[Intel-gfx] [PATCH] drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Chris Wilson
Still the saga of the hsw live_blt incoherency continues. While it did seem that the invalidate before the breadcrumb had improved the mtbf, nevertheless live_blt still failed. Mika's next idea was to pull the invalidate-stall into the breadcrumb write itself. References: 860afa086841 ("drm/i915/g

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree URL : https://patchwork.freedesktop.org/series/69399/ State : warning == Summary == $ dim checkpatch origin/drm-tip 68bd26fc5933 drm/i915: Split i915_active.mutex into an irq-safe spinlock

[Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Lionel Landwerlin
I'm observing incoherence metric values, changing from run to run. It appears the patches introducing noa wait & reconfiguration from command stream switched places in the series multiple times during the review. This lead to the dependency of one onto the order to go missing... Signed-off-by: Li

[Intel-gfx] [PATCH i-g-t 7/7] test/i915: Add i915_rc6_ctx_corruption

2019-11-13 Thread Mika Kuoppala
From: Imre Deak Add a test to exercise the kernel's mechanism to detection of RC6 context corruptions, take the necessary action in response (disable RC6 and runtime PM) and recover when possible (after system suspend/resume). v2: - Skip test on non-existing engines. - Fix for old kernels where

[Intel-gfx] [PATCH i-g-t 4/7] tests/i915: Skip if secure batches is not available

2019-11-13 Thread Mika Kuoppala
From: "Kuoppala, Mika" If we can't do secure execbuf, there is no point in trying. Signed-off-by: Kuoppala, Mika --- tests/i915/gem_exec_params.c | 16 tests/i915/gem_mocs_settings.c | 14 ++ tests/perf_pmu.c | 11 +++ 3 files changed, 41 in

[Intel-gfx] [PATCH i-g-t 3/7] lib/i915: Add query to detect if engine accepts only ro batches

2019-11-13 Thread Mika Kuoppala
From: "Kuoppala, Mika" If cmd parser is mandatory, batch can't be modified post execbuf. Some tests rely on modifying batch post execbuf. Give those tests a method to query if those modifications ever reach the actual engine command stream. v2: pull in the test changes, doh v3: class based query

[Intel-gfx] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Mika Kuoppala
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Mika Kuoppala
From: Mika Kuoppala For testing blitter engine command parser on gen9. v2: bad jump offset v3: rebase v4: improve bb start and subcase it v5: fix presumed offsets (Jon) Signed-off-by: Mika Kuoppala --- tests/Makefile.sources| 3 + tests/i915/gem_blt_parse.c| 997

[Intel-gfx] [PATCH i-g-t 1/7] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Mika Kuoppala
To simplify emitting the recursive batch, make batch always the first object on the execbuf list. v2: set handles early, poll_ptr indecency (Chris) v3: allow dep with poll v4: fix gem_exec_schedule v5: rebase v6: rebase v6: gem_ctx_shared v7: conditional close of poll handle Cc: Chris Wilson Sig

[Intel-gfx] [PATCH i-g-t 6/7] lib/igt_aux: Add helper to query suspend-to-mem modes

2019-11-13 Thread Mika Kuoppala
From: Imre Deak Add a helper to query the supported and currently selected suspend-to-mem modes. v2: - Fix for old kernels where the mem_sleep sysfs file didn't yet exist. Signed-off-by: Imre Deak --- lib/igt_aux.c | 81 +++ lib/igt_aux.h | 24 +

Re: [Intel-gfx] [PATCH i-g-t 1/7] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:07) > To simplify emitting the recursive batch, make batch > always the first object on the execbuf list. Requires v4.13. Useful to leave as a note. Fwiw, looks like 3.16 and 4.14 are still rotting away slowly. -Chris

Re: [Intel-gfx] [PATCH] drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Still the saga of the hsw live_blt incoherency continues. While it did > seem that the invalidate before the breadcrumb had improved the mtbf, > nevertheless live_blt still failed. Mika's next idea was to pull the > invalidate-stall into the breadcrumb write itself. > > Ref

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree URL : https://patchwork.freedesktop.org/series/69399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15248

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:08) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality b

Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Be consistent in our mocs setup on Tigerlake and set the unused control > value to follow the PTE entry as we previously have done. The unused > values are beyond the defines of the ABI, the consistency simplifies our > checking. > > Signed-off-by: Chris Wilson Reviewed-b

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Invalidate as we write the gen7 breadcrumb URL : https://patchwork.freedesktop.org/series/69408/ State : warning == Summary == $ dim checkpatch origin/drm-tip f30aa89cb9aa drm/i915/gt: Invalidate as we write the gen7 breadcrumb -:11: ERROR:GIT_COMMIT_I

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:11) > From: Mika Kuoppala > > For testing blitter engine command parser on gen9. > > v2: bad jump offset > v3: rebase > v4: improve bb start and subcase it > v5: fix presumed offsets (Jon) > > Signed-off-by: Mika Kuoppala > --- > tests/Makefile.sources

Re: [Intel-gfx] [PATCH i-g-t 7/7] test/i915: Add i915_rc6_ctx_corruption

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:49:13) > From: Imre Deak > > Add a test to exercise the kernel's mechanism to detection of RC6 > context corruptions, take the necessary action in response (disable > RC6 and runtime PM) and recover when possible (after system > suspend/resume). > > v2: > - S

Re: [Intel-gfx] [PATCH] drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Chris Wilson
Quoting Mika Kuoppala (2019-11-13 15:59:53) > Chris Wilson writes: > > > Still the saga of the hsw live_blt incoherency continues. While it did > > seem that the invalidate before the breadcrumb had improved the mtbf, > > nevertheless live_blt still failed. Mika's next idea was to pull the > > in

Re: [Intel-gfx] [PATCH] drm/i915/tgl: allow DVI/HDMI on port A

2019-11-13 Thread Matt Roper
On Tue, Nov 12, 2019 at 06:19:35PM -0800, Lucas De Marchi wrote: > Tiger Lake supports HDMI on port A. For other platforms we ignore what the VBT > says regarding HDMI to workaround broken VBTs, see commit > 2ba7d7e04371 ("drm/i915/bios: ignore HDMI on port A"). Make this apply > gen12+ so they inh

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Invalidate as we write the gen7 breadcrumb

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/gt: Invalidate as we write the gen7 breadcrumb URL : https://patchwork.freedesktop.org/series/69408/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15249 Summary --

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-11-13 15:46:39) > I'm observing incoherence metric values, changing from run to run. > > It appears the patches introducing noa wait & reconfiguration from > command stream switched places in the series multiple times during the > review. This lead to the dependency

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 5/7] Add tests/gem_blt_parse

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-11-13 15:49:11) >> From: Mika Kuoppala >> >> For testing blitter engine command parser on gen9. >> >> v2: bad jump offset >> v3: rebase >> v4: improve bb start and subcase it >> v5: fix presumed offsets (Jon) >> >> Signed-off-by: Mika Kuoppal

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table for EHL"

2019-11-13 Thread Matt Roper
On Wed, Nov 13, 2019 at 11:49:53AM +, Patchwork wrote: > == Series Details == > > Series: series starting with [v3,1/2] Revert "drm/i915/ehl: Update MOCS table > for EHL" > URL : https://patchwork.freedesktop.org/series/69383/ > State : failure > > == Summary == > > CI Bug Log - changes f

[Intel-gfx] [PATCH i-g-t] i915/gem_mocs_settings: Update TGL MOCS table

2019-11-13 Thread Matt Roper
The TGL MOCS table was corrected in the bspec and the kernel. Since this test hardcodes its own copy of the MOCS table, we need to make corresponding fixes here. References: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EHL"") References: bfb0e8e63d86 ("drm/i915/tgl: MOCS table updat

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/perf: don't forget noa wait after oa config URL : https://patchwork.freedesktop.org/series/69409/ State : success == Summary == CI Bug Log - changes from CI_DRM_7331 -> Patchwork_15250 Summary ---

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/7] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Mika Kuoppala
Chris Wilson writes: > Quoting Mika Kuoppala (2019-11-13 15:49:08) >> From: Jon Bloomfield >> >> gen9+ introduces a cmdparser for the BLT engine which copies the >> incoming BB to a kmd owned buffer for submission (to prevent changes >> being made after the bb has been safely scanned). This bre

[Intel-gfx] [PATCH] drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Chris Wilson
Do not leak our internal kernel address for random userspace to abuse. Daniel added the support to fbdev to filter out the physical addresses being exposed by fbdev, put that to use to protect ourselves. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112256 Fixes: 5f889b9a61dd ("drm/i915:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Hide smem_start from userspace URL : https://patchwork.freedesktop.org/series/69415/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0392ce3a5721 drm/i915/fbdev: Hide smem_start from userspace -:12: ERROR:GIT_COMMIT_ID: Please use git

[Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
fbdev uses the physical address of our framebuffer for its fb_mmap() routine. While we need to adapt this address for the new io BAR, we have to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 and we will then probably have to implement our fbops->fb_mmap() call back to handle

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Lionel Landwerlin
On 13/11/2019 18:35, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-11-13 15:46:39) I'm observing incoherence metric values, changing from run to run. It appears the patches introducing noa wait & reconfiguration from command stream switched places in the series multiple times during the r

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Lionel Landwerlin (2019-11-13 18:07:59) > On 13/11/2019 18:35, Chris Wilson wrote: > > Quoting Lionel Landwerlin (2019-11-13 15:46:39) > >> I'm observing incoherence metric values, changing from run to run. > >> > >> It appears the patches introducing noa wait & reconfiguration from > >> co

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:10:22) > Quoting Lionel Landwerlin (2019-11-13 18:07:59) > > On 13/11/2019 18:35, Chris Wilson wrote: > > > Quoting Lionel Landwerlin (2019-11-13 15:46:39) > > >> I'm observing incoherence metric values, changing from run to run. > > >> > > >> It appears the patc

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fbdev: Hide smem_start from userspace

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Hide smem_start from userspace URL : https://patchwork.freedesktop.org/series/69415/ State : success == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15251 Summary --- **SU

[Intel-gfx] [PATCH i-g-t 2/3] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
From: Mika Kuoppala To simplify emitting the recursive batch, make batch always the first object on the execbuf list. This will require kernel v4.13 or greater. v2: set handles early, poll_ptr indecency (Chris) v3: allow dep with poll v4: fix gem_exec_schedule v5: rebase v6: rebase v6: gem_ctx_

[Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t 1/3] i915: Skip if secure batches is not available

2019-11-13 Thread Chris Wilson
From: "Kuoppala, Mika" If we can't do secure execbuf, there is no point in trying. Signed-off-by: Kuoppala, Mika --- tests/i915/gem_exec_params.c | 22 -- tests/i915/gem_mocs_settings.c | 14 ++ tests/perf_pmu.c | 14 ++ 3 files chang

Re: [Intel-gfx] [PATCH i-g-t 1/3] i915: Skip if secure batches is not available

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:06) > From: "Kuoppala, Mika" > > If we can't do secure execbuf, there is no point in trying. > > Signed-off-by: Kuoppala, Mika Reviewed-by: Chris Wilson There are a few more I915_EXEC_SECURE users, as MI_STORE_DWORD requires it on gen4/5; but they are of

Re: [Intel-gfx] [PATCH] drm/i915/perf: don't forget noa wait after oa config

2019-11-13 Thread Lionel Landwerlin
On 13/11/2019 20:11, Chris Wilson wrote: Quoting Chris Wilson (2019-11-13 18:10:22) Quoting Lionel Landwerlin (2019-11-13 18:07:59) On 13/11/2019 18:35, Chris Wilson wrote: Quoting Lionel Landwerlin (2019-11-13 15:46:39) I'm observing incoherence metric values, changing from run to run. It a

Re: [Intel-gfx] [PATCH i-g-t 2/3] lib/igt_dummyload: Send batch as first

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:07) > From: Mika Kuoppala > > To simplify emitting the recursive batch, make batch > always the first object on the execbuf list. > > This will require kernel v4.13 or greater. > > v2: set handles early, poll_ptr indecency (Chris) > v3: allow dep with poll

Re: [Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:28:08) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality be

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:06:33) > fbdev uses the physical address of our framebuffer for its fb_mmap() > routine. While we need to adapt this address for the new io BAR, we have > to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 > and we will then probably have to

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915/fbdev: Restore physical addresses for fb_mmap() URL : https://patchwork.freedesktop.org/series/69416/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15252 Summary -

[Intel-gfx] [PATCH] drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree

2019-11-13 Thread Chris Wilson
As we want to be able to run inside atomic context for retiring the i915_active, and we are no longer allowed to abuse mutex_trylock, split the tree management portion of i915_active.mutex into an irq-safe spinlock. References: a0855d24fc22d ("locking/mutex: Complain upon mutex API misuse in IRQ

Re: [Intel-gfx] [PATCH 2/3] drm/i915/display/dsi: Add support to pipe D

2019-11-13 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 01:45:58PM -0800, Jose Souza wrote: Adding pipe D support to DSI transcoder. Not adding it for EDP transcoder code paths as only TGL has 4 pipes and it do not have a EDP transcoder. Cc: Lucas De Marchi Signed-off-by: José Roberto de Souza Reviewed-by: Lucas De Marchi

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display/mst: Enable virtual channel payload allocation earlier

2019-11-13 Thread Lucas De Marchi
On Thu, Nov 07, 2019 at 11:18:37PM +, Jose Souza wrote: On Thu, 2019-11-07 at 15:10 -0800, Lucas De Marchi wrote: On Thu, Nov 07, 2019 at 10:56:09PM +, Jose Souza wrote: > On Thu, 2019-11-07 at 14:44 -0800, Lucas De Marchi wrote: > > On Thu, Nov 07, 2019 at 01:45:59PM -0800, Jose Souza w

Re: [Intel-gfx] [PATCH 1/5] drm/i915/psr: Add bits per pixel limitation

2019-11-13 Thread Lucas De Marchi
On Tue, Nov 05, 2019 at 05:45:00PM -0800, Jose Souza wrote: PSR2 HW only support a limited number of bits per pixel, if mode has more than supported PSR2 should not be enabled. BSpec: 50422 BSpec: 7713 matches both specs Reviewed-by: Lucas De Marchi Lucas De Marchi Cc: Gwan-gyeong Mun S

Re: [Intel-gfx] [PATCH 1/5] drm/i915/psr: Add bits per pixel limitation

2019-11-13 Thread Lucas De Marchi
On Tue, Nov 12, 2019 at 09:16:57AM -0800, Matt Roper wrote: On Tue, Nov 05, 2019 at 05:45:00PM -0800, José Roberto de Souza wrote: PSR2 HW only support a limited number of bits per pixel, if mode has more than supported PSR2 should not be enabled. BSpec: 50422 BSpec: 7713 Cc: Gwan-gyeong Mun S

[Intel-gfx] [PATCH 2/2] drm/i915/tgl: Add Wa_1408615072

2019-11-13 Thread Radhakrishna Sripada
Disable VS Unit Clockgating. BSpec: 52857 Cc: Mika Kuoppala Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h i

[Intel-gfx] [PATCH 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Radhakrishna Sripada
Extend disabling SAMPLER_STATE prefetch workaround to gen12. BSpec: 52890 Cc: Mika Kuoppala Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarou

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2) URL : https://patchwork.freedesktop.org/series/69399/ State : warning == Summary == $ dim checkpatch origin/drm-tip 70ca71d22f04 drm/i915: Split i915_active.mutex into an irq-safe sp

[Intel-gfx] [PATCH i-g-t] tests: Add exercise for fbdev

2019-11-13 Thread Chris Wilson
I broke fb_mmap() proving that we need a test in CI! References: https://bugs.freedesktop.org/show_bug.cgi?id=112256 Signed-off-by: Chris Wilson --- tests/Makefile.sources| 1 + tests/fbdev.c | 69 +++ tests/intel-ci/fast-feedback.

Re: [Intel-gfx] [PATCH] drm/i915/fbdev: Restore physical addresses for fb_mmap()

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:06:33) > fbdev uses the physical address of our framebuffer for its fb_mmap() > routine. While we need to adapt this address for the new io BAR, we have > to fix v5.4 first! The simplest fix is to restore the smem back to v5.4 > and we will then probably have to

Re: [Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Brian Welty
On 11/12/2019 4:28 PM, Bruce Chang wrote: > There are quite a few reports regarding "BUG: sleeping function called from > invalid context at mm/page_alloc.c" > > Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic > context, but compress_page cannot be called in atomic con

Re: [Intel-gfx] [PATCH i-g-t 3/3] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 18:42:06) > Quoting Chris Wilson (2019-11-13 18:28:08) > > From: Jon Bloomfield > > > > gen9+ introduces a cmdparser for the BLT engine which copies the > > incoming BB to a kmd owned buffer for submission (to prevent changes > > being made after the bb has been s

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_create: Check for cache bypass around zeroed pages

2019-11-13 Thread Matthew Auld
On Wed, 13 Nov 2019 at 14:05, Chris Wilson wrote: > > Check that even if userspace tries to sneak around the CPU caches of its > zeroed pages, it sees nothing but zeroes. > > Suggested-by: Joonas Lahtinen > Signed-off-by: Chris Wilson > Cc: Joonas Lahtinen > Cc: Matthew Auld Reviewed-by: Matth

[Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Bruce Chang
There are quite a few reports regarding "BUG: sleeping function called from invalid context at mm/page_alloc.c" Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic context, but compress_page cannot be called in atomic context as it will call pool_alloc with GFP_KERNEL flag w

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2)

2019-11-13 Thread Patchwork
== Series Details == Series: drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree (rev2) URL : https://patchwork.freedesktop.org/series/69399/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7332 -> Patchwork_15253 =

Re: [Intel-gfx] [PATCH] drm/i915: Fix a bug calling sleep function in atomic context

2019-11-13 Thread Chris Wilson
Quoting Bruce Chang (2019-11-13 19:52:44) > There are quite a few reports regarding "BUG: sleeping function called from > invalid context at mm/page_alloc.c" > > Basically after the io_mapping_map_atomic_wc/kmap_atomic, it enters atomic > context, but compress_page cannot be called in atomic conte

Re: [Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Bloomfield, Jon
> -Original Message- > From: Chris Wilson > Sent: Wednesday, November 13, 2019 11:47 AM > To: intel-gfx@lists.freedesktop.org > Cc: Bloomfield, Jon ; Lahtinen, Joonas > ; Vivi, Rodrigo ; > Kuoppala, Mika ; Mika Kuoppala > > Subject: [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on g

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_blits: Use common igt_fls()

2019-11-13 Thread Summers, Stuart
On Sat, 2019-11-09 at 15:10 +, Chris Wilson wrote: > igt_aux.h already provides the optimal igt_fls(), so use that in > preference to open coding the brute force version. > > Reported-by: Stuart Summers > Signed-off-by: Chris Wilson > Cc: Stuart Summers Thanks for the look here Chris :) -

[Intel-gfx] [PULL] drm-misc-next-fixes

2019-11-13 Thread Sean Paul
Hi Dave & Daniel, Just one msm patch this week. Looks like -misc is going to be perfect when merge window rolls around :-) drm-misc-next-fixes-2019-11-13: - Fix memory leak in gpu debugfs node's release (Johan) Cc: Johan Hovold Cheers, Sean The following changes since commit 3ca3a9eab7085b3

Re: [Intel-gfx] [PATCH v6] drm/i915: Enable second dbuf slice for ICL and TGL

2019-11-13 Thread Matt Roper
On Fri, Nov 08, 2019 at 03:45:00PM +0200, Stanislav Lisovskiy wrote: > Also implemented algorithm for choosing DBuf slice configuration > based on active pipes, pipe ratio as stated in BSpec 12716. > > Now pipe allocation still stays proportional to pipe width as before, > however within allowed D

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definition

2019-11-13 Thread Souza, Jose
On Sat, 2019-11-09 at 10:47 +, Patchwork wrote: > == Series Details == > > Series: series starting with [1/3] drm/i915/display: Fix > TRANS_DDI_MST_TRANSPORT_SELECT definition > URL : https://patchwork.freedesktop.org/series/69160/ > State : success > > == Summary == > > CI Bug Log - chang

Re: [Intel-gfx] [PATCH i-g-t] i915/gem_mocs_settings: Update TGL MOCS table

2019-11-13 Thread Lucas De Marchi
On Wed, Nov 13, 2019 at 08:51:03AM -0800, Matt Roper wrote: The TGL MOCS table was corrected in the bspec and the kernel. Since this test hardcodes its own copy of the MOCS table, we need to make corresponding fixes here. References: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EH

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
Quoting Chris Wilson (2019-11-13 20:20:31) > From: Jon Bloomfield > > gen9+ introduces a cmdparser for the BLT engine which copies the > incoming BB to a kmd owned buffer for submission (to prevent changes > being made after the bb has been safely scanned). This breaks the > spin functionality be

[Intel-gfx] [PATCH i-g-t] igt: Use COND_BBEND for busy spinning on gen9

2019-11-13 Thread Chris Wilson
From: Jon Bloomfield gen9+ introduces a cmdparser for the BLT engine which copies the incoming BB to a kmd owned buffer for submission (to prevent changes being made after the bb has been safely scanned). This breaks the spin functionality because it relies on changing the submitted spin buffers

Re: [Intel-gfx] [PATCH 1/2] drm/i915/tgl: Wa_1606679103

2019-11-13 Thread Chris Wilson
Quoting Radhakrishna Sripada (2019-11-13 19:18:39) > Extend disabling SAMPLER_STATE prefetch workaround to gen12. > > BSpec: 52890 > Cc: Mika Kuoppala > Signed-off-by: Radhakrishna Sripada > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++- > 1 file changed, 7 insertions(+),

[Intel-gfx] [CI v2] drm/fbdev: Fallback to non tiled mode if all tiles not present

2019-11-13 Thread Manasi Navare
In case of tiled displays, if we hotplug just one connector, fbcon currently just selects the preferred mode and if it is tiled mode then that becomes a problem if rest of the tiles are not present. So in the fbdev driver on hotplug when we probe the client modeset, if we dont find all the connecto

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