From: Chris Wilson
Some of the non-privileged registers are at the same offset on each
engine. We can improve our coverage for unknown HW layout by using the
reported engine->mmio_base for relative offsets.
Subsequent to sign-off by Chris Wilson, added by Dale B Stimson:
Modify previous "i915/g
Signed-off-by: Dale B Stimson
---
lib/Makefile.sources | 2 +
lib/i915/gem_mmio_base.c | 353 +++
lib/i915/gem_mmio_base.h | 19 +++
lib/igt.h| 1 +
lib/meson.build | 1 +
5 files changed, 376 insertions(+)
create mode 10064
Obtaining mmio_base info via sysfs (if available). This is in addition
to the already existing support for obtaining that data via debugfs.
The use of sysfs data is preferred.
This patch depends upon the following proposed IGT patch, which is not
presently merged:
i915/gem_mmio_base.c - get mmi
v4:
Functionally identical to V3.
- Commentary - name of potential future method for getting info from sysfs
changed from _mmio_base_info_get_via_sysfs() to
_gem_engine_mmio_base_info_get_sysfs().
- Patches squashed in order to avoid compilation break in between, from:
i915/gem_ctx_isolati
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mst: Set intel_dp_set_m_n() for
MST slaves
URL : https://patchwork.freedesktop.org/series/7/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16536_full
===
== Series Details ==
Series: drm/i915/gt: Declare when we enabled timeslicing
URL : https://patchwork.freedesktop.org/series/73490/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7943 -> Patchwork_16580
Summary
---
**
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Declare when we enabled
timeslicing
URL : https://patchwork.freedesktop.org/series/73489/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7943 -> Patchwork_16579
===
Let userspace know if they can trust timeslicing by including it as part
of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
v2: Only declare timeslicing if we can safely preempt userspace.
Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
Signed-off-by: Chris Wilso
Quoting Chris Wilson (2020-02-14 23:19:16)
> Let userspace know if they can trust timeslicing by including it as part
> of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
>
> Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
> Signed-off-by: Chris Wilson
> Cc: Kenn
If we find ourselves waiting on a MI_SEMAPHORE_WAIT, either within the
user batch or in our own preamble, the engine raises a
GT_WAIT_ON_SEMAPHORE interrupt. We can unmask that interrupt and so
respond to a semaphore wait by yielding the timeslice, if we have
another context to yield to!
The only
Let userspace know if they can trust timeslicing by including it as part
of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING
Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
Signed-off-by: Chris Wilson
Cc: Kenneth Graunke
---
drivers/gpu/drm/i915/gt/intel_engine_
On 2020-02-14 19:40:15, Chris Wilson wrote:
> If the context has no engines, it has no engines -- do not override the
> user's setup.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Dale B Stimson
> ---
> lib/i915/gem_engine_topology.c | 19 +++
> 1 file changed, 7 insertions(+),
== Series Details ==
Series: drm/i915/gt: Expand bad CS completion event debug
URL : https://patchwork.freedesktop.org/series/73335/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7924_full -> Patchwork_16532_full
Summary
--
== Series Details ==
Series: drm/i915/psr: Force PSR probe only after full initialization (rev3)
URL : https://patchwork.freedesktop.org/series/73436/
State : failure
== Summary ==
Applying: drm/i915/psr: Force PSR probe only after full initialization
error: corrupt patch at line 11
error: cou
Quoting Antonio Argenziano (2020-02-14 21:49:16)
>
>
> On 14/02/20 11:40, Chris Wilson wrote:
> > Set up a custom engine map with no engines, and check that the
> > for_each_context_engine() correctly iterates over nothing.
> >
> > Signed-off-by: Chris Wilson
> > ---
> > tests/i915/gem_ctx_en
== Series Details ==
Series: drm/i915/selftests: Fix selftest_mocs for DGFX (rev2)
URL : https://patchwork.freedesktop.org/series/73387/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7942 -> Patchwork_16577
Summary
---
On 14/02/20 11:40, Chris Wilson wrote:
Set up a custom engine map with no engines, and check that the
for_each_context_engine() correctly iterates over nothing.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_engines.c | 28
1 file changed, 28 insertions(+)
== Series Details ==
Series: drm/i915/selftests: Fix selftest_mocs for DGFX (rev2)
URL : https://patchwork.freedesktop.org/series/73387/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9f9e214b4a7d drm/i915/selftests: Fix selftest_mocs for DGFX
-:19: WARNING:COMMIT_LOG_LONG_LINE:
== Series Details ==
Series: drm/i915: Init lspcon after HPD in intel_dp_detect()
URL : https://patchwork.freedesktop.org/series/73480/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7942 -> Patchwork_16576
Summary
---
On 14/02/20 11:40, Chris Wilson wrote:
Setup a context with no engines, and make sure we reject all execution
attempts.
Signed-off-by: Chris Wilson
Reviewed-by: Antonio Argenziano
---
tests/i915/gem_ctx_engines.c | 45
1 file changed, 45 insertion
== Series Details ==
Series: series starting with [1/1] drm/i915: MCHBAR memory info registers are
moved since GEN 12.
URL : https://patchwork.freedesktop.org/series/73332/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7924_full -> Patchwork_16531_full
===
== Series Details ==
Series: series starting with [1/2] drm/i915/csr: use intel_de_*() functions for
register access
URL : https://patchwork.freedesktop.org/series/73473/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7942 -> Patchwork_16575
===
>-Original Message-
>From: Intel-gfx On Behalf Of
>Maarten Lankhorst
>Sent: Friday, February 14, 2020 5:31 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 10/19] drm/i915: Nuke arguments to
>eb_pin_engine
>
>Those arguments are already set as eb.file and eb.args, so ki
>-Original Message-
>From: Intel-gfx On Behalf Of
>Maarten Lankhorst
>Sent: Friday, February 14, 2020 5:31 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 19/19] drm/i915: Use ww pinning for
>intel_context_create_request()
>
>We want to get rid of intel_context_pin(),
== Series Details ==
Series: series starting with [CI,1/2] drm/i915: split
intel_modeset_driver_remove() to pre/post irq uninstall
URL : https://patchwork.freedesktop.org/series/73469/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7942 -> Patchwork_16574
=
Set up a custom engine map with no engines, and check that the
for_each_context_engine() correctly iterates over nothing.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_engines.c | 28
1 file changed, 28 insertions(+)
diff --git a/tests/i915/gem_ctx_engines.c b/
If the context has no engines, it has no engines -- do not override the
user's setup.
Signed-off-by: Chris Wilson
---
lib/i915/gem_engine_topology.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topol
Setup a context with no engines, and make sure we reject all execution
attempts.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_engines.c | 45
1 file changed, 45 insertions(+)
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
inde
From: Dale B Stimson
Function intel_get_current_engine() should return NULL (instead of
engine 0) if there are no engines.
Function intel_init_engine_list() should not store potential engine
data in the output structure unless the engine is present.
Function intel_init_engine_list() should argu
On 2/14/20 10:29 AM, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2020-02-14 17:56:58)
On 2/12/20 4:49 PM, Brian Welty wrote:
On 2/12/2020 4:34 PM, Chris Wilson wrote:
Quoting Brian Welty (2020-02-13 00:14:18)
For DGFX devices, the MOCS control value is not initialized or used.
Setup a context with no engines, and make sure we reject all execution
attempts.
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_engines.c | 45
1 file changed, 45 insertions(+)
diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
inde
Quoting Chris Wilson (2020-02-14 18:54:43)
> +static void libapi(int i915)
> +{
> + I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 0);
I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 0) = {};
or
struct i915_gem_context_param_engines engines = {};
> + struct drm_i915_gem_context_param p = {
> +
+static void libapi(int i915)
+{
+ I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 0);
+ struct drm_i915_gem_context_param p = {
+ .ctx_id = gem_context_create(i915),
+ .param = I915_CONTEXT_PARAM_ENGINES,
+ .value = to_user_pointer(&engines),
+
Cherry trail no this problem? sure?
my z8350 ezpad always hang freeze on kernel 5.4/5.5/5.6.
when i bought it,Linux kernel has been 5.4.
v2: Restrict the heavy-weight wakeup to just the ISOF_PORT_PUNIT, there
is insufficient evidence to implicate a wider problem atm. Similarly,
restrict the w/a to
Quoting Antonio Argenziano (2020-02-14 18:43:01)
>
>
> On 13/02/20 11:26, Dale B Stimson wrote:
> > Function intel_get_current_engine() should return NULL (instead of
> > engine 0) if there are no engines.
> >
> > Function intel_init_engine_list() should not store potential engine
> > data in th
On 13/02/20 11:26, Dale B Stimson wrote:
Function intel_get_current_engine() should return NULL (instead of
engine 0) if there are no engines.
Function intel_init_engine_list() should not store potential engine
data in the output structure unless the engine is present.
Function intel_init_en
Quoting Chris Wilson (2020-02-14 18:29:31)
> +static bool has_l3cc(struct drm_i915_private *i915)
> +{
> + return true;
> +}
> +
> +static bool has_mocs(struct drm_i915_private *i915)
> +{
> + return !IS_DGFX(i915);
> +}
> +
> static int live_mocs_init(struct live_mocs *arg, struct int
== Series Details ==
Series: tests/i915/gem_exec_store: remove hard coded engine limit
URL : https://patchwork.freedesktop.org/series/73466/
State : failure
== Summary ==
Applying: tests/i915/gem_exec_store: remove hard coded engine limit
error: sha1 information is lacking or useless (tests/i9
Quoting Daniele Ceraolo Spurio (2020-02-14 17:56:58)
>
>
> On 2/12/20 4:49 PM, Brian Welty wrote:
> >
> > On 2/12/2020 4:34 PM, Chris Wilson wrote:
> >> Quoting Brian Welty (2020-02-13 00:14:18)
> >>> For DGFX devices, the MOCS control value is not initialized or used.
> >>
> >> Then why is the
Commit 60c6a14b489b ("drm/i915/display: Force the state compute phase
once to enable PSR") was forcing the state compute too earlier
causing errors because not everything was initialized, so here
moving to i915_driver_register() when everything is ready and driver
is registering into the rest of th
On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
becomes useless and never responds to cable hotplugging:
[3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon
[3.031945] [drm:intel_ddi_init [i915]] *ERROR* LSPCON init failed on port D
Seems like the lsp
On 2/12/20 4:49 PM, Brian Welty wrote:
On 2/12/2020 4:34 PM, Chris Wilson wrote:
Quoting Brian Welty (2020-02-13 00:14:18)
For DGFX devices, the MOCS control value is not initialized or used.
Then why is the table populated?
-Chris
The format has changed (been reduced?) for DGFX.
drm
On Wed, Feb 12, 2020 at 06:57:07PM +0200, Mika Kuoppala wrote:
> This is in mcr range of register, thus we can only verify
> it through mmio. Use engine wa list with mcr range verification
> skip.
>
> Fixes: 0db1a5f8706a ("drm/i915: Implement Wa_1607090982")
> Cc: Chris Wilson
> Signed-off-by: Mi
== Series Details ==
Series: drm/i915/tgl: Implement Wa_1606931601 (rev5)
URL : https://patchwork.freedesktop.org/series/72433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7922_full -> Patchwork_16530_full
Summary
---
On Fri, Feb 14, 2020 at 09:10:38AM -0800, Matt Roper wrote:
> On Wed, Feb 12, 2020 at 11:17:28AM -0800, Rafael Antognolli wrote:
> > It's not clear whether this workaround is final yet, but the BSpec
> > indicates that userspace needs to set bit 9 of this register on demand:
> >
> >"To avoid s
On Wed, Feb 12, 2020 at 09:06:11AM +, Chris Wilson wrote:
> BIT(14) is not sticking in 0xe4f4 so we have no idea if the w/a is still
> in effect when it needs to be. Until that is resolved, remove the
> failing bit.
The headline for the patch you're reverting was somewhat confusing since
it do
On Wed, Feb 12, 2020 at 11:17:28AM -0800, Rafael Antognolli wrote:
> It's not clear whether this workaround is final yet, but the BSpec
> indicates that userspace needs to set bit 9 of this register on demand:
>
>"To avoid sporadic corruptions “Set 0x7010[9] when Depth Buffer
>Surface Form
== Series Details ==
Series: Revert "drm/i915: Implement Wa_1607090982"
URL : https://patchwork.freedesktop.org/series/73324/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7922_full -> Patchwork_16529_full
Summary
---
== Series Details ==
Series: Adding definitions for VRR registers and bitfields (rev2)
URL : https://patchwork.freedesktop.org/series/73398/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7939 -> Patchwork_16572
Summary
On Thu, 2020-02-13 at 14:37 -0800, Matt Roper wrote:
> On Tue, Feb 11, 2020 at 10:11:42AM -0800, Caz Yokoyama wrote:
> > From: "Yokoyama, Caz"
> >
> > MAD_INTER_CHANNEL_0_0_0_MCHBAR:
> > code nameoffset DRAM_DDR_TYPE
> > SKL 0x5000
== Series Details ==
Series: drm/i915/selftests: Check for the error interrupt before we wait!
URL : https://patchwork.freedesktop.org/series/73461/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7939 -> Patchwork_16571
Summ
On 2020-02-14 12:49 p.m., Jani Nikula wrote:
> On Fri, 14 Feb 2020, Chris Wilson wrote:
>> Quoting Jani Nikula (2020-02-14 06:36:15)
>>> On Thu, 13 Feb 2020, Nathan Chancellor wrote:
A recent commit in clang added -Wtautological-compare to -Wall, which is
enabled for i915 after -Wtautol
== Series Details ==
Series: series starting with [CI,v3,1/3] drm/i915: Introduce
encoder->compute_config_late()
URL : https://patchwork.freedesktop.org/series/73460/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7939 -> Patchwork_16570
===
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, February 14, 2020 8:03 PM
> To: Shankar, Uma
> Cc: Kadiyala, Kishore ;
> intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] Add support for Color encoding YCBCR_BT2020
>
> On Fri, Feb 14, 2020 at 02:27:35PM +0
== Series Details ==
Series: series starting with [CI,v3,1/3] drm/i915: Introduce
encoder->compute_config_late()
URL : https://patchwork.freedesktop.org/series/73460/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8a37e7c4b9de drm/i915: Introduce encoder->compute_config_late()
On Fri, Feb 14, 2020 at 02:27:35PM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Ville Syrjälä
> > Sent: Friday, February 14, 2020 6:40 PM
> > To: Kadiyala, Kishore
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > Subject: Re: [Intel-gfx] [PATCH] Add support
On Fri, 14 Feb 2020, Ville Syrjälä wrote:
> On Fri, Feb 14, 2020 at 04:09:10PM +0200, Jani Nikula wrote:
>> The implicit "dev_priv" local variable use has been a long-standing pain
>> point in the register access macros I915_READ(), I915_WRITE(),
>> POSTING_READ(), I915_READ_FW(), and I915_WRITE_F
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, February 14, 2020 6:40 PM
> To: Kadiyala, Kishore
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> Subject: Re: [Intel-gfx] [PATCH] Add support for Color encoding YCBCR_BT2020
>
> On Fri, Feb 14, 2020 at 04:23:16PM +0530
On Fri, 14 Feb 2020, "Sarvela, Tomi P" wrote:
>> From: Jani Nikula
>>
>> On Mon, 10 Feb 2020, Arkadiusz Hiler wrote:
>> > As of the 3 days worth of queued shards:
>> >
>> > I agree that this is unacceptable, but we can do only so much from the
>> > CI/infra side. The time has been creeping up s
On Fri, Feb 14, 2020 at 04:09:10PM +0200, Jani Nikula wrote:
> The implicit "dev_priv" local variable use has been a long-standing pain
> point in the register access macros I915_READ(), I915_WRITE(),
> POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().
>
> Replace them with the corresponding ne
> -Original Message-
> From: Intel-gfx On Behalf Of
> Patchwork
> Sent: Wednesday, January 29, 2020 5:55 AM
> To: Paauwe, Bob J
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Adding YUV444 packed
> format
> support for skl+ (rev3)
>
>
The implicit "dev_priv" local variable use has been a long-standing pain
point in the register access macros I915_READ(), I915_WRITE(),
POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().
Replace them with the corresponding new display engine register
accessors intel_de_read(), intel_de_write(),
The implicit "dev_priv" local variable use has been a long-standing pain
point in the register access macros I915_READ(), I915_WRITE(),
POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW().
Replace them with the corresponding new display engine register
accessors intel_de_read(), intel_de_write(),
> From: Jani Nikula
>
> On Mon, 10 Feb 2020, Arkadiusz Hiler wrote:
> > As of the 3 days worth of queued shards:
> >
> > I agree that this is unacceptable, but we can do only so much from the
> > CI/infra side. The time has been creeping up steadily over the last year
> > or so and the machines
Hi Tvrtko,
> > > > + }
> > > > +
> > > > + intel_gt_sysfs_pm_remove(gt, root);
> > > > + kobject_put(root);
> > >
> > > Maybe stick to the same terminology regarding root and parent.
> >
> > yes.
> >
> > > Get/put on the parent looks unbalanced. Both register and unregister ta
Split intel_modeset_driver_remove() to two, the part with working irqs
before irq uninstall, and the part after irq uninstall. Move
irq_unintall() closer to the layer it belongs.
The error path in i915_driver_modeset_probe() looks obviously weird
after this, but remains as good or broken as it eve
Push irq uninstall further up, by splitting i915_driver_modeset_remove()
to two, the part with working irqs before irq uninstall, and the part
after irq uninstall. No functional changes.
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c
On Fri, Feb 14, 2020 at 08:32:19AM +, Chris Wilson wrote:
> Quoting Jani Nikula (2020-02-14 06:36:15)
> > On Thu, 13 Feb 2020, Nathan Chancellor wrote:
> > > A recent commit in clang added -Wtautological-compare to -Wall, which is
> > > enabled for i915 after -Wtautological-compare is disabled
On 14/02/2020 13:18, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2020-02-14 12:54:35)
On 14/02/2020 11:03, Andi Shyti wrote:
+struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev)
+{
+ struct kobject *kobj = &dev->kobj;
+ /*
+ * We are interested at knowing from where
On 14/02/2020 13:16, Andi Shyti wrote:
Hi Tvrtko,
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create the 'gt/' directory in sysfs and move the power management
related files.
Can you paste the new and legacy paths in the commit message?
sure!
Quoting Matthew Auld (2020-02-14 13:08:26)
> Prep for having an arbitrary context engine[], since that can be
> whatever we like.
>
> Signed-off-by: Matthew Auld
> Cc: Antonio Argenziano
> Cc: Tvrtko Ursulin
> Cc: Chris Wilson
Arrays allocated, cleared and freed for nengine.
Reviewed-by: Chri
On 14/02/2020 13:08, Matthew Auld wrote:
Prep for having an arbitrary context engine[], since that can be
whatever we like.
Signed-off-by: Matthew Auld
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Cc: Chris Wilson
---
tests/i915/gem_exec_store.c | 33 +
1 fi
Quoting Patchwork (2020-02-14 13:13:51)
> == Series Details ==
>
> Series: drm/i915/gt: make a gt sysfs group and move power management files
> (rev3)
> URL : https://patchwork.freedesktop.org/series/73190/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_7939 -> Patch
Hi Andi,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.6-rc1 next-20200214]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use
On Fri, 14 Feb 2020 at 12:07, Chris Wilson wrote:
>
> Sometimes the error interrupt can fire even before we have seen the
> request go active -- in which case, we end up waiting until the timeout
> as the request is already completed. Double check for this case!
>
> Signed-off-by: Chris Wilson
Re
Quoting Tvrtko Ursulin (2020-02-14 12:54:35)
>
> On 14/02/2020 11:03, Andi Shyti wrote:
> > +struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev)
> > +{
> > + struct kobject *kobj = &dev->kobj;
> > + /*
> > + * We are interested at knowing from where the interface
> > +
Hi Tvrtko,
> > The GT has its own properties and in sysfs they should be grouped
> > in the 'gt/' directory.
> >
> > Create the 'gt/' directory in sysfs and move the power management
> > related files.
>
> Can you paste the new and legacy paths in the commit message?
sure!
> > diff --git a/dri
Quoting Andi Shyti (2020-02-14 11:03:08)
> +struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev)
> +{
> + struct kobject *kobj = &dev->kobj;
> + /*
> +* We are interested at knowing from where the interface
> +* has been called, whether it's called from gt/ or
== Series Details ==
Series: drm/i915/gt: make a gt sysfs group and move power management files
(rev3)
URL : https://patchwork.freedesktop.org/series/73190/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7939 -> Patchwork_16569
=
On Fri, Feb 14, 2020 at 04:23:16PM +0530, Kishore Kadiyala wrote:
> Currently the plane property doesn't have support for YCBCR_BT2020,
> which enables the corresponding color conversion mode on plane CSC.
>
> Signed-off-by: Kishore Kadiyala
> Cc: Uma Shankar
> ---
> drivers/gpu/drm/i915/displa
Prep for having an arbitrary context engine[], since that can be
whatever we like.
Signed-off-by: Matthew Auld
Cc: Antonio Argenziano
Cc: Tvrtko Ursulin
Cc: Chris Wilson
---
tests/i915/gem_exec_store.c | 33 +
1 file changed, 25 insertions(+), 8 deletions(-)
d
On 14/02/2020 11:03, Andi Shyti wrote:
The GT has its own properties and in sysfs they should be grouped
in the 'gt/' directory.
Create the 'gt/' directory in sysfs and move the power management
related files.
Can you paste the new and legacy paths in the commit message?
Signed-off-by: And
== Series Details ==
Series: drm/i915/gt: make a gt sysfs group and move power management files
(rev3)
URL : https://patchwork.freedesktop.org/series/73190/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/gt: make a gt sysfs group and move pow
== Series Details ==
Series: drm/i915/gt: make a gt sysfs group and move power management files
(rev3)
URL : https://patchwork.freedesktop.org/series/73190/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2bb6ef6acc00 drm/i915/gt: make a gt sysfs group and move power management
Quoting Jani Nikula (2020-02-14 07:57:09)
> On Thu, 13 Feb 2020, Chris Wilson wrote:
> > Provide a library to generate correct YAML for use in structured debugfs
> > or similar information dumps. This will be useful to pull our large
> > information dumps into a forwards compatible, parse-able fil
Add definitions for registers grouped under Transcoder VRR function
with necessary bitfields.
Bspec: 49268
v2: Use REG_GENMASK, correct tabs/space indentation and move the
definitions near the transcoder section.(Jani)
Cc: Manasi Navare
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Matt Roper
Signed
Add definitions for configuring VRR registers for TGL.
Aditya Swarup (1):
drm/i915/tgl: Add definitions for VRR registers and bits
drivers/gpu/drm/i915/i915_reg.h | 90 +
1 file changed, 90 insertions(+)
--
2.25.0
== Series Details ==
Series: Add support for Color encoding YCBCR_BT2020
URL : https://patchwork.freedesktop.org/series/73457/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7938 -> Patchwork_16568
Summary
---
**SUCCE
Sometimes the error interrupt can fire even before we have seen the
request go active -- in which case, we end up waiting until the timeout
as the request is already completed. Double check for this case!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 4
1 file cha
On Fri, 14 Feb 2020, Chris Wilson wrote:
> Quoting Jani Nikula (2020-02-14 06:36:15)
>> On Thu, 13 Feb 2020, Nathan Chancellor wrote:
>> > A recent commit in clang added -Wtautological-compare to -Wall, which is
>> > enabled for i915 after -Wtautological-compare is disabled for the rest
>> > of t
== Series Details ==
Series: drm/i915/gem: Implement parallel execbuf submission.
URL : https://patchwork.freedesktop.org/series/73456/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7938 -> Patchwork_16567
Summary
---
On Fri, 14 Feb 2020, Chris Wilson wrote:
> Quoting Jani Nikula (2020-02-11 16:14:51)
>> The i915_debugfs.c has grown more than a little unwieldy. Split out the
>> display related debugfs code to a file of its own under display/,
>> initialized with a separate call. No functional changes.
>>
>> v2
This patch pushes out the computation of master and slave
transcoders in crtc states after encoder's compute_config hook.
This ensures that the assigned master slave crtcs have exact same
mode and timings which is a requirement for Port sync mode
to be enabled.
v3:
* Make crtc_state const, remove
From: Ville Syrjälä
Add an optional secondary encoder state compute hook. This gets
called after the normak .compute_config() has been called for
all the encoders in the state. Thus in the new hook we can rely
on all derived state populated by .compute_config() to be already
set up. Should be use
If one of the synced crtcs needs a full modeset, we need
to make sure all the synced crtcs are forced a full
modeset.
v3:
* Remove ~BIT(cpu_trans) which is a nop (Ville)
* use get_new_crtc_state and remove error check (Ville)
v2:
* Add tiles based on cpu_trans check (Ville)
Suggested-by: Ville S
On Fri, 14 Feb 2020, Kishore Kadiyala wrote:
> Currently the plane property doesn't have support for YCBCR_BT2020,
> which enables the corresponding color conversion mode on plane CSC.
Please prefix your patch subjects properly. "drm/i915: " at a minimum
for stuff touching i915.
No need to resen
On Sun, Feb 02, 2020 at 11:47:54PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä
>
> Add an optional secondary encoder state compute hook. This gets
> called after the normak .compute_config() has been called for
> all the encoders in the state. Thus in the new hook we can rely
> on all deriv
== Series Details ==
Series: drm/i915/gem: Implement parallel execbuf submission.
URL : https://patchwork.freedesktop.org/series/73456/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
45e26eb55b49 drm/i915: Drop inspection of execbuf flags during evict
77137cc44da0 drm/i915/gem:
On Thu, Feb 13, 2020 at 11:29:48AM -0800, Dale B Stimson wrote:
> On 2020-02-13 10:29:55, Petri Latvala wrote:
> > On Wed, Feb 12, 2020 at 05:28:40PM -0800, Dale B Stimson wrote:
> > > At the start of igt_main, failure of the initial tests for successful
> > > initialization transfer control to the
== Series Details ==
Series: series starting with [1/2] drm/i915/gt: Yield the timeslice if caught
waiting on a user semaphore
URL : https://patchwork.freedesktop.org/series/73455/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7938 -> Patchwork_16566
=
1 - 100 of 128 matches
Mail list logo