== Series Details ==
Series: drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017
URL : https://patchwork.freedesktop.org/series/74100/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8035 -> Patchwork_16772
Summary
== Series Details ==
Series: drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017
URL : https://patchwork.freedesktop.org/series/74100/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
983ed114d770 drm/i915/dp: Add dpcd link_rate quirk for Apple 15" MBP 2017
-:43:
This fixes a problem found on the MacBookPro 2017 Retina panel.
The panel reports 10 bpc color depth in its EDID, and the
firmware chooses link settings at boot which support enough
bandwidth for 10 bpc (324000 kbit/sec = multiplier 0xc),
but the DP_MAX_LINK_RATE dpcd register only reports
2.7
== Series Details ==
Series: drm managed resources, v3
URL : https://patchwork.freedesktop.org/series/74035/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8022_full -> Patchwork_16742_full
Summary
---
**FAILURE**
== Series Details ==
Series: drm/i915: Fix kbuild test robot build error (rev2)
URL : https://patchwork.freedesktop.org/series/73990/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8021_full -> Patchwork_16741_full
Summary
== Series Details ==
Series: drm/i915: Proper dbuf global state (rev3)
URL : https://patchwork.freedesktop.org/series/73421/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8021_full -> Patchwork_16739_full
Summary
---
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/huc: update TGL HuC to v7.0.12
URL : https://patchwork.freedesktop.org/series/74099/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8035 -> Patchwork_16771
Hi Daniel,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-20200228]
[cannot apply to drm-intel/for-linux-next linus/master
pinchartl-media/drm/du/next v5.6-rc3]
[if your patch is applied to the wrong git tree, please drop
== Series Details ==
Series: drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev5)
URL : https://patchwork.freedesktop.org/series/72747/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8035 -> Patchwork_16770
To enable GuC and HuC loading on all gen9+ CI machines.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index
Update to the latest available TGL HuC, which includes changes required
by the media team.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Tony Ye
Cc: Michal Wajdeczko
Cc: Anusha Srivatsa
Reviewed-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
1 file changed, 1
On Fri, Feb 28, 2020 at 04:45:43PM -0800, Souza, Jose wrote:
> On Fri, 2020-02-28 at 16:29 -0800, Matt Roper wrote:
> > On Fri, Feb 28, 2020 at 04:04:17PM -0800, Souza, Jose wrote:
> > > On Fri, 2020-02-28 at 13:25 -0800, Matt Roper wrote:
> > > > On Thu, Feb 27, 2020 at 02:00:59PM -0800, José
On some platforms such as Elkhart Lake, although we may use DDI D
to drive a connector, we have to use PHY A (Combo Phy PORT A) to
detect the hotplug interrupts as per the spec because there is no
one-to-one mapping between DDIs and PHYs. Therefore, use the
function intel_port_to_phy() which
== Series Details ==
Series: drm/i915/crc: move pipe_crc from drm_i915_private to intel_crtc
URL : https://patchwork.freedesktop.org/series/74031/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8020_full -> Patchwork_16738_full
On Fri, 2020-02-28 at 16:29 -0800, Matt Roper wrote:
> On Fri, Feb 28, 2020 at 04:04:17PM -0800, Souza, Jose wrote:
> > On Fri, 2020-02-28 at 13:25 -0800, Matt Roper wrote:
> > > On Thu, Feb 27, 2020 at 02:00:59PM -0800, José Roberto de Souza
> > > wrote:
> > > > It is fixed in B0 stepping.
> > >
On Fri, Feb 28, 2020 at 04:04:17PM -0800, Souza, Jose wrote:
> On Fri, 2020-02-28 at 13:25 -0800, Matt Roper wrote:
> > On Thu, Feb 27, 2020 at 02:00:59PM -0800, José Roberto de Souza
> > wrote:
> > > It is fixed in B0 stepping.
> > >
> > > Signed-off-by: José Roberto de Souza
> > > ---
> > >
On Fri, Feb 28, 2020 at 10:43:39AM +, Chris Wilson wrote:
> We [will] expose various per-engine scheduling controls. One of which,
> 'heartbeat_duration_ms', defines how often we send a heartbeat down the
> engine to check upon the health of the engine. If a heartbeat does not
> complete
On 2/28/20 1:18 AM, Jani Nikula wrote:
On Thu, 27 Feb 2020, Daniele Ceraolo Spurio
wrote:
Follow-up patches will pass const objects from debugfs to some those
functions, so we need to be ready.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Cc: John Harrison
Cc: Matthew
> > > +void dyn_sysfs_engines(int i915, int engines, const char *file,
> > > +void (*test)(int, int))
> > > +{
> > > + char buf[512];
> > > + int len;
> > > +
> > > + lseek(engines, 0, SEEK_SET);
> > > + while ((len = syscall(SYS_getdents64, engines, buf,
On Fri, 2020-02-28 at 13:25 -0800, Matt Roper wrote:
> On Thu, Feb 27, 2020 at 02:00:59PM -0800, José Roberto de Souza
> wrote:
> > It is fixed in B0 stepping.
> >
> > Signed-off-by: José Roberto de Souza
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 5 +++--
> > 1 file changed, 3
== Series Details ==
Series: drm/i915: Use intel_plane_data_rate for min_cdclk calculation (rev6)
URL : https://patchwork.freedesktop.org/series/73718/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8020_full -> Patchwork_16737_full
Hi Chris,
> +static int create_ext_ioctl(int i915,
> + struct drm_i915_gem_context_create_ext *arg)
> +{
> + int err;
> +
> + err = 0;
> + if (igt_ioctl(i915, DRM_IOCTL_I915_GEM_CONTEXT_CREATE_EXT, arg)) {
> + err = -errno;
> +
Quoting Andi Shyti (2020-02-28 23:34:48)
> On Fri, Feb 28, 2020 at 10:43:39AM +, Chris Wilson wrote:
> > We [will] expose various per-engine scheduling controls. One of which,
> > 'heartbeat_duration_ms', defines how often we send a heartbeat down the
> > engine to check upon the health of the
ld test ERROR on next-20200228]
> [cannot apply to drm-intel/for-linux-next linus/master
> pinchartl-media/drm/du/next v5.6-rc3]
> [if your patch is applied to the wrong git tree, please drop us a note to help
> improve the system. BTW, we also suggest to use '--base' option to spec
Quoting Andi Shyti (2020-02-28 23:27:04)
> Hi Chris,
>
> > +static int create_ext_ioctl(int i915,
> > + struct drm_i915_gem_context_create_ext *arg)
> > +{
> > + int err;
> > +
> > + err = 0;
> > + if (igt_ioctl(i915, DRM_IOCTL_I915_GEM_CONTEXT_CREATE_EXT,
On Fri, Feb 28, 2020 at 11:45 PM Sam Ravnborg wrote:
>
> Hi Daniel.
>
> Some nitpicks / bikeshedding below.
>
> Sam
>
> On Thu, Feb 27, 2020 at 07:14:34PM +0100, Daniel Vetter wrote:
> > We have lots of these. And the cleanup code tends to be of dubious
> > quality. The biggest wrong
On Fri, Feb 28, 2020 at 9:26 PM Sam Ravnborg wrote:
>
> Hi Daniel.
>
> Some bikeshedding in the following.
> with or with addressing (IMHO valid points) consider the patch:
>
> Reviewed-by: Sam Ravnborg
>
> Sam
>
> On Thu, Feb 27, 2020 at 07:14:57PM +0100, Daniel Vetter wrote:
> >
== Series Details ==
Series: drm/i915/dram: hide the dram structs better
URL : https://patchwork.freedesktop.org/series/74025/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8020_full -> Patchwork_16736_full
Summary
---
Hey - I've got a good bit of stuff on my plate right now since I just got back
from PTO and am going through my backlog of stuff, but I'll try to get this
reviewed first chance I get
On Tue, 2020-02-18 at 17:02 -0500, Sean Paul wrote:
> From: Sean Paul
>
> Used to query whether an MST stream is
Hi Daniel.
Some nitpicks / bikeshedding below.
Sam
On Thu, Feb 27, 2020 at 07:14:34PM +0100, Daniel Vetter wrote:
> We have lots of these. And the cleanup code tends to be of dubious
> quality. The biggest wrong pattern is that developers use devm_, which
> ties the release action to
== Series Details ==
Series: drm/i915/display: nuke skl workaround for pre-production hw (rev3)
URL : https://patchwork.freedesktop.org/series/71230/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8034 -> Patchwork_16769
Can you guys help in this one? Check Matt comment bellow.
On Fri, 2020-02-28 at 14:07 -0800, Matt Roper wrote:
> On Thu, Feb 27, 2020 at 02:01:01PM -0800, José Roberto de Souza
> wrote:
> > This will fix a memory coherence issue.
> >
> > v3: using whitespace to make easy to read WA (Chris)
> >
On Thu, Feb 27, 2020 at 02:01:01PM -0800, José Roberto de Souza wrote:
> This will fix a memory coherence issue.
>
> v3: using whitespace to make easy to read WA (Chris)
>
> BSpec: 52890
> Cc: Chris Wilson
> Signed-off-by: José Roberto de Souza
> ---
>
== Series Details ==
Series: series starting with [1/3] drm/i915/vgpu: improve vgpu abstractions
URL : https://patchwork.freedesktop.org/series/74024/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8020_full -> Patchwork_16735_full
== Series Details ==
Series: series starting with [1/4] drm/i915: Don't check uv_wm in
skl_plane_wm_equals()
URL : https://patchwork.freedesktop.org/series/74092/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8033 -> Patchwork_16768
Hi Chris,
On Fri, Feb 28, 2020 at 10:43:36AM +, Chris Wilson wrote:
> Several tests depend upon the implicit engine->mmio_base but have no
> means of determining the physical layout. Since the kernel has started
> providing this information, start putting it to use.
>
> Signed-off-by: Chris
On Thu, Feb 27, 2020 at 02:00:59PM -0800, José Roberto de Souza wrote:
> It is fixed in B0 stepping.
>
> Signed-off-by: José Roberto de Souza
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
On Fri, Feb 28, 2020 at 9:31 PM Dave Airlie wrote:
>
> On Sat, 29 Feb 2020 at 05:34, Eric Anholt wrote:
> >
> > On Fri, Feb 28, 2020 at 12:48 AM Dave Airlie wrote:
> > >
> > > On Fri, 28 Feb 2020 at 18:18, Daniel Stone wrote:
> > > >
> > > > On Fri, 28 Feb 2020 at 03:38, Dave Airlie wrote:
>
On Fri, Feb 28, 2020 at 12:00 AM Daniel Stone wrote:
>
> Hi Matt,
>
> On Thu, 27 Feb 2020 at 23:45, Matt Turner wrote:
> > We're paying 75K USD for the bandwidth to transfer data from the
> > GitLab cloud instance. i.e., for viewing the https site, for
> > cloning/updating git repos, and for
Hi Daniel,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on next-20200228]
[cannot apply to drm-intel/for-linux-next linus/master
pinchartl-media/drm/du/next v5.6-rc3]
[if your patch is applied to the wrong git tree, please drop
On Thu, Feb 27, 2020 at 02:00:58PM -0800, José Roberto de Souza wrote:
> Different issues with the same fix, so justing adding
> Wa_1409142259, Wa_1409252684, Wa_1409217633, Wa_1409207793,
> Wa_1409178076 and 1408979724 to the comment so other devs can check if
> this Was were implemetend with a
According to intel_detect_preproduction_hw(), the SKL stepping D0 is
still pre-preproduction so we can nuke the additional workaround.
WA database says it applies to all steppings, but bspec disagrees.
After talking to HW people they said it was fixed either on B0 or D0.
While at it, nuke
On Thu, Feb 27, 2020 at 02:00:57PM -0800, José Roberto de Souza wrote:
> The Wa number for this fix is Wa_1607087056 the BSpec bug id is
> 1607087056, just updating to match BSpec.
>
> BSpec: 52890
> Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
> ---
>
On Thu, Feb 27, 2020 at 02:00:52PM -0800, José Roberto de Souza wrote:
> This will whitelist the HIZ_CHICKEN register so mesa can disable the
> optimizations and avoid hang when using D16_UNORM.
>
> v2: moved to the right place and used the right function() (Chris)
>
> Cc: Matt Roper
> Cc:
On 28/02/2020 18:44, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-02-28 16:02:29)
On Gen11 powergating half the execution units is a functional
requirement when using the VME samplers. Not fullfilling this
requirement can lead to hangs.
This unfortunately plays fairly poorly with the
On Thu, Feb 27, 2020 at 07:15:20PM +0100, Daniel Vetter wrote:
> It's right above the drm_dev_put().
>
> This allows us to delete a bit of onion unwinding in
> udl_modeset_init().
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(),
From: Ville Syrjälä
Currently we're comparing the watermarks between the old and new states
before we've fully computed the new watermarks. In particular
skl_build_pipe_wm() will not account for the amount of ddb space we'll
have. That information is only available during skl_compute_ddb()
which
From: Ville Syrjälä
We are mistakenly skipping transition watermarks on glk. Fix
up the condition for glk, and toss in the w/a name from
the database.
v2: Reorder the ipc enabled vs. platform check to be more sensible
Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi #v1
---
From: Ville Syrjälä
Display w/a #1140 tells us we have to program the transition
watermark to the minimum value on glk/cnl. Let's do that.
Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_pm.c | 13 +
1 file changed, 9 insertions(+), 4
From: Ville Syrjälä
The hardware never sees the uv_wm values (apart from
uv_wm.min_ddb_alloc affecting the ddb allocation). Thus there
is no point in comparing uv_wm to determine if we need to
reprogram the watermark registers. So let's check only the
rgb/y watermark in skl_plane_wm_equals().
On Thu, Feb 27, 2020 at 07:15:19PM +0100, Daniel Vetter wrote:
> Allows us to drop the drm_driver.release callback from all
> drivers, and remove the mipi_dbi_release() function.
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence
On Thu, Feb 27, 2020 at 07:15:18PM +0100, Daniel Vetter wrote:
> 7/7 drivers agree that's the right choice, let's do this.
>
> This avoids duplicating the same old error checking code over all 7
> drivers, which is the motivation here.
>
> Reviewed-by: Noralf Trønnes
> Tested-by: Noralf Trønnes
On Thu, Feb 27, 2020 at 07:15:00PM +0100, Daniel Vetter wrote:
> We can even delete the drm_driver.release hook now!
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence all we need to do to
> ensure that drm_mode_config_cleanup()
On Sat, 29 Feb 2020 at 05:34, Eric Anholt wrote:
>
> On Fri, Feb 28, 2020 at 12:48 AM Dave Airlie wrote:
> >
> > On Fri, 28 Feb 2020 at 18:18, Daniel Stone wrote:
> > >
> > > On Fri, 28 Feb 2020 at 03:38, Dave Airlie wrote:
> > > > b) we probably need to take a large step back here.
> > > >
>
Hi Daniel.
Some bikeshedding in the following.
with or with addressing (IMHO valid points) consider the patch:
Reviewed-by: Sam Ravnborg
Sam
On Thu, Feb 27, 2020 at 07:14:57PM +0100, Daniel Vetter wrote:
> drm_mode_config_cleanup is idempotent, so no harm in calling this
> twice. This
== Series Details ==
Series: series starting with [1/3] drm/i915: split intel_modeset_init()
pre/post gem init
URL : https://patchwork.freedesktop.org/series/74021/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8019_full -> Patchwork_16734_full
On Fri, Feb 28, 2020 at 07:04:41PM +0100, Peter Zijlstra wrote:
> On Thu, Feb 27, 2020 at 07:03:42PM -0600, Josh Poimboeuf wrote:
> > > And why not mark gen8_canonical_addr() __always_inline?
> >
> > Right, marking those two functions as __always_inline is the other
> > option. The problem is,
On 2020-02-28 10:43:37, Chris Wilson wrote:
> Some of the non-privileged registers are at the same offset on each
> engine. We can improve our coverage for unknown HW layout by using the
> reported engine->mmio_base for relative offsets.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Dale B
On 2020-02-28 10:43:36, Chris Wilson wrote:
> Several tests depend upon the implicit engine->mmio_base but have no
> means of determining the physical layout. Since the kernel has started
> providing this information, start putting it to use.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Dale B
== Series Details ==
Series: series starting with [v2,3/3] drm/i915: HDCP: retry link integrity
check on failure (rev3)
URL : https://patchwork.freedesktop.org/series/73961/
State : failure
== Summary ==
Applying: drm/i915: HDCP: retry link integrity check on failure
error: sha1 information
On Fri, Feb 28, 2020 at 12:48 AM Dave Airlie wrote:
>
> On Fri, 28 Feb 2020 at 18:18, Daniel Stone wrote:
> >
> > On Fri, 28 Feb 2020 at 03:38, Dave Airlie wrote:
> > > b) we probably need to take a large step back here.
> > >
> > > Look at this from a sponsor POV, why would I give X.org/fd.o
>
== Series Details ==
Series: drm/i915/perf: reintroduce wait on OA configuration completion
URL : https://patchwork.freedesktop.org/series/74014/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8019_full -> Patchwork_16733_full
On Fri, 2020-02-28 at 12:21 +0200, Petri Latvala wrote:
> On Thu, Feb 27, 2020 at 11:42:03PM +, Souza, Jose wrote:
> > The following changes since commit
> > efcfa03ae6100dfe523ebf612e03c3a90fc4c794:
> >
> > linux-firmware: Update firmware file for Intel Bluetooth AX201
> > (2020-
> > 02-24
== Series Details ==
Series: drm/i915: Fix 90/270 degree rotated RGB565 src coord checks (rev3)
URL : https://patchwork.freedesktop.org/series/59956/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8032 -> Patchwork_16766
== Series Details ==
Series: drm/i915: Clean up DPLL output/refclock tracking (rev2)
URL : https://patchwork.freedesktop.org/series/73977/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8032 -> Patchwork_16764
Summary
== Series Details ==
Series: drm/i915: Fix 90/270 degree rotated RGB565 src coord checks (rev3)
URL : https://patchwork.freedesktop.org/series/59956/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f854cfdc461f drm/i915: Fix 90/270 degree rotated RGB565 src coord checks
-:65:
== Series Details ==
Series: drm/i915/perf: introduce global sseu pinning
URL : https://patchwork.freedesktop.org/series/74086/
State : failure
== Summary ==
Applying: drm/i915/perf: introduce global sseu pinning
error: sha1 information is lacking or useless
On Thu, Feb 27, 2020 at 07:03:42PM -0600, Josh Poimboeuf wrote:
> > And why not mark gen8_canonical_addr() __always_inline?
>
> Right, marking those two functions as __always_inline is the other
> option. The problem is, if you keep doing it, eventually you end up
> with __always_inline-itis
On Thu, Feb 27, 2020 at 7:38 PM Dave Airlie wrote:
>
> On Fri, 28 Feb 2020 at 07:27, Daniel Vetter wrote:
> >
> > Hi all,
> >
> > You might have read the short take in the X.org board meeting minutes
> > already, here's the long version.
> >
> > The good news: gitlab.fd.o has become very popular
== Series Details ==
Series: drm/i915: Clean up DPLL output/refclock tracking (rev2)
URL : https://patchwork.freedesktop.org/series/73977/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Fix bounds check in intel_get_shared_dpll_id()
Okay!
== Series Details ==
Series: drm/i915: Clean up DPLL output/refclock tracking (rev2)
URL : https://patchwork.freedesktop.org/series/73977/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
19fd5dd4fc02 drm/i915: Fix bounds check in intel_get_shared_dpll_id()
4a956a747f48 drm/i915:
== Series Details ==
Series: drm/i915/selftests: Fix return in assert_mmap_offset()
URL : https://patchwork.freedesktop.org/series/74081/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8032 -> Patchwork_16763
Summary
On Fri, Feb 28, 2020 at 12:46 PM Thomas Zimmermann wrote:
>
> Hi
>
> Am 28.02.20 um 09:40 schrieb Daniel Vetter:
> > On Fri, Feb 28, 2020 at 8:44 AM Thomas Zimmermann
> > wrote:
> >>
> >> Hi Daniel
> >>
> >> Am 27.02.20 um 19:15 schrieb Daniel Vetter:
> >>> There's only two functions called
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Expose engine properties via
sysfs
URL : https://patchwork.freedesktop.org/series/74080/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8032 -> Patchwork_16762
== Series Details ==
Series: Refactor Gen11+ SAGV support (rev6)
URL : https://patchwork.freedesktop.org/series/73856/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8018_full -> Patchwork_16732_full
Summary
---
From: Oliver Barta
A single Ri mismatch doesn't automatically mean that the link integrity
is broken. Update and check of Ri and Ri' are done asynchronously. In
case an update happens just between the read of Ri' and the check against
Ri there will be a mismatch even if the link integrity is
From: Oliver Barta
Including HDCP_STATUS_ENC bit in the checks is pointless.
It is simply not set at this point.
Signed-off-by: Oliver Barta
Fixes: ee5e5e7a5e0f ("drm/i915: Add HDCP framework + base implementation")
---
[v2] Rebased patch series from master to drm-intel-next-queued branch.
From: Oliver Barta
The check was always succeeding even in case of a mismatch due to the
HDCP_STATUS_ENC bit being set. Make sure both bits are actually set.
Signed-off-by: Oliver Barta
Fixes: 2320175feb74 ("drm/i915: Implement HDCP for HDMI")
---
[v2] Rebased patch series from master to
On Fri, Feb 28, 2020 at 3:43 AM Michel Dänzer wrote:
>
> On 2020-02-28 10:28 a.m., Erik Faye-Lund wrote:
> >
> > We could also do stuff like reducing the amount of tests we run on each
> > commit, and punt some testing to a per-weekend test-run or someting
> > like that. We don't *need* to know
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Expose engine properties via
sysfs
URL : https://patchwork.freedesktop.org/series/74080/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/gt: Expose engine properties via
== Series Details ==
Series: series starting with [1/7] drm/i915/gt: Expose engine properties via
sysfs
URL : https://patchwork.freedesktop.org/series/74080/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d3b9bcf44547 drm/i915/gt: Expose engine properties via sysfs
-:76:
Quoting Lionel Landwerlin (2020-02-28 16:02:29)
> On Gen11 powergating half the execution units is a functional
> requirement when using the VME samplers. Not fullfilling this
> requirement can lead to hangs.
>
> This unfortunately plays fairly poorly with the NOA requirements. NOA
> requires a
== Series Details ==
Series: series starting with [01/20] drm/i915: Skip barriers inside waits (rev4)
URL : https://patchwork.freedesktop.org/series/73999/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8018_full -> Patchwork_16731_full
On Fri, Feb 28, 2020 at 08:56:58AM +, Lisovskiy, Stanislav wrote:
> On Thu, 2020-02-27 at 18:12 +0200, Ville Syrjälä wrote:
> > On Tue, Feb 25, 2020 at 04:57:33PM +0200, Stanislav Lisovskiy wrote:
> > > The reasoning behind this is such that current dependencies
> > > in the code are rather
On Thu, Feb 27, 2020 at 10:26:00PM +, Chris Wilson wrote:
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > @@ -2947,6 +2947,13 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev,
> > void *data,
> >
On Tue, Jan 28, 2020 at 05:51:52PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Detect GLK pre-production steppings. Not 100% of A2 being pre-prod
> since the spec is a bit of a mess but feels more or less correct.
>
> Suggested-by: Chris Wilson
> Signed-off-by: Ville Syrjälä
On the
From: Ville Syrjälä
Supposedly both src coordinates have to even when doing 90/270
degree rotation with RGB565. This is definitely true for the
X coordinate (we just get a black screen when it is odd). My
experiments didn't show any misbehaviour with an odd
Y coordinate, but let's trust the spec
On Gen11 powergating half the execution units is a functional
requirement when using the VME samplers. Not fullfilling this
requirement can lead to hangs.
This unfortunately plays fairly poorly with the NOA requirements. NOA
requires a stable power configuration to maintain its configuration.
As
== Series Details ==
Series: drm/i915: Some upside-down panel handling fixes
URL : https://patchwork.freedesktop.org/series/74076/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8030 -> Patchwork_16761
Summary
---
On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
> On Fri, 28 Feb 2020 at 07:27, Daniel Vetter
> wrote:
> > Hi all,
> >
> > You might have read the short take in the X.org board meeting
> > minutes
> > already, here's the long version.
> >
> > The good news: gitlab.fd.o has become very
Chris Wilson writes:
> Give the reset worker a kick before losing help when waiting for hang
> recovery, as the CPU scheduler is a little unreliable.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 74 ++
>
On Fri, 2020-02-28 at 11:40 +0200, Lionel Landwerlin wrote:
> On 28/02/2020 11:28, Erik Faye-Lund wrote:
> > On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
> > > On Fri, 28 Feb 2020 at 07:27, Daniel Vetter <
> > > daniel.vet...@ffwll.ch>
> > > wrote:
> > > > Hi all,
> > > >
> > > > You
On Friday 2020-02-28 08:59, Daniel Stone wrote:
>
>I believe that in January, we had $2082 of network cost (almost
>entirely egress; ingress is basically free) and $1750 of
>cloud-storage cost (almost all of which was download). That's based
>on 16TB of cloud-storage (CI artifacts, container
On Thu, 27 Feb 2020 22:27:04 +0100 Daniel Vetter said:
Might I suggest that given the kind of expenses detailed here, literally buying
1 - 4 reasonably specced boxes and hosting them at OSUOSL would be incredibly
cheaper? (we (enlightenment.org) have been doing so for years on a single
box). We
On Fri, 2020-02-28 at 10:43 +, Daniel Stone wrote:
> On Fri, 28 Feb 2020 at 10:06, Erik Faye-Lund
> wrote:
> > On Fri, 2020-02-28 at 11:40 +0200, Lionel Landwerlin wrote:
> > > Yeah, changes on vulkan drivers or backend compilers should be
> > > fairly
> > > sandboxed.
> > >
> > > We also
On Fri, 2020-02-28 at 10:47 +0100, Daniel Vetter wrote:
> On Fri, Feb 28, 2020 at 10:29 AM Erik Faye-Lund
> wrote:
> > On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
> > > On Fri, 28 Feb 2020 at 07:27, Daniel Vetter <
> > > daniel.vet...@ffwll.ch>
> > > wrote:
> > > > Hi all,
> > > >
> >
All platforms using the shared DPLL framework use 3 reference clocks for
their DPLLs: SSC, non-SSC and DSI. For a more unified way across
platforms store the frequency of these ref clocks as part of the DPLL
global state. This also allows us to keep the HW access reading out the
ref clock value
== Series Details ==
Series: drm/i915: Some upside-down panel handling fixes
URL : https://patchwork.freedesktop.org/series/74076/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3da5c24d3382 drm/i915/dsi: Remove readback of panel orientation on BYT / CHT
-:10:
Quoting Mika Kuoppala (2020-02-28 15:09:28)
> Chris Wilson writes:
>
> > As we require a context switch to ensure that the current context is
> > switched out and saved to memory, perform an explicit switch to the
> > kernel context and wait for it.
>
> The patch subject is not incorrect. Just
Chris Wilson writes:
> As we require a context switch to ensure that the current context is
> switched out and saved to memory, perform an explicit switch to the
> kernel context and wait for it.
The patch subject is not incorrect. Just feels that the kernel
context is a patsy in here.
So I
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