Re: [Intel-gfx] [PATCH v5 0/5] Asynchronous flip implementation for i915

2020-08-03 Thread Kulkarni, Vandita
> -Original Message- > From: Michel Dänzer > Sent: Wednesday, July 29, 2020 1:04 PM > To: Kulkarni, Vandita ; Zanoni, Paulo R > ; Vetter, Daniel ; B S, > Karthik ; intel-gfx@lists.freedesktop.org > Cc: dri-de...@lists.freedesktop.org; Shankar, Uma > ; nicholas.kazlaus...@amd.com >

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization"

2020-08-03 Thread Patchwork
== Series Details == Series: Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization" URL : https://patchwork.freedesktop.org/series/80235/ State : success == Summary == CI Bug Log - changes from CI_DRM_8836 -> Patchwork_18305

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization"

2020-08-03 Thread Patchwork
== Series Details == Series: Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization" URL : https://patchwork.freedesktop.org/series/80235/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked

[Intel-gfx] [PATCH] Revert "drm/i915/rkl: Add Wa_14011224835 for PHY B initialization"

2020-08-03 Thread Matt Roper
The hardware team has dropped this workaround from the bspec; it is no longer needed. This reverts commit 111822b21be995a3a4a731066db3d820523c57f7. Bspec: 49291 Cc: José Roberto de Souza Signed-off-by: Matt Roper --- .../gpu/drm/i915/display/intel_combo_phy.c| 50 ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/kmb: Add support for KeemBay Display (rev3)

2020-08-03 Thread Patchwork
== Series Details == Series: drm/kmb: Add support for KeemBay Display (rev3) URL : https://patchwork.freedesktop.org/series/79615/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8836_full -> Patchwork_18304_full Summary

Re: [Intel-gfx] [PATCH v5 15/22] drm/i915/dg1: Update voltage swing tables for DP

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Matt Roper < > matthew.d.ro...@intel.com > > > > DG1's vswing tables are the same for eDP and HDMI but have slight > differences from ICL/TGL for DP. Reviewed-by: José Roberto de Souza > > Bspec: 49291 > Cc: Clinton Taylor < >

Re: [Intel-gfx] [PATCH v5 21/22] drm/i915/dg1: DG1 does not support DC6

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Anshuman Gupta < > anshuman.gu...@intel.com > > > > DC6 is not supported on DG1, so change the allowed DC mask for DG1. > > Cc: Uma Shankar < > uma.shan...@intel.com > > > Signed-off-by: Anshuman Gupta < > anshuman.gu...@intel.com

Re: [Intel-gfx] [PATCH v5 22/22] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Anshuman Gupta < > anshuman.gu...@intel.com > > > > DGFX devices have different DMC_DEBUG* counter MMIO address > offset. Incorporate these changes in i915_reg.h for DG1 DC5/DC6 > counter and handle i915_dmc_info accordingly. > >

Re: [Intel-gfx] [PATCH v5 19/22] drm/i915/dg1: Load DMC

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Matt Atwood < > matthew.s.atw...@intel.com > > > > Add support to load DMC v2.0.2 on DG1 > > While we're at it, tweak the TGL and RKL firmware size definition to > follow the convention used in previous platforms. Remove obsolete

Re: [Intel-gfx] [PATCH v5 05/22] drm/i915/dg1: Wait for pcode/uncore handshake at startup

2020-08-03 Thread Souza, Jose
On Fri, 2020-07-24 at 14:39 -0700, Lucas De Marchi wrote: > From: Matt Roper < > matthew.d.ro...@intel.com > > > > DG1 does some additional pcode/uncore handshaking at > boot time; this handshaking must complete before various other pcode > commands are effective and before general work is

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/kmb: Add support for KeemBay Display (rev3)

2020-08-03 Thread Patchwork
== Series Details == Series: drm/kmb: Add support for KeemBay Display (rev3) URL : https://patchwork.freedesktop.org/series/79615/ State : success == Summary == CI Bug Log - changes from CI_DRM_8836 -> Patchwork_18304 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/kmb: Add support for KeemBay Display (rev3)

2020-08-03 Thread Patchwork
== Series Details == Series: drm/kmb: Add support for KeemBay Display (rev3) URL : https://patchwork.freedesktop.org/series/79615/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5e28d2e25e4 drm/kmb: Add support for KeemBay Display -:57: WARNING:FILE_PATH_CHANGES: added, moved

[Intel-gfx] [PATCH v5] Add support for KeemBay DRM driver

2020-08-03 Thread Anitha Chrisanthus
This is a new DRM driver for Intel's KeemBay SOC. The SoC couples an ARM Cortex A53 CPU with an Intel Movidius VPU. This driver is tested with the KMB EVM board which is the refernce baord for Keem Bay SOC. The SOC's display pipeline is as follows +--++-+

Re: [Intel-gfx] [RFC 34/60] drm/i915: introduce kernel blitter_context

2020-08-03 Thread Lucas De Marchi
+Chris Wilson On Mon, Aug 3, 2020 at 12:59 PM Lucas De Marchi wrote: > > On Fri, Jul 10, 2020 at 5:00 AM Matthew Auld wrote: > > > > We may be without a context to perform various internal blitter > > operations, for example when performing object migration. Piggybacking > > off the

Re: [Intel-gfx] [RFC 34/60] drm/i915: introduce kernel blitter_context

2020-08-03 Thread Lucas De Marchi
On Fri, Jul 10, 2020 at 5:00 AM Matthew Auld wrote: > > We may be without a context to perform various internal blitter > operations, for example when performing object migration. Piggybacking > off the kernel_context is probably a bad idea, since it has other uses. > > Signed-off-by: Matthew

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Souza, Jose
On Mon, 2020-08-03 at 16:38 +, Patchwork wrote: > Patch Details > Series: drm/i915: Fix wrong return value in intel_atomic_check() > URL: https://patchwork.freedesktop.org/series/80208/ > State:failure > Details: >

Re: [Intel-gfx] [PATCH] drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Souza, Jose
On Sun, 2020-08-02 at 19:15 +0800, Tianjia Zhang wrote: > In the case of calling check_digital_port_conflicts() failed, a > negative error code -EINVAL should be returned. Reviewed-by: José Roberto de Souza > > Fixes: bf5da83e4bd80 ("drm/i915: Move check_digital_port_conflicts() earier") > Cc:

Re: [Intel-gfx] [PATCH] drm/i915: add syncobj timeline support

2020-08-03 Thread Lionel Landwerlin
On 03/08/2020 17:23, Chris Wilson wrote: -enum drm_i915_gem_execbuffer_ext { - /** -* See drm_i915_gem_execbuf_ext_timeline_fences. -*/ - DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES = 1, - - DRM_I915_GEM_EXECBUFFER_EXT_MAX /* non-ABI */ -}; +/** + * See

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Wa_1607138340 URL : https://patchwork.freedesktop.org/series/80210/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8834_full -> Patchwork_18301_full Summary --- **FAILURE**

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong return value in intel_atomic_check() URL : https://patchwork.freedesktop.org/series/80208/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8834_full -> Patchwork_18299_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80219/ State : success == Summary == CI Bug Log - changes from CI_DRM_8834 -> Patchwork_18303

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80219/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80219/ State : warning == Summary == $ dim checkpatch origin/drm-tip 378bbbd633f5 drm/i915/gem: Reduce context

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: timeline semaphore support (rev2)

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: timeline semaphore support (rev2) URL : https://patchwork.freedesktop.org/series/80214/ State : failure == Summary == Applying: drm/i915: introduce a mechanism to extend execbuf2 Applying: drm/i915: add syncobj timeline support Using index info to

[Intel-gfx] [PATCH 5/7] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock

2020-08-03 Thread Chris Wilson
Make b->signaled_requests a lockless-list so that we can manipulate it outside of the b->irq_lock. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 28 +++ .../gpu/drm/i915/gt/intel_breadcrumbs_types.h | 2 +- drivers/gpu/drm/i915/i915_request.h

[Intel-gfx] [PATCH 6/7] drm/i915/gt: Don't cancel the interrupt shadow too early

2020-08-03 Thread Chris Wilson
We currently want to keep the interrupt enabled until the interrupt after which we have no more work to do. This heuristic was broken by us kicking the irq-work on adding a completed request without attaching a signaler -- hence it appearing to the irq-worker that an interrupt had fired when we

[Intel-gfx] [PATCH 3/7] drm/i915/gt: Free stale request on destroying the virtual engine

2020-08-03 Thread Chris Wilson
Since preempt-to-busy, we may unsubmit a request while it is still on the HW and completes asynchronously. That means it may be retired and in the process destroy the virtual engine (as the user has closed their context), but that engine may still be holding onto the unsubmitted compelted request.

[Intel-gfx] [PATCH 2/7] drm/i915/gt: Protect context lifetime with RCU

2020-08-03 Thread Chris Wilson
Allow a brief period for continued access to a dead intel_context by deferring the release of the struct until after an RCU grace period. As we are using a dedicated slab cache for the contexts, we can defer the release of the slab pages via RCU, with the caveat that individual structs may be

[Intel-gfx] [PATCH 7/7] drm/i915/gt: Split the breadcrumb spinlock between global and contexts

2020-08-03 Thread Chris Wilson
As we funnel more and more contexts into the breadcrumbs on an engine, the hold time of b->irq_lock grows. As we may then contend with the b->irq_lock during request submission, this increases the burden upon the engine->active.lock and so directly impacts both our execution latency and client

[Intel-gfx] [PATCH 4/7] drm/i915/gt: Defer enabling the breadcrumb interrupt to after submission

2020-08-03 Thread Chris Wilson
Move the register slow register write and readback from out of the critical path for execlists submission and delay it until the following worker, shaving off around 200us. Note that the same signal_irq_work() is allowed to run concurrently on each CPU (but it will only be queued once, once

[Intel-gfx] [PATCH 1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Chris Wilson
As we now protect the timeline list using RCU, we can drop the timeline->mutex for guarding the list iteration during context close, as we are searching for an inflight request. Any new request will see the context is banned and not be submitted. In doing so, pull the checks for a concurrent

[Intel-gfx] [PATCH] drm/i915: add syncobj timeline support

2020-08-03 Thread Chris Wilson
This is the bunch of trivial changes that I had wanted. - stop arbitrarily limiting the uABI to a single extension block - handle timeline syncobj as an extension of binary syncobj - num_fences to appease Tvrtko who objects to me calling things nobject - the only way not to have ABI values is

Re: [Intel-gfx] [PATCH 3/3] drm/i915: peel dma-fence-chains wait fences

2020-08-03 Thread Lionel Landwerlin
On 03/08/2020 17:08, Chris Wilson wrote: Quoting Lionel Landwerlin (2020-08-03 15:01:47) To allow faster engine to engine synchronization, peel the layer of dma-fence-chain to expose potential i915 fences so that the i915-request code can emit HW semaphore wait/signal operations in the ring

Re: [Intel-gfx] [PATCH 3/3] drm/i915: peel dma-fence-chains wait fences

2020-08-03 Thread Chris Wilson
Quoting Lionel Landwerlin (2020-08-03 15:01:47) > To allow faster engine to engine synchronization, peel the layer of > dma-fence-chain to expose potential i915 fences so that the > i915-request code can emit HW semaphore wait/signal operations in the > ring which is faster than waking up the host

[Intel-gfx] [PATCH 1/3] drm/i915: introduce a mechanism to extend execbuf2

2020-08-03 Thread Lionel Landwerlin
We're planning to use this for a couple of new feature where we need to provide additional parameters to execbuf. v2: Check for invalid flags in execbuffer2 (Lionel) v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris) v4: Rebase Move array fence parsing in i915_gem_do_execbuffer()

[Intel-gfx] [PATCH 3/3] drm/i915: peel dma-fence-chains wait fences

2020-08-03 Thread Lionel Landwerlin
To allow faster engine to engine synchronization, peel the layer of dma-fence-chain to expose potential i915 fences so that the i915-request code can emit HW semaphore wait/signal operations in the ring which is faster than waking up the host to submit unblocked workloads after interrupt

[Intel-gfx] [PATCH 0/3] drm/i915: timeline semaphore support

2020-08-03 Thread Lionel Landwerlin
Hi all, Hopefully last CI run with the IGT tests :) Test-with: 20200803135851.316355-1-lionel.g.landwer...@intel.com Cheers, Lionel Landwerlin (3): drm/i915: introduce a mechanism to extend execbuf2 drm/i915: add syncobj timeline support drm/i915: peel dma-fence-chains wait fences

[Intel-gfx] [PATCH 2/3] drm/i915: add syncobj timeline support

2020-08-03 Thread Lionel Landwerlin
Introduces a new parameters to execbuf so that we can specify syncobj handles as well as timeline points. v2: Reuse i915_user_extension_fn v3: Check that the chained extension is only present once (Chris) v4: Check that dma_fence_chain_find_seqno returns a non NULL fence (Lionel) v5: Use

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_schedule: Try to spot unfairness

2020-08-03 Thread Chris Wilson
An important property for multi-client systems is that each client gets a 'fair' allotment of system time. (Where fairness is at the whim of the context properties, such as priorities.) This test forks N independent clients (albeit they happen to share a single vm), and does an equal amount of

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Wa_1607138340 URL : https://patchwork.freedesktop.org/series/80210/ State : success == Summary == CI Bug Log - changes from CI_DRM_8834 -> Patchwork_18301 Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Wa_1607138340 URL : https://patchwork.freedesktop.org/series/80210/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Wa_1607138340 URL : https://patchwork.freedesktop.org/series/80210/ State : warning == Summary == $ dim checkpatch origin/drm-tip cfeda9f90aed drm/i915/tgl: Wa_1607138340 -:8: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong return value in intel_atomic_check() URL : https://patchwork.freedesktop.org/series/80208/ State : success == Summary == CI Bug Log - changes from CI_DRM_8834 -> Patchwork_18299 Summary

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Chris Wilson
Quoting Chris Wilson (2020-08-03 14:20:17) > From: Mika Kuoppala > > Avoid possible cs hang with semaphores by disabling lite restore. > > References: 921f0c47f228 ("drm/i915: Revert "drm/i915/tgl: Wa_1607138340"") > Signed-off-by: Mika Kuoppala > Cc: Tvrtko Ursulin > Cc: Tony Ye > Cc: Chris

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Fix wrong return value (rev2)

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong return value (rev2) URL : https://patchwork.freedesktop.org/series/80175/ State : failure == Summary == Applying: drm/i915: Fix wrong return value Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/i915_active.c M

[Intel-gfx] [PATCH] drm/i915/tgl: Wa_1607138340

2020-08-03 Thread Chris Wilson
From: Mika Kuoppala Avoid possible cs hang with semaphores by disabling lite restore. References: 921f0c47f228 ("drm/i915: Revert "drm/i915/tgl: Wa_1607138340"") Signed-off-by: Mika Kuoppala Cc: Tvrtko Ursulin Cc: Tony Ye Cc: Chris Wilson --- Let's give this another spin. The hangs are

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: Fix wrong return value in intel_atomic_check() URL : https://patchwork.freedesktop.org/series/80208/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH] drm/i915: Fix wrong return value in intel_atomic_check()

2020-08-03 Thread Tianjia Zhang
In the case of calling check_digital_port_conflicts() failed, a negative error code -EINVAL should be returned. Fixes: bf5da83e4bd80 ("drm/i915: Move check_digital_port_conflicts() earier") Cc: Ville Syrjälä Signed-off-by: Tianjia Zhang --- drivers/gpu/drm/i915/display/intel_display.c | 2 +-

[Intel-gfx] [RFC PATCH 00/17] Drop uses of pci_read_config_*() return value

2020-08-03 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error. However, the value read by these functions is more likely to indicate this kind of error. This presents two overlapping ways of reporting errors and complicates error checking. It is possible to move to one single way of

Re: [Intel-gfx] [RFC PATCH 00/17] Drop uses of pci_read_config_*() return value

2020-08-03 Thread Christoph Hellwig
On Sun, Aug 02, 2020 at 02:14:06PM -0500, Bjorn Helgaas wrote: > But what guarantees that a PCI config register cannot contain ~0? > If there's something about that in the spec I'd love to know where it > is because it would simplify a lot of things. There isn't. An we even have cases like the

[Intel-gfx] [PATCH] drm/i915: Fix wrong return value

2020-08-03 Thread Tianjia Zhang
In function i915_active_acquire_preallocate_barrier(), not all paths have the return value set correctly, and in case of memory allocation failure, a negative error code should be returned. Cc: Chris Wilson Signed-off-by: Tianjia Zhang --- drivers/gpu/drm/i915/i915_active.c| 4 ++--

[Intel-gfx] [RFC PATCH 09/17] drm/i915/vga: Drop uses of pci_read_config_*() return value

2020-08-03 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error. However, the value read by these functions is more likely to indicate this kind of error. This presents two overlapping ways of reporting errors and complicates error checking. It is possible to move to one single way of

Re: [Intel-gfx] [RFC PATCH 00/17] Drop uses of pci_read_config_*() return value

2020-08-03 Thread Saheed Bolarinwa
On 8/1/20 2:56 PM, Borislav Petkov wrote: On Sat, Aug 01, 2020 at 01:24:29PM +0200, Saheed O. Bolarinwa wrote: The return value of pci_read_config_*() may not indicate a device error. However, the value read by these functions is more likely to indicate this kind of error. This presents two

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: timeline semaphore support

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: timeline semaphore support URL : https://patchwork.freedesktop.org/series/80201/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8834_full -> Patchwork_18297_full Summary ---

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80203/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8834 -> Patchwork_18298

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80203/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU URL : https://patchwork.freedesktop.org/series/80203/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4421ede59e7d drm/i915/gem: Reduce context

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: timeline semaphore support

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: timeline semaphore support URL : https://patchwork.freedesktop.org/series/80201/ State : success == Summary == CI Bug Log - changes from CI_DRM_8834 -> Patchwork_18297 Summary --- **SUCCESS**

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_parallel: Add basic userptr thrashing

2020-08-03 Thread Chris Wilson
Mix in a modicum of generic userptr thrashing for a quick (1s) BAT pass, as we have currently no coverage of userptr at all in BAT. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_parallel.c | 31 +-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: timeline semaphore support

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: timeline semaphore support URL : https://patchwork.freedesktop.org/series/80201/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.0 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: timeline semaphore support

2020-08-03 Thread Patchwork
== Series Details == Series: drm/i915: timeline semaphore support URL : https://patchwork.freedesktop.org/series/80201/ State : warning == Summary == $ dim checkpatch origin/drm-tip d38db3114f74 drm/i915: introduce a mechanism to extend execbuf2 -:377: CHECK:SPACING: spaces preferred around

[Intel-gfx] [PATCH 2/7] drm/i915/gt: Protect context lifetime with RCU

2020-08-03 Thread Chris Wilson
Allow a brief period for continued access to a dead intel_context by deferring the release of the struct until after an RCU grace period. As we are using a dedicated slab cache for the contexts, we can defer the release of the slab pages via RCU, with the caveat that individual structs may be

[Intel-gfx] [PATCH 1/7] drm/i915/gem: Reduce context termination list iteration guard to RCU

2020-08-03 Thread Chris Wilson
As we now protect the timeline list using RCU, we can drop the timeline->mutex for guarding the list iteration during context close, as we are searching for an inflight request. Any new request will see the context is banned and not be submitted. In doing so, pull the checks for a concurrent

[Intel-gfx] [PATCH 3/7] drm/i915/gt: Free stale request on destroying the virtual engine

2020-08-03 Thread Chris Wilson
Since preempt-to-busy, we may unsubmit a request while it is still on the HW and completes asynchronously. That means it may be retired and in the process destroy the virtual engine (as the user has closed their context), but that engine may still be holding onto the unsubmitted compelted request.

[Intel-gfx] [PATCH 4/7] drm/i915/gt: Defer enabling the breadcrumb interrupt to after submission

2020-08-03 Thread Chris Wilson
Move the register slow register write and readback from out of the critical path for execlists submission and delay it until the following worker. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 48 ++--- 1 file changed, 41 insertions(+), 7

[Intel-gfx] [PATCH 5/7] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock

2020-08-03 Thread Chris Wilson
Make b->signaled_requests a lockless-list so that we can manipulate it outside of the b->irq_lock. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 28 +++ .../gpu/drm/i915/gt/intel_breadcrumbs_types.h | 2 +- drivers/gpu/drm/i915/i915_request.h

[Intel-gfx] [PATCH 7/7] drm/i915/gt: Split the breadcrumb spinlock between global and contexts

2020-08-03 Thread Chris Wilson
As we funnel more and more contexts into the breadcrumbs on an engine, the hold time of b->irq_lock grows. As we may then contend with the b->irq_lock during request submission, this increases the burden upon the engine->active.lock and so directly impacts both our execution latency and client

[Intel-gfx] [PATCH 6/7] drm/i915/gt: Don't cancel the interrupt shadow too early

2020-08-03 Thread Chris Wilson
We currently want to keep the interrupt enabled until the interrupt after which we have no more work to do. This heuristic was broken by us kicking the irq-work on adding a completed request without attaching a signaler -- hence it appearing to the irq-worker that an interrupt had fired when we

[Intel-gfx] [PATCH i-g-t] i915/gem_exec_parallel: Add basic userptr thrashing

2020-08-03 Thread Chris Wilson
Mix in a modicum of generic userptr thrashing for a quick (1s) BAT pass, as we have currently no coverage of userptr at all in BAT. Signed-off-by: Chris Wilson --- tests/i915/gem_exec_parallel.c| 31 +-- tests/intel-ci/fast-feedback.testlist | 5 - 2 files

[Intel-gfx] [PATCH 3/3] drm/i915: peel dma-fence-chains wait fences

2020-08-03 Thread Lionel Landwerlin
To allow faster engine to engine synchronization, peel the layer of dma-fence-chain to expose potential i915 fences so that the i915-request code can emit HW semaphore wait/signal operations in the ring which is faster than waking up the host to submit unblocked workloads after interrupt

[Intel-gfx] [PATCH 0/3] drm/i915: timeline semaphore support

2020-08-03 Thread Lionel Landwerlin
Hi all, Hopefully this last run is all clean. No changes in this series, just a rebase on top of Danvet's s/DRM_ERROR/DRM_DEBUG/. Test-with: 20200803090053.260115-1-lionel.g.landwer...@intel.com Cheers, Lionel Landwerlin (3): drm/i915: introduce a mechanism to extend execbuf2 drm/i915: add

[Intel-gfx] [PATCH 2/3] drm/i915: add syncobj timeline support

2020-08-03 Thread Lionel Landwerlin
Introduces a new parameters to execbuf so that we can specify syncobj handles as well as timeline points. v2: Reuse i915_user_extension_fn v3: Check that the chained extension is only present once (Chris) v4: Check that dma_fence_chain_find_seqno returns a non NULL fence (Lionel) v5: Use

[Intel-gfx] [PATCH 1/3] drm/i915: introduce a mechanism to extend execbuf2

2020-08-03 Thread Lionel Landwerlin
We're planning to use this for a couple of new feature where we need to provide additional parameters to execbuf. v2: Check for invalid flags in execbuffer2 (Lionel) v3: Rename I915_EXEC_EXT -> I915_EXEC_USE_EXTENSIONS (Chris) v4: Rebase Move array fence parsing in i915_gem_do_execbuffer()

Re: [Intel-gfx] [PATCH v5 06/16] pwm: lpss: Use pwm_lpss_apply() when restoring state on resume

2020-08-03 Thread Andy Shevchenko
On Sun, Aug 02, 2020 at 10:51:34PM +0200, Hans de Goede wrote: > On 7/29/20 10:12 AM, Andy Shevchenko wrote: ... > Ok, I've added the suggested/discussed helper in my personal tree. Is it ok > if I add your Reviewed-by with that change in place. Yes, go ahead! > This is the last unreviewed >

Re: [Intel-gfx] [CI] drm/i915: Filter wake_flags passed to default_wake_function

2020-08-03 Thread Dave Airlie
On Wed, 29 Jul 2020 at 01:21, Chris Wilson wrote: > > The flags passed to the wait_entry.func are passed onwards to > try_to_wake_up(), which has a very particular interpretation for its > wake_flags. In particular, beyond the published WF_SYNC, it has a few > internal flags as well. Since we

[Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce drm scaling filter property (rev7)

2020-08-03 Thread Patchwork
== Series Details == Series: Introduce drm scaling filter property (rev7) URL : https://patchwork.freedesktop.org/series/73883/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8832_full -> Patchwork_18296_full Summary