Same as other tests, use pin_map_unlocked.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
b/drivers/gpu/drm/i915
We get a lockdep splat when the reset mutex is held, because it can be
taken from fence_wait. This conflicts with the mmu notifier we have,
because we recurse between reset mutex and mmap lock -> mmu notifier.
Remove this recursion by calling revoke_mmaps before taking the lock.
The reset code st
Take the ww lock around engine_unpark. Because of the
many many places where rpm is used, I chose the safest option
and used a trylock to opportunistically take this lock for
__engine_unpark.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_engine
Make creation separate from pinning, in order to take the lock only
once, and pin the mapping with the lock held.
Changes since v1:
- Rebase on top of upstream changes.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 44 +
pin_map needs the ww lock, so ensure we pin both before submission.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_object.h| 3 +
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++
.../gpu/drm/i915/gt/selftest_workarounds.c| 76
Pin in the caller, not in the work itself. This should also
work better for dma-fence annotations.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/d
Use pin_map_unlocked when we're not holding locks.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c
b/drivers/gpu/drm/i915/gt/se
We need to get rid of allocations in the cmd parser, because it needs
to be called from a signaling context, first move all pinning to
execbuf, where we already hold all locks.
Allocate jump_whitelist in the execbuffer, and add annotations around
intel_engine_cmd_parser(), to ensure we only call t
Instead of sharing pages with breadcrumbs, give each timeline a
single page. This allows unrelated timelines not to share locks
any more during command submission.
As an additional benefit, seqno wraparound no longer requires
i915_vma_pin, which means we no longer need to worry about a
potential -
Convert normal functions to unlocked versions where needed.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gt/selftest_execlists.c | 18 +-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 16
2 files changed, 17 insertions
Use the unlocked variants for pin_map and pin_pages, and add lock
around unpinning/putting pages.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
.../drm/i915/selftests/intel_memory_region.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --g
Instead of doing what we do currently, which will never work with
PROVE_LOCKING, do the same as AMD does, and something similar to
relocation slowpath. When all locks are dropped, we acquire the
pages for pinning. When the locks are taken, we transfer those
pages in .get_pages() to the bo. As a fin
i915_gem_object_pin_map potentially needs a ww context, so ensure we
have one we can revoke.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/
Rebased on top of latest drm-tip.
The userptr changes have been tested against beignet's selftests, and
intel-compute-runtime with piglit. I added a few ERRs to check if the
changed paths were hit, but didn't get any returned, and no new test
failures, so no regressions.
The userptr abi changes h
i915_vma_pin may fail with -EDEADLK when we start locking page tables,
so ensure we handle this correctly.
Changes since v1:
- Drop -EDEADLK todo, this commit handles it.
- Change eb_pin_vma from sort-of-bool + -EDEADLK to a proper int. (Matt)
Cc: Matthew Brost
Signed-off-by: Maarten Lankhorst
Simple adding of i915_gem_object_lock, we may start to pass ww to
get_pages() in the future, but that won't be the case here;
We override shmem's get_pages() handling by calling
i915_gem_object_get_pages_phys(), no ww is needed.
Changes since v1:
- Call shmem put pages directly, the callback would
Doesn't need the full ww lock, only checking if pages are bound.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström #irc
---
drivers/gpu/drm/i915/i915_gem.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i
We want to remove the changing of ops structure for attaching
phys pages, so we need to kill off HAS_STRUCT_PAGE from ops->flags,
and put it in the bo.
This will remove a potential race of dereferencing the wrong obj->ops
without ww mutex held.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thoma
As soon as we install fences, we should stop allocating memory
in order to prevent any potential deadlocks.
This is required later on, when we start adding support for
dma-fence annotations.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Thomas Hellström
---
.../gpu/drm/i915/gem/i915_gem_execbu
We should not allow this any more, as it will break with the new userptr
implementation, it could still be made to work, but there's no point in
doing so.
Inspection of the beignet opencl driver shows that it's only used
when normal userptr is not available, which means for new kernels
you will ne
Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
> On 25/01/2021 14:01, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_priolist_types.h
> > b/drivers/gpu/drm/i915/i915_priolist_types.h
> > index bc2fa84f98a8..1200c3df6a4a 100644
> > --- a/drivers/gpu/drm/i915/i915_priolist_types.h
> >
From: Ville Syrjälä
We shouldn't really trust tc_mode on non-TC PHYs since we never
initialize it explicitly. So let's check for the PHY type first.
Fortunately TC_PORT_TBT_ALT happens to be zero so I don't think
there's an actual bug here, just a possibility for a future one
if someone rearrange
From: Ville Syrjälä
The documented programming sequence indicates the correct point
for the vswing programming is just before we enable the DDI.
Make it so.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 30
1 file changed, 15 insertions(+)
From: Ville Syrjälä
Currently we only explicitly power up the combo PHY lanes
for DP. The spec says we should do it for HDMI as well.
Cc: sta...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drive
From: Ville Syrjälä
Reduce the copypasta by pulling the combo PHY lane
power up stuff into a helper. We'll have a third user soon.
Cc: sta...@vger.kernel.org
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 35 +---
1 file changed, 19 insertions(+
From: Ville Syrjälä
In thunderbolt mode the PHY is owned by the thunderbolt controller.
We are not supposed to touch it. So skip the vswing programming
as well (we already skipped the other steps not applicable to TBT).
Touching this stuff could supposedly interfere with the PHY
programming done
On 25/01/2021 14:01, Chris Wilson wrote:
Replace the priolist rbtree with a skiplist. The crucial difference is
that walking and removing the first element of a skiplist is O(1), but
O(lgN) for an rbtree, as we need to rebalance on remove. This is a
hindrance for submission latency as it occurs
== Series Details ==
Series: drm: Move struct drm_device.pdev to legacy (rev6)
URL : https://patchwork.freedesktop.org/series/84205/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9693 -> Patchwork_19528
Summary
---
*
== Series Details ==
Series: series starting with [v5,1/8] drm/i915: make local-memory probing a GT
operation (rev2)
URL : https://patchwork.freedesktop.org/series/86355/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9693 -> Patchwork_19527
===
== Series Details ==
Series: series starting with [v5,1/8] drm/i915: make local-memory probing a GT
operation (rev2)
URL : https://patchwork.freedesktop.org/series/86355/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't
On Mon, Jan 25, 2021 at 07:36:36PM +0200, Imre Deak wrote:
> Atm the driver will calculate a wrong MST timeslots/MTP (aka time unit)
> value for MST streams if the link parameters (link rate or lane count)
> are limited in a way independent of the sink capabilities (reported by
> DPCD).
>
> One ex
== Series Details ==
Series: series starting with [v5,1/8] drm/i915: make local-memory probing a GT
operation (rev2)
URL : https://patchwork.freedesktop.org/series/86355/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
9bdaab539cc2 drm/i915: make local-memory probing a GT operat
Hi Dave & Daniel -
Apparently there's a regression in -rc5 that affects a large portion of
the platforms in CI. See [1].
The issue showed up in -rc5 i.e. *before* the changes in this pull,
however the issue prevents getting full coverage [2]. It does not look
like this pull makes matters worse,
Using struct drm_device.pdev is deprecated. Don't assign it. Users
should upcast from struct drm_device.dev.
v6:
* also fix the assignment in selftests in this patch (Chris)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Chris Wilson
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Struct drm_device.pdev is being moved to legacy status as only legacy
DRM drivers use it. A possible follow-up patchset could remove pdev
entirely.
v4:
* rebased
Signed-off-by: Thomas Zimmermann
Reviewed-by: Chris Wilson
Acked-by: Sam Ravnborg
---
include/drm/drm_device.h | 6 +++---
Using struct drm_device.pdev is deprecated. Convert i915 to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Chris Wilson
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
---
drivers/gpu/drm/i915/gvt/cfg_space.c | 5 +++--
drivers/gpu/drm/i915/
Using struct drm_device.pdev is deprecated. Convert i915 to struct
drm_device.dev. No functional changes.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Chris Wilson
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i91
V6 of the patchset fixes i915/selftests to do the assigment of pdev
in a later patch. This was forgotten in v5.
The pdev field in struct drm_device points to a PCI device structure and
goes back to UMS-only days when all DRM drivers were for PCI devices.
Meanwhile we also support USB, SPI and plat
Using struct drm_device.pdev is deprecated. Convert i915 to struct
drm_device.dev. No functional changes.
v6:
* also remove assignment in selftests/ in a later patch (Chris)
v5:
* remove assignment in later patch (Chris)
v3:
* rebased
v2:
* move gt/ and gvt/ changes
A number of our CI systems are hitting redzone overwritten errors after
s2idle, with the errors introduced between v5.11-rc4 and v5.11-rc5. See
snippet below, full logs for one affected machine at [1].
Known issue?
BR,
Jani.
[1]
https://intel-gfx-ci.01.org/tree/drm-intel-fixes/CI_DIF_549/fi-
Quoting Tvrtko Ursulin (2021-01-28 11:35:59)
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > The first "scheduler" was a topographical sorting of requests into
> > priority order. The execution order was deterministic, the earliest
> > submitted, highest priority request would be executed first.
On 25/01/2021 14:01, Chris Wilson wrote:
The first "scheduler" was a topographical sorting of requests into
priority order. The execution order was deterministic, the earliest
submitted, highest priority request would be executed first. Priority
inheritance ensured that inversions were kept at
Quoting Tvrtko Ursulin (2021-01-27 15:58:12)
> Okay makes sense. The change in key drives the requirement so just
> please mention in the commit message and I'll tackle the skip list
> mechanics in the meantime.
In the following patches, we introduce a new sort key to the scheduler,
a virtual de
On 1/11/2021 10:07 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Limit pre-skl plane stride to below 4k or 8k pixels (depending on
the platform). We do this in order guarantee that TILEOFF/OFFSET.x
does not get too big.
Currently this is not a problem as we align SURF to 4k, and so
TILEOFF/OFFS
On 27/01/2021 09:06, Chris Wilson wrote:
In gen8_emit_flush_xcs, we have to look at all the engines the request
may execute on, and emit an aux-invalidate for each. Currently, we
handle the virtual engine by looking at its engine mask, but that is
copied and refined as the request->execution_ma
== Series Details ==
Series: disable the QSES check for HDCP2.2 over MST
URL : https://patchwork.freedesktop.org/series/86375/
State : failure
== Summary ==
Applying: drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST
Using index info to reconstruct a base tree...
M drivers/gpu/d
== Series Details ==
Series: Final set of patches for ADLS enabling (rev2)
URL : https://patchwork.freedesktop.org/series/86322/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9690_full -> Patchwork_19525_full
Summary
--
101 - 147 of 147 matches
Mail list logo
