On Mon, Sep 27, 2021 at 09:29:07PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 27, 2021 at 11:23:35AM -0700, Matt Roper wrote:
> > On Thu, Sep 23, 2021 at 06:49:59PM +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 23, 2021 at 11:48:58AM +0300, Stanislav Lisovskiy wrote:
> > > > TileF(Tile4 in bspec)
The formulae has been updated to include more variables. Make
sure the code carries the same.
Bspec: 64631
Cc: Ville Syrjälä
Suggested-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bw.c | 62 -
1 file changed, 50
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
URL : https://patchwork.freedesktop.org/series/95127/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21172_full
== Series Details ==
Series: drm/i915: Reject bogus modes with fixed mode panels (rev3)
URL : https://patchwork.freedesktop.org/series/95003/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21171_full
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work
URL : https://patchwork.freedesktop.org/series/95122/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21170_full
Summary
On Tue, 2021-09-28 at 03:45 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 03:14:45AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
On Tue, Sep 28, 2021 at 03:14:45AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza,
On Tue, 2021-09-28 at 02:51 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
On Tue, Sep 28, 2021 at 02:33:27AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza,
== Series Details ==
Series: drm/dp: Add Additional DP2 Headers (rev2)
URL : https://patchwork.freedesktop.org/series/95104/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21169_full
Summary
---
On Tue, 2021-09-28 at 01:28 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
== Series Details ==
Series: drm/i915/ttm: Rework object initialization slightly
URL : https://patchwork.freedesktop.org/series/95107/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21168_full
On Tue, Sep 28, 2021 at 01:21:21AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> > On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > > A follow-up change will select the TC-cold blocking
On Tue, 2021-09-28 at 01:13 +0300, Imre Deak wrote:
> On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> > On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > > A follow-up change will select the TC-cold blocking power domain based
> > > on the TypeC mode, prepare for that here.
>
On Tue, Sep 28, 2021 at 12:56:24AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > A follow-up change will select the TC-cold blocking power domain based
> > on the TypeC mode, prepare for that here.
> >
> > Also bring intel_tc_cold_requires_aux_pw() earlier to
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> While a TypeC port mode is locked a DISPLAY_CORE power domain reference
> is held, which implies a runtime PM ref. By removing the ICL !legacy
> port special casing, a TC_COLD_OFF power domain reference will be taken
> for such ports, which
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> A follow-up change will select the TC-cold blocking power domain based
> on the TypeC mode, prepare for that here.
>
> Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place
> for readability.
>
> No functional change.
>
>
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
URL : https://patchwork.freedesktop.org/series/95127/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21172
On Tue, Sep 28, 2021 at 12:16:45AM +0300, Souza, Jose wrote:
> On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> > A follow-up change will start to disconnect/re-connect PHYs around AUX
> > transfers and modeset enable/disables. To prepare for that add a new
> > TypeC PHY disconnected mode, to
Include FEC, DSC, Link Training related headers.
Signed-off-by: Fangzhi Zuo
---
This patch is based on top of the other DP2.0 work in
"drm/dp: add LTTPR DP 2.0 DPCD addresses"
---
include/drm/drm_dp_helper.h | 20
1 file changed, 20 insertions(+)
diff --git
== Series Details ==
Series: series starting with [v5,01/13] drm/ttm: stop calling tt_swapin in
vm_access
URL : https://patchwork.freedesktop.org/series/95093/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21167_full
== Series Details ==
Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers
URL : https://patchwork.freedesktop.org/series/95127/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: drm/i915: Reject bogus modes with fixed mode panels (rev3)
URL : https://patchwork.freedesktop.org/series/95003/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21171
Summary
On Tue, 2021-09-21 at 03:23 +0300, Imre Deak wrote:
> A follow-up change will start to disconnect/re-connect PHYs around AUX
> transfers and modeset enable/disables. To prepare for that add a new
> TypeC PHY disconnected mode, to help tracking the TC-cold blocking power
> domain status (no power
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work
URL : https://patchwork.freedesktop.org/series/95122/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21170
Summary
---
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/i915: DP per-lane drive settings prep work
URL : https://patchwork.freedesktop.org/series/95122/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d25e0ee15f99 drm/i915: s/ddi_translations/trans/
-:1808: WARNING:LONG_LINE: line length of 102
Hooray! We've managed to hit enough bugs upstream that I've been able to
come up with a pretty solid explanation for how backlight controls are
actually supposed to be detected and used these days. As well, having the
rest of the PWM bits in VESA's backlight interface implemented seems to
have
Now that we've added support to i915 for controlling panel backlights that
need PWM to be enabled/disabled, let's finalize this and add support for
controlling brightness levels via PWM as well. This should hopefully put us
towards the path of supporting _ALL_ backlights via VESA's DPCD interface
This simply adds proper support for panel backlights that can be controlled
via VESA's backlight control protocol, but which also require that we
enable and disable the backlight via PWM instead of via the DPCD interface.
We also enable this by default, in order to fix some people's backlights
When I originally moved all of the VESA backlight code in i915 into DRM
helpers, one of the things I didn't have the hardware or time for
testing was machines that used a combination of PWM and DPCD in order to
control their backlights. This has since then caused some breakages and
resulted in us
== Series Details ==
Series: drm/dp: Add Additional DP2 Headers (rev2)
URL : https://patchwork.freedesktop.org/series/95104/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21169
Summary
---
On 2021-09-27 10:38, Fangzhi Zuo wrote:
> Include FEC, DSC, Link Training related headers.
>
> Signed-off-by: Fangzhi Zuo
Please send this to dri-devel and amd-gfx as well.
> ---
The section after the '---' is not part of the commit
description. Please mention here that this patch is based
on
== Series Details ==
Series: drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of
PCI_DMA_BIDIRECTIONAL
URL : https://patchwork.freedesktop.org/series/95091/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21166_full
== Series Details ==
Series: drm/i915/ttm: Rework object initialization slightly
URL : https://patchwork.freedesktop.org/series/95107/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21168
Summary
---
From: Ville Syrjälä
When using a panel with a fixed mode we don't change the refresh
rate of the display. Reject any user requested mode which doesn't
match that fixed refresh rate.
Unfortunately when Xorg sees the scaling_mode property on the
connecor it likes to automagically cook up modes
From: Ville Syrjälä
Let's introduce a compute_config() helper for fixed mode panels.
For now all it does is the fixed_mode->adjusted_mode copy.
Note that with sDVO we have to ask the external encoder chip
to spit out our actual display timings for us, so the fixed_mode
to adjusted_mode copy
Include FEC, DSC, Link Training related headers.
Signed-off-by: Fangzhi Zuo
---
include/drm/drm_dp_helper.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1d5b3dbb6e56..bfd8e3e0171d 100644
---
On Mon, Sep 27, 2021 at 11:23:35AM -0700, Matt Roper wrote:
> On Thu, Sep 23, 2021 at 06:49:59PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 23, 2021 at 11:48:58AM +0300, Stanislav Lisovskiy wrote:
> > > TileF(Tile4 in bspec) format is 4K tile organized into
> > > 64B subtiles with same basic
From: Ville Syrjälä
Adjust the link training code to accommodate per-lane drive settings,
if supported by the platform. Actually enabling this will involve
some changes to each platform's .set_signal_level() implementation,
so for the moment all supported platforms will keep using the current
From: Ville Syrjälä
Convert bxt_ddi_phy_set_signal_levels() to act as the full
.set_signal_levels() hook instead of going through a pointless wrapper.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 24 +--
From: Ville Syrjälä
Since intel_ddi_level() now looks that buf_trans table there's
no point in having intel_ddi_hdmi_num_entries() around. Just
roll the necessary bits of locic into
intel_ddi_hdmi_level()/intel_ddi_level().
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
LTTPRs should support per-lane drive settings I think, and even if
they don't they should implement their own fallback logic to determine
suitable common drive settings to use for all the lanes.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
In order to have per-lane drive settings we need intel_ddi_level()
to accept the lane as a parameter. That is, the eventual goal is to
call intel_ddi_level() once for each lane. For now we just pass in
a hardcoded 0 and use the same settings for every lane. Ie. no
change in
From: Ville Syrjälä
All callers of intel_ddi_level() duplicate the check+WARN
to make sure the returned level is actually present in the
appropriate buf_trans table. Let's push that stuff into
intel_ddi_level() so the callers don't have to worry about it.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Now that .set_signal_levels() is used for HDMI as well, we can
remove the extra level of indirection and just plug the correct
stuff straight into .set_signal_levels().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 119 +-
From: Ville Syrjälä
"ddi_translations" is a bit too long, let's shorten it to just "trans".
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 92 +--
.../drm/i915/display/intel_ddi_buf_trans.c| 628 +-
From: Ville Syrjälä
Currently .set_signal_levels() is only used by encoders in DP mode.
For most modern platforms there is no essential difference between
DP and HDMI, and both codepaths just end up calling the same function
under the hood. Let's get remove the need for that extra indirection
by
From: Ville Syrjälä
I had a few hours to burn the other day and so ended up accidentally
implementing per-lane drive settings for DP. This series contains
just the platform agnostic prep parts, and enabling it for LTTPRs.
I'll follow up with the platform specific hw pokey stuff later.
Ville
On Thu, Sep 23, 2021 at 06:49:59PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 23, 2021 at 11:48:58AM +0300, Stanislav Lisovskiy wrote:
> > TileF(Tile4 in bspec) format is 4K tile organized into
> > 64B subtiles with same basic shape as for legacy TileY
> > which will be supported by Display13.
>
>
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev5)
URL : https://patchwork.freedesktop.org/series/91674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648_full -> Patchwork_21165_full
== Series Details ==
Series: series starting with [v5,01/13] drm/ttm: stop calling tt_swapin in
vm_access
URL : https://patchwork.freedesktop.org/series/95093/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21167
== Series Details ==
Series: series starting with [v5,01/13] drm/ttm: stop calling tt_swapin in
vm_access
URL : https://patchwork.freedesktop.org/series/95093/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [v5,01/13] drm/ttm: stop calling tt_swapin in
vm_access
URL : https://patchwork.freedesktop.org/series/95093/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
63f7046be80e drm/ttm: stop calling tt_swapin in vm_access
-:11:
On Fri, Sep 24, 2021 at 04:45:02PM -0400, Eric Farman wrote:
> On Thu, 2021-09-09 at 16:38 -0300, Jason Gunthorpe wrote:
> > Having a mdev pointer floating about in addition to a struct
> > vfio_device
> > is confusing. It is only used for three things:
> >
> > - Getting the mdev 'struct device
On 26.09.2021 23:57, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Use fixed offset for PTEs location
> URL : https://patchwork.freedesktop.org/series/95074/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_10644_full -> Patchwork_21162_full
>
== Series Details ==
Series: drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of
PCI_DMA_BIDIRECTIONAL
URL : https://patchwork.freedesktop.org/series/95091/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21166
On Fri, Sep 24, 2021 at 05:10:44PM +, Souza, Jose wrote:
> On Fri, 2021-09-24 at 17:35 +0300, Ville Syrjälä wrote:
> > On Thu, Sep 23, 2021 at 12:46:11PM -0700, José Roberto de Souza wrote:
> > > Alderlake-P was getting 'max time under evasion' messages when PSR2
> > > was enabled, this is due
On Fri, Sep 24, 2021 at 04:37:43PM -0400, Eric Farman wrote:
> > @@ -528,6 +534,7 @@ static int __init vfio_ccw_sch_init(void)
> >
> > static void __exit vfio_ccw_sch_exit(void)
> > {
> > + mdev_unregister_driver(_ccw_mdev_driver);
>
> Wouldn't it be better to mirror the unwind-init case,
On Mon, 27 Sept 2021 at 12:47, Christian König wrote:
>
> Any objections that I just push patches 1-7 to drm-misc-next?
Please go ahead Christian. Thanks.
>
> Christian.
>
> Am 27.09.21 um 13:41 schrieb Matthew Auld:
> > In commit:
> >
> > commit 09ac4fcb3f255e9225967c75f5893325c116cdbe
> >
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev5)
URL : https://patchwork.freedesktop.org/series/91674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10648 -> Patchwork_21165
Any objections that I just push patches 1-7 to drm-misc-next?
Christian.
Am 27.09.21 um 13:41 schrieb Matthew Auld:
In commit:
commit 09ac4fcb3f255e9225967c75f5893325c116cdbe
Author: Felix Kuehling
Date: Thu Jul 13 17:01:16 2017 -0400
drm/ttm: Implement vm_operations_struct.access v2
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev5)
URL : https://patchwork.freedesktop.org/series/91674/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
41d229b94d3c drm/i915/gen11: Disable cursor clock gating in HDR mode
-:19:
> -Original Message-
> From: Ville Syrjala
> Sent: Friday, September 24, 2021 7:44 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma
> Subject: [PATCH] drm/i915/fbc: Allow FBC with Yf tiling
>
> From: Ville Syrjälä
>
> FBC+Yf tiling seems to work just fine, and unlike with
We may end up in i915_ttm_bo_destroy() in an error path before the
object is fully initialized. In that case it's not correct to call
__i915_gem_free_object(), because that function
a) Assumes the gem object refcount is 0, which it isn't.
b) frees the placements which are owned by the caller until
Hi,
On Sun, Sep 26, 2021 at 10:44 PM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the drm-misc tree, today's linux-next build (htmldocs)
> produced these warnings:
>
> include/drm/drm_edid.h:530: warning: Function parameter or member
> 'vend_chr_1' not described in
== Series Details ==
Series: series starting with [CI,01/24] drm/i915/uncore: split the fw get
function into separate vfunc (rev2)
URL : https://patchwork.freedesktop.org/series/95024/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10647 -> Patchwork_21164
== Series Details ==
Series: series starting with [CI,01/24] drm/i915/uncore: split the fw get
function into separate vfunc (rev2)
URL : https://patchwork.freedesktop.org/series/95024/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2b7863019540 drm/i915/uncore: split the fw
On Mon, Sep 13, 2021 at 05:44:37PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The PPS SDP is fed into the transcoder whereas the DSC
> block is (or at least can be) per pipe. Let's split these
> into two distinct operations in an effort to untagle the
> bigjoiner mess where we have
On Mon, 06 Sep 2021, Kai Vehmanen wrote:
> Hi,
>
> On Mon, 6 Sep 2021, Kai-Heng Feng wrote:
>
>> Commit 989634fb49ad ("drm/i915/audio: set HDA link parameters in
>> driver") makes HDMI audio on Lenovo P350 disappear.
>>
>> So in addition to TGL, extend the logic to RKL to use BIOS provided
>>
Drop the atomic shrink_pin stuff, and just have make_{un}shrinkable
update the shrinker visible lists immediately. This at least simplifies
the next patch, and does make the behaviour more obvious. The potential
downside is that make_unshrinkable now grabs a global lock even when the
object itself
We currently just evict lmem objects to system memory when under memory
pressure, and in the next patch we want to use the shmem backend even
for this case. For this case we lack the usual object mm.pages, which
effectively hides the pages from the i915-gem shrinker, until we
actually "attach" the
Turn on the shmem tt backend, and enable shrinking.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index
This should let us do an accelerated copy directly to the shmem pages
when temporarily moving lmem-only objects, where the i915-gem shrinker
can later kick in to swap out the pages, if needed.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 8
For cached objects we can allocate our pages directly in shmem. This
should make it possible(in a later patch) to utilise the existing
i915-gem shrinker code for such objects. For now this is still disabled.
v2(Thomas):
- Add optional try_to_writeback hook for objects. Importantly we need
Move it to inline kernel-doc, otherwise we can't add empty lines it
seems. Also drop the kernel-doc for pages_list, which doesn't seem to
exist.
v2(Christian):
- Add a note that FLAG_SWAPPED shouldn't need to be touched by drivers.
- Mention what FLAG_POPULATED does.
Signed-off-by: Matthew
In commit:
commit 667a50db0477d47fdff01c666f5ee1ce26b5264c
Author: Thomas Hellstrom
Date: Fri Jan 3 11:17:18 2014 +0100
drm/ttm: Refuse to fault (prime-) imported pages
we introduced the restriction that imported pages should not be directly
mappable through TTM(this also extends to
From: Thomas Hellström
Break out some shmem backend utils for future reuse by the TTM backend:
shmem_alloc_st(), shmem_free_st() and __shmem_writeback() which we can
use to provide a shmem-backed TTM page pool for cached-only TTM
buffer objects.
Main functional change here is that we now
It covers more than just ttm_bo_type_sg usage, like with say dma-buf,
since one other user is userptr in amdgpu, and in the future we might
have some more. Hence EXTERNAL is likely a more suitable name.
v2(Christian):
- Rename these to TTM_TT_FLAGS_*
- Fix up all the holes in the flag values
No longer used it seems.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Christian König
Reviewed-by: Christian König
---
include/drm/ttm/ttm_tt.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/drm/ttm/ttm_tt.h b/include/drm/ttm/ttm_tt.h
index 89b15d673b22..842ce756213c
Now that setting page->index shouldn't be needed anymore, we are just
left with setting page->mapping, and here it looks like amdgpu is the
only user, where pointing the page->mapping at the dev_mapping is used
to verify that the pages do indeed belong to the device, if userspace
later tries to
In commit:
commit 09ac4fcb3f255e9225967c75f5893325c116cdbe
Author: Felix Kuehling
Date: Thu Jul 13 17:01:16 2017 -0400
drm/ttm: Implement vm_operations_struct.access v2
we added the vm_access hook, where we also directly call tt_swapin for
some reason. If something is swapped-out then
In commit:
commit 58aa6622d32af7d2c08d45085f44c54554a16ed7
Author: Thomas Hellstrom
Date: Fri Jan 3 11:47:23 2014 +0100
drm/ttm: Correctly set page mapping and -index members
we started setting the page->mapping and page->index to point to the
virtual address space, if the pages were
Replace direction definition PCI_DMA_BIDIRECTIONAL
with DMA_BIDIRECTIONAL, because it helps to enhance readability
and avoid possible inconsistency.
Signed-off-by: Cai Huoqing
---
drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++--
drivers/gpu/drm/i915/gvt/gtt.c | 17
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev4)
URL : https://patchwork.freedesktop.org/series/91674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10645_full -> Patchwork_21163_full
On Mon, Sep 13, 2021 at 05:44:36PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Rewrite intel_crtc_copy_uapi_to_hw_state_nomodeset() in a
> slightly more straightforward manner.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 17
On Tue, Sep 21, 2021 at 03:49:24PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 20, 2021 at 12:52:15AM -0700, Navare, Manasi wrote:
> > On Mon, Sep 13, 2021 at 05:44:26PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Let's disable planes on all pipes affected by the modeset
Display underrun in HDR mode when cursor is enabled.
RTL fix will be implemented CLKGATE_DIS_PSL_A bit 28-46520h.
As per W/A 1604331009, Disable cursor clock gating in HDR mode.
Bspec : 33451
Changes since V5:
- replace intel_de_read with intel_de_rmw - Jani
Changes since V4:
-
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev4)
URL : https://patchwork.freedesktop.org/series/91674/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10645 -> Patchwork_21163
On Mon, 27 Sep 2021, Tejas Upadhyay
wrote:
> Display underrun in HDR mode when cursor is enabled.
> RTL fix will be implemented CLKGATE_DIS_PSL_A bit 28-46520h.
> As per W/A 1604331009, Disable cursor clock gating in HDR mode.
>
> Bspec : 33451
>
> Changes since V4:
> - Added WA needed
On Sat, 18 Sep 2021, Zhenyu Wang wrote:
> Hi,
>
> Here's one ww lock fini fix from Zhi which resolved recent regression
> with i915 change.
Thanks, pulled and pushed to drm-intel-fixes.
BR,
Jani.
>
> Thanks
> --
> The following changes since commit 71de496cc489b6bae2f51f89da7f28849bf2836e:
>
>
On Wed, 15 Sep 2021, Vandita Kulkarni wrote:
> The right parameter that selects second dsc engine is dsc_split.
> Hence use dsc_split instead of slice_count while selecting the
> cdclk in order to accommodate 1ppc limitaion of vdsc.
>
> Fixes: fe01883fdcef ("drm/i915: Get proper min cdclk if vDSC
== Series Details ==
Series: drm/i915/gen11: Disable cursor clock gating in HDR mode (rev4)
URL : https://patchwork.freedesktop.org/series/91674/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
15e0d660718d drm/i915/gen11: Disable cursor clock gating in HDR mode
-:17:
Display underrun in HDR mode when cursor is enabled.
RTL fix will be implemented CLKGATE_DIS_PSL_A bit 28-46520h.
As per W/A 1604331009, Disable cursor clock gating in HDR mode.
Bspec : 33451
Changes since V4:
- Added WA needed check - Ville
- Replace BIT with REG_BIT - Ville
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