Re: [Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE

2021-10-01 Thread kernel test robot
is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Lucas-De-Marchi/drm-i915-remove-IS_ACTIVE/20211001-154226 base: git

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix DP clock recovery "voltage_tries" handling

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: Fix DP clock recovery "voltage_tries" handling URL : https://patchwork.freedesktop.org/series/95339/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680_full -> Patchwork_21222_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix bug in user proto-context creation that leaked contexts (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: Fix bug in user proto-context creation that leaked contexts (rev2) URL : https://patchwork.freedesktop.org/series/94962/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680_full -> Patchwork_21221_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: DP per-lane drive settings prep work (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: DP per-lane drive settings prep work (rev5) URL : https://patchwork.freedesktop.org/series/95122/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10680_full -> Patchwork_21219_full

Re: [Intel-gfx] [PATCH v2 00/17] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers where possible

2021-10-01 Thread Ville Syrjälä
On Sat, Oct 02, 2021 at 01:05:47AM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 04:48:15PM -0400, Sean Paul wrote: > > On Fri, Oct 01, 2021 at 10:00:50PM +0300, Ville Syrjälä wrote: > > > On Fri, Oct 01, 2021 at 02:36:55PM -0400, Sean Paul wrote: > > > > On Fri, Sep 24, 2021 at 08:43:07AM

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev3)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev3) URL : https://patchwork.freedesktop.org/series/95127/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21227

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/dg2: update link training for 128b/132b

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/dg2: update link training for 128b/132b URL : https://patchwork.freedesktop.org/series/95317/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10679_full -> Patchwork_21217_full Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev3)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev3) URL : https://patchwork.freedesktop.org/series/95127/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Wait PSR2 get out of deep sleep to update pipe (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/display: Wait PSR2 get out of deep sleep to update pipe (rev2) URL : https://patchwork.freedesktop.org/series/95309/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21225

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Move vfio_ccw to the new mdev API (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: Move vfio_ccw to the new mdev API (rev5) URL : https://patchwork.freedesktop.org/series/94520/ State : failure == Summary == Applying: vfio/ccw: Remove unneeded GFP_DMA Applying: vfio/ccw: Use functions for alloc/free of the vfio_ccw_private Applying: vfio/ccw:

Re: [Intel-gfx] [PATCH v5] drm/i915: Update memory bandwidth formulae

2021-10-01 Thread Matt Roper
On Fri, Oct 01, 2021 at 09:16:26AM -0700, Radhakrishna Sripada wrote: > The formulae has been updated to include more variables. Make > sure the code carries the same. > > Bspec: 64631 I notice .deburst should be set to 8 rather than 16 on RKL. > > v2: Make GEN11 follow the default route and

[Intel-gfx] [PATCH v2 3/4] drm/dp, drm/i915: Add support for VESA backlights using PWM for brightness control

2021-10-01 Thread Lyude Paul
Now that we've added support to i915 for controlling panel backlights that need PWM to be enabled/disabled, let's finalize this and add support for controlling brightness levels via PWM as well. This should hopefully put us towards the path of supporting _ALL_ backlights via VESA's DPCD interface

[Intel-gfx] [PATCH v2 4/4] drm/i915: Clarify probing order in intel_dp_aux_init_backlight_funcs()

2021-10-01 Thread Lyude Paul
Hooray! We've managed to hit enough bugs upstream that I've been able to come up with a pretty solid explanation for how backlight controls are actually supposed to be detected and used these days. As well, having the rest of the PWM bits in VESA's backlight interface implemented seems to have

[Intel-gfx] [PATCH v2 1/4] drm/i915: Add support for panels with VESA backlights with PWM enable/disable

2021-10-01 Thread Lyude Paul
This simply adds proper support for panel backlights that can be controlled via VESA's backlight control protocol, but which also require that we enable and disable the backlight via PWM instead of via the DPCD interface. We also enable this by default, in order to fix some people's backlights

[Intel-gfx] [PATCH v2 2/4] drm/nouveau/kms/nv50-: Explicitly check DPCD backlights for aux enable/brightness

2021-10-01 Thread Lyude Paul
Since we don't support hybrid AUX/PWM backlights in nouveau right now, let's add some explicit checks so that we don't break nouveau once we enable support for these backlights in other drivers. Signed-off-by: Lyude Paul --- drivers/gpu/drm/nouveau/nouveau_backlight.c | 5 - 1 file changed,

[Intel-gfx] [PATCH v2 0/4] drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers

2021-10-01 Thread Lyude Paul
When I originally moved all of the VESA backlight code in i915 into DRM helpers, one of the things I didn't have the hardware or time for testing was machines that used a combination of PWM and DPCD in order to control their backlights. This has since then caused some breakages and resulted in us

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Update memory bandwidth formulae (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: Update memory bandwidth formulae (rev5) URL : https://patchwork.freedesktop.org/series/95138/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21224 Summary ---

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt

2021-10-01 Thread Ville Syrjälä
On Sat, Oct 02, 2021 at 01:01:31AM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 02:08:15PM -0700, Matt Roper wrote: > > On Thu, Sep 30, 2021 at 10:09:42PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Looks like skl/bxt/derivatives also need the plane stride > > >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix DP clock recovery "voltage_tries" handling

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: Fix DP clock recovery "voltage_tries" handling URL : https://patchwork.freedesktop.org/series/95339/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21222 Summary

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: remove IS_ACTIVE (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: remove IS_ACTIVE (rev2) URL : https://patchwork.freedesktop.org/series/95312/ State : failure == Summary == Applying: drm/i915: remove IS_ACTIVE error: patch failed: drivers/gpu/drm/i915/i915_config.c:8 error: drivers/gpu/drm/i915/i915_config.c: patch

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers URL : https://patchwork.freedesktop.org/series/95316/ State : success == Summary == CI Bug Log - changes from CI_DRM_10678_full -> Patchwork_21216_full Summary

Re: [Intel-gfx] [PATCH v2 00/17] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers where possible

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 04:48:15PM -0400, Sean Paul wrote: > On Fri, Oct 01, 2021 at 10:00:50PM +0300, Ville Syrjälä wrote: > > On Fri, Oct 01, 2021 at 02:36:55PM -0400, Sean Paul wrote: > > > On Fri, Sep 24, 2021 at 08:43:07AM +0200, Fernando Ramos wrote: > > > > Hi all, > > > > > > > > One of

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 02:08:15PM -0700, Matt Roper wrote: > On Thu, Sep 30, 2021 at 10:09:42PM +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Looks like skl/bxt/derivatives also need the plane stride > > stretch w/a when using async flips and VT-d is enabled, or > > else we get

[Intel-gfx] [PATCH v3 07/10] vfio/mdev: Add mdev available instance checking to the core

2021-10-01 Thread Jason Gunthorpe
Many of the mdev drivers use a simple counter for keeping track of the available instances. Move this code to the core code and store the counter in the mdev_type. Implement it using correct locking, fixing mdpy. Drivers provide a get_available() callback to set the number of available instances

[Intel-gfx] [PATCH v3 09/10] vfio: Export vfio_device_try_get()

2021-10-01 Thread Jason Gunthorpe
vfio_ccw will need it. Signed-off-by: Jason Gunthorpe --- drivers/vfio/vfio.c | 3 ++- include/linux/vfio.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c index 08b27b64f0f935..44adf112e3b5dd 100644 --- a/drivers/vfio/vfio.c +++

[Intel-gfx] [PATCH v3 08/10] vfio/ccw: Remove private->mdev

2021-10-01 Thread Jason Gunthorpe
Having a mdev pointer floating about in addition to a struct vfio_device is confusing. It is only used for three things: - Getting the mdev 'struct device *' - this is the same as private->vdev.dev - Printing the uuid of the mdev in logging. The uuid is also the dev_name of the mdev so

[Intel-gfx] [PATCH v3 01/10] vfio/ccw: Remove unneeded GFP_DMA

2021-10-01 Thread Jason Gunthorpe
Since the ccw_io_region was split out of the private the allocation no longer needs the GFP_DMA. Remove it. Reported-by: Christoph Hellwig Fixes: c98e16b2fa12 ("s390/cio: Convert ccw_io_region to pointer") Signed-off-by: Jason Gunthorpe --- drivers/s390/cio/vfio_ccw_drv.c | 2 +- 1 file

[Intel-gfx] [PATCH v3 02/10] vfio/ccw: Use functions for alloc/free of the vfio_ccw_private

2021-10-01 Thread Jason Gunthorpe
Makes the code easier to understand what is memory lifecycle and what is other stuff. Reviewed-by: Eric Farman Signed-off-by: Jason Gunthorpe --- drivers/s390/cio/vfio_ccw_drv.c | 137 ++-- 1 file changed, 78 insertions(+), 59 deletions(-) diff --git

[Intel-gfx] [PATCH v3 10/10] vfio/ccw: Move the lifecycle of the struct vfio_ccw_private to the mdev

2021-10-01 Thread Jason Gunthorpe
The css_driver's main purpose is to create/destroy the mdev and relay the shutdown, irq, sch_event, and chp_event css_driver ops to the single created vfio_device, if it exists. Reframe the boundary where the css_driver domain switches to the vfio domain by using rcu to read and refcount the

[Intel-gfx] [PATCH v3 06/10] vfio/mdev: Consolidate all the device_api sysfs into the core code

2021-10-01 Thread Jason Gunthorpe
Every driver just emits a static string, simply feed it through the ops and provide a standard sysfs show function. Signed-off-by: Jason Gunthorpe --- .../driver-api/vfio-mediated-device.rst | 4 ++- drivers/gpu/drm/i915/gvt/kvmgt.c | 9 +--

[Intel-gfx] [PATCH v3 00/10] Move vfio_ccw to the new mdev API

2021-10-01 Thread Jason Gunthorpe
This addresses Cornelia's remark on the earlier patch that ccw has a confusing lifecycle. While it doesn't seem like the original attempt was functionally wrong, the result can be made better with a lot of further work. Reorganize the driver so that the mdev owns the private memory and controls

[Intel-gfx] [PATCH v3 03/10] vfio/ccw: Pass vfio_ccw_private not mdev_device to various functions

2021-10-01 Thread Jason Gunthorpe
mdev_device should only be used in functions assigned to ops callbacks, interior functions should use the struct vfio_ccw_private instead of repeatedly trying to get it from the mdev. Reviewed-by: Christoph Hellwig Reviewed-by: Cornelia Huck Reviewed-by: Eric Farman Signed-off-by: Jason

[Intel-gfx] [PATCH v3 05/10] vfio/ccw: Make the FSM complete and synchronize it to the mdev

2021-10-01 Thread Jason Gunthorpe
The subchannel should be left in a quiescent state unless the VFIO device FD is opened. When the FD is opened bring the chanel to active and allow the VFIO device to operate. When the device FD is closed then quiesce the channel. To make this work the FSM needs to handle the transitions to/from

[Intel-gfx] [PATCH v3 04/10] vfio/ccw: Convert to use vfio_register_emulated_iommu_dev()

2021-10-01 Thread Jason Gunthorpe
This is a more complicated conversion because vfio_ccw is sharing the vfio_device between both the mdev_device, its vfio_device and the css_driver. The mdev is a singleton, and the reason for this sharing is so the extra css_driver function callbacks to be delivered to the vfio_device

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix bug in user proto-context creation that leaked contexts (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: Fix bug in user proto-context creation that leaked contexts (rev2) URL : https://patchwork.freedesktop.org/series/94962/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21221

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Extend the async flip VT-d w/a to skl/bxt

2021-10-01 Thread Matt Roper
On Thu, Sep 30, 2021 at 10:09:42PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Looks like skl/bxt/derivatives also need the plane stride > stretch w/a when using async flips and VT-d is enabled, or > else we get corruption on screen. To my surprise this was > even documented in bspec,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: DP per-lane drive settings prep work (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: DP per-lane drive settings prep work (rev5) URL : https://patchwork.freedesktop.org/series/95122/ State : success == Summary == CI Bug Log - changes from CI_DRM_10680 -> Patchwork_21219 Summary

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev2) URL : https://patchwork.freedesktop.org/series/94712/ State : failure == Summary == Applying: drm/hdcp: Add drm_hdcp_atomic_check() Applying: drm/hdcp: Avoid changing crtc state in hdcp atomic check

Re: [Intel-gfx] [PATCH v2 00/17] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers where possible

2021-10-01 Thread Sean Paul
On Fri, Oct 01, 2021 at 10:00:50PM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 02:36:55PM -0400, Sean Paul wrote: > > On Fri, Sep 24, 2021 at 08:43:07AM +0200, Fernando Ramos wrote: > > > Hi all, > > > > > > One of the things in the DRM TODO list ("Documentation/gpu/todo.rst") was > >

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: DP per-lane drive settings prep work (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: DP per-lane drive settings prep work (rev5) URL : https://patchwork.freedesktop.org/series/95122/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: DP per-lane drive settings prep work (rev5)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915: DP per-lane drive settings prep work (rev5) URL : https://patchwork.freedesktop.org/series/95122/ State : warning == Summary == $ dim checkpatch origin/drm-tip cf1c2f180fc0 drm/i915: Introduce has_iboost() 0331dcae40fa drm/i915: Introduce

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/guc: Improve CTB error handling (rev3)

2021-10-01 Thread Matt Roper
On Sun, Sep 26, 2021 at 08:31:46PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/guc: Improve CTB error handling (rev3) > URL : https://patchwork.freedesktop.org/series/92118/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_10644_full ->

Re: [Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers

2021-10-01 Thread Rob Herring
On Fri, 01 Oct 2021 11:11:41 -0400, Sean Paul wrote: > From: Sean Paul > > This patch adds the bindings for the MSM DisplayPort HDCP registers > which are required to write the HDCP key into the display controller as > well as the registers to enable HDCP authentication/key >

Re: [Intel-gfx] [PATCH v2 00/17] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers where possible

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 02:36:55PM -0400, Sean Paul wrote: > On Fri, Sep 24, 2021 at 08:43:07AM +0200, Fernando Ramos wrote: > > Hi all, > > > > One of the things in the DRM TODO list ("Documentation/gpu/todo.rst") was to > > "use DRM_MODESET_LOCAL_ALL_* helpers instead of boilerplate". That's

Re: [Intel-gfx] [PATCH v2 00/17] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers where possible

2021-10-01 Thread Sean Paul
On Fri, Sep 24, 2021 at 08:43:07AM +0200, Fernando Ramos wrote: > Hi all, > > One of the things in the DRM TODO list ("Documentation/gpu/todo.rst") was to > "use DRM_MODESET_LOCAL_ALL_* helpers instead of boilerplate". That's what this > patch series is about. > > You will find two types of

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7

2021-10-01 Thread Patchwork
== Series Details == Series: series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7 URL : https://patchwork.freedesktop.org/series/95322/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10679 -> Patchwork_21218

Re: [Intel-gfx] [PATCH] drm/i915: Use fixed offset for PTEs location

2021-10-01 Thread Matt Roper
On Thu, Sep 30, 2021 at 03:01:19PM -0700, Matt Roper wrote: > On Sun, Sep 26, 2021 at 10:10:05PM +0200, Michal Wajdeczko wrote: > > We assumed that for all modern GENs the PTEs and register space are > > split in the GTTMMADR BAR, but while it is true, we should rather use > > fixed offset as it

Re: [Intel-gfx] [vfio:next 33/38] drivers/gpu/drm/i915/i915_pci.c:975:2: warning: missing field 'override_only' initializer

2021-10-01 Thread Nathan Chancellor
On Fri, Oct 01, 2021 at 02:04:04PM +0300, Jani Nikula wrote: > On Fri, 27 Aug 2021, Jason Gunthorpe wrote: > > On Fri, Aug 27, 2021 at 03:12:36PM +, kernel test robot wrote: > >> tree: https://github.com/awilliam/linux-vfio.git next > >> head: ea870730d83fc13a5fa2bd0e175176d7ac8a400a > >>

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7

2021-10-01 Thread Patchwork
== Series Details == Series: series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7 URL : https://patchwork.freedesktop.org/series/95322/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

Re: [Intel-gfx] [PATCH] drm/i915: Stop force enabling pipe bottom color gammma/csc

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 08:45:49PM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 05:12:03PM +, Shankar, Uma wrote: > > > > > > > -Original Message- > > > From: Intel-gfx On Behalf Of > > > Ville Syrjala > > > Sent: Wednesday, September 29, 2021 12:21 AM > > > To:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7

2021-10-01 Thread Patchwork
== Series Details == Series: series starting with [01/28] dma-buf: add dma_resv_for_each_fence_unlocked v7 URL : https://patchwork.freedesktop.org/series/95322/ State : warning == Summary == $ dim checkpatch origin/drm-tip 245f2aaae8e7 dma-buf: add dma_resv_for_each_fence_unlocked v7 -:23:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dg2: update link training for 128b/132b

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/dg2: update link training for 128b/132b URL : https://patchwork.freedesktop.org/series/95317/ State : success == Summary == CI Bug Log - changes from CI_DRM_10679 -> Patchwork_21217 Summary ---

Re: [Intel-gfx] [PATCH] drm/i915: Stop force enabling pipe bottom color gammma/csc

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 05:12:03PM +, Shankar, Uma wrote: > > > > -Original Message- > > From: Intel-gfx On Behalf Of > > Ville Syrjala > > Sent: Wednesday, September 29, 2021 12:21 AM > > To: intel-gfx@lists.freedesktop.org > > Subject: [Intel-gfx] [PATCH] drm/i915: Stop force

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: update link training for 128b/132b

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/dg2: update link training for 128b/132b URL : https://patchwork.freedesktop.org/series/95317/ State : warning == Summary == $ dim checkpatch origin/drm-tip a29a3e413068 drm/i915/dg2: update link training for 128b/132b -:27: WARNING:UNNECESSARY_ELSE: else

Re: [Intel-gfx] [PATCH] drm/i915: Fix DP clock recovery "voltage_tries" handling

2021-10-01 Thread Imre Deak
On Fri, Oct 01, 2021 at 07:08:26PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > The DP spec says: > "If the receiver keeps the same value in the ADJUST_REQUEST_LANEx_y > register(s) while the LANEx_CR_DONE bits remain unset, the transmitter > must loop four times with the same voltage

Re: [Intel-gfx] [PATCH] drm/i915: Stop force enabling pipe bottom color gammma/csc

2021-10-01 Thread Shankar, Uma
> -Original Message- > From: Intel-gfx On Behalf Of Ville > Syrjala > Sent: Wednesday, September 29, 2021 12:21 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH] drm/i915: Stop force enabling pipe bottom color > gammma/csc > > From: Ville Syrjälä > > While

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/locking: add backtrace for locking contended locks without backoff (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/locking: add backtrace for locking contended locks without backoff (rev2) URL : https://patchwork.freedesktop.org/series/95182/ State : success == Summary == CI Bug Log - changes from CI_DRM_10674_full -> Patchwork_21215_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers URL : https://patchwork.freedesktop.org/series/95316/ State : success == Summary == CI Bug Log - changes from CI_DRM_10678 -> Patchwork_21216 Summary ---

[Intel-gfx] [PATCH v5] drm/i915: Update memory bandwidth formulae

2021-10-01 Thread Radhakrishna Sripada
The formulae has been updated to include more variables. Make sure the code carries the same. Bspec: 64631 v2: Make GEN11 follow the default route and fix calculation of maxdebw(RK) v3: Fix div by zero on default case Correct indent for fallthrough(Jani) v4: Fix div by zero on gen11. v5:

Re: [Intel-gfx] [PATCH] drm/i915: remove IS_ACTIVE

2021-10-01 Thread Lucas De Marchi
On Fri, Oct 01, 2021 at 12:57:13PM +0300, Jani Nikula wrote: On Fri, 01 Oct 2021, Chris Wilson wrote: Quoting Lucas De Marchi (2021-10-01 08:40:41) When trying to bring IS_ACTIVE to linux/kconfig.h I thought it wouldn't provide much value just encapsulating it in a boolean context. So I also

[Intel-gfx] [PATCH] drm/i915: Fix DP clock recovery "voltage_tries" handling

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä The DP spec says: "If the receiver keeps the same value in the ADJUST_REQUEST_LANEx_y register(s) while the LANEx_CR_DONE bits remain unset, the transmitter must loop four times with the same voltage swing. On the fifth time, the transmitter must down-shift to the lower

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers

2021-10-01 Thread Patchwork
== Series Details == Series: drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers URL : https://patchwork.freedesktop.org/series/95316/ State : warning == Summary == $ dim checkpatch origin/drm-tip 2e6ff8d7426c drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers -:25: WARNING:LONG_LINE: line

[Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts

2021-10-01 Thread Matthew Brost
Set number of engines before attempting to create contexts so the function free_engines can clean up properly. Also check return of alloc_engines for NULL. v2: (Tvrtko) - Send as stand alone patch (John Harrison) - Check for alloc_engines returning NULL v3: (Checkpatch / Tvrtko) - Remove

Re: [Intel-gfx] [PATCH] drm/i915: Fix bug in user proto-context creation that leaked contexts

2021-10-01 Thread Matthew Brost
On Fri, Oct 01, 2021 at 09:40:19AM +0100, Tvrtko Ursulin wrote: > > + Daniel as reviewer and maybe merge, avoid falling through cracks at least. > Ty, working on push rights myself. > On 22/09/2021 20:43, Matthew Brost wrote: > > Set number of engines before attempting to create contexts so

Re: [Intel-gfx] [vfio:next 33/38] drivers/gpu/drm/i915/i915_pci.c:975:2: warning: missing field 'override_only' initializer

2021-10-01 Thread Jason Gunthorpe
On Fri, Oct 01, 2021 at 02:04:04PM +0300, Jani Nikula wrote: > On Fri, 27 Aug 2021, Jason Gunthorpe wrote: > > On Fri, Aug 27, 2021 at 03:12:36PM +, kernel test robot wrote: > >> tree: https://github.com/awilliam/linux-vfio.git next > >> head: ea870730d83fc13a5fa2bd0e175176d7ac8a400a > >>

Re: [Intel-gfx] [RFC 1/6] sched: Add nice value change notifier

2021-10-01 Thread Peter Zijlstra
On Fri, Oct 01, 2021 at 11:32:16AM +0100, Tvrtko Ursulin wrote: > > On 01/10/2021 10:04, Tvrtko Ursulin wrote: > > > > Hi Peter, > > > > On 30/09/2021 19:33, Peter Zijlstra wrote: > > > On Thu, Sep 30, 2021 at 06:15:47PM +0100, Tvrtko Ursulin wrote: > > > >   void set_user_nice(struct

Re: [Intel-gfx] [PATCH] drm/i915/dg2: update link training for 128b/132b

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 01:02:47PM +0300, Jani Nikula wrote: > The 128b/132b channel coding link training uses more straightforward TX > FFE preset values. > > v2: Fix UHBR rate checks, use intel_dp_is_uhbr() helper > > Signed-off-by: Jani Nikula > --- >

[Intel-gfx] [PATCH v3 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers

2021-10-01 Thread Sean Paul
From: Sean Paul This patch adds HDCP 1.x support to msm DP connectors using the new HDCP helpers. Cc: Stephen Boyd Cc: Abhinav Kumar Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-s...@poorly.run #v1 Link:

[Intel-gfx] [PATCH v3 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller

2021-10-01 Thread Sean Paul
From: Sean Paul This patch adds the register ranges required for HDCP key injection and HDCP TrustZone interaction as described in the dt-bindings for the sc7180 dp controller. Now that these are supported, change the compatible string to "dp-hdcp". Signed-off-by: Sean Paul Link:

[Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers

2021-10-01 Thread Sean Paul
From: Sean Paul This patch adds the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. We'll use a new compatible string for this since the fields

[Intel-gfx] [PATCH v3 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules

2021-10-01 Thread Sean Paul
From: Sean Paul Audio is initialized last, it should be de-initialized first to match the order in dp_init_sub_modules(). Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-12-s...@poorly.run

[Intel-gfx] [PATCH v3 10/14] drm/msm/dpu: Remove encoder->enable() hack

2021-10-01 Thread Sean Paul
From: Sean Paul encoder->commit() was being misused because there were some global resources which needed to be tweaked in encoder->enable() which were not accessible in dpu_encoder.c. That is no longer true and the redirect serves no purpose any longer. So remove the indirection. Reviewed-by:

[Intel-gfx] [PATCH v3 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder

2021-10-01 Thread Sean Paul
From: Sean Paul A couple more useless checks to remove in dpu_encoder. Reviewed-by: Stephen Boyd Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-10-s...@poorly.run #v1 Link:

[Intel-gfx] [PATCH v3 08/14] drm/msm/dpu_kms: Re-order dpu includes

2021-10-01 Thread Sean Paul
From: Sean Paul Make includes alphabetical in dpu_kms.c Reviewed-by: Abhinav Kumar Reviewed-by: Stephen Boyd Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-9-s...@poorly.run #v1 Link:

[Intel-gfx] [PATCH v3 07/14] drm/i915/hdcp: Use HDCP helpers for i915

2021-10-01 Thread Sean Paul
From: Sean Paul Now that all of the HDCP 1.x logic has been migrated to the central HDCP helpers, use it in the i915 driver. The majority of the driver code for HDCP 1.x will live in intel_hdcp.c, however there are a few helper hooks which are connector-specific and need to be partially or

[Intel-gfx] [PATCH v3 06/14] drm/i915/hdcp: Retain hdcp_capable return codes

2021-10-01 Thread Sean Paul
From: Sean Paul The shim functions return error codes, but they are discarded in intel_hdcp.c. This patch plumbs the return codes through so they are properly handled. Acked-by: Jani Nikula Signed-off-by: Sean Paul Link:

[Intel-gfx] [PATCH v3 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache

2021-10-01 Thread Sean Paul
From: Sean Paul Stick all of the setup for HDCP into a dedicated function. No functional change, but this will facilitate moving HDCP logic into helpers. Acked-by: Jani Nikula Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-6-s...@poorly.run

[Intel-gfx] [PATCH v3 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check

2021-10-01 Thread Sean Paul
From: Sean Paul This patch expands upon the HDCP helper library to manage HDCP enable, disable, and check. Previous to this patch, the majority of the state management and sink interaction is tucked inside the Intel driver with the understanding that once a new platform supported HDCP we could

[Intel-gfx] [PATCH v3 03/14] drm/hdcp: Update property value on content type and user changes

2021-10-01 Thread Sean Paul
From: Sean Paul This patch updates the connector's property value in 2 cases which were previously missed: 1- Content type changes. The value should revert back to DESIRED from ENABLED in case the driver must re-authenticate the link due to the new content type. 2- Userspace sets value

[Intel-gfx] [PATCH v3 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check

2021-10-01 Thread Sean Paul
From: Sean Paul Instead of forcing a modeset in the hdcp atomic check, simply return true if the content protection value is changing and let the driver decide whether a modeset is required or not. Acked-by: Jani Nikula Signed-off-by: Sean Paul Link:

[Intel-gfx] [PATCH v3 01/14] drm/hdcp: Add drm_hdcp_atomic_check()

2021-10-01 Thread Sean Paul
From: Sean Paul This patch moves the hdcp atomic check from i915 to drm_hdcp so other drivers can use it. No functional changes, just cleaned up some of the code when moving it over. Acked-by: Jani Nikula Signed-off-by: Sean Paul Link:

[Intel-gfx] [PATCH v3 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers

2021-10-01 Thread Sean Paul
From: Sean Paul Hello again, Here is v3 of the patch series. Notable changes include incorporating review feedback involving: - Changed dt-bindings to introduce new compatible string - Code changes in msm driver as suggested by Stephen & Abhinav - Fixed issues found by 0-day Thank you to the

Re: [Intel-gfx] [PULL] drm-intel-fixes

2021-10-01 Thread Daniel Vetter
On Thu, Sep 30, 2021 at 11:50:20AM +0300, Jani Nikula wrote: > > Hi Dave & Daniel - > > drm-intel-fixes-2021-09-30: > drm/i915 fixes for v5.15-rc4: > - Fix GVT scheduler ww lock usage > - Fix pdfdocs documentation build > - Fix request early tracepoints > - Fix an invalid warning from rps worker

Re: [Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P

2021-10-01 Thread Dan Carpenter
On Fri, Oct 01, 2021 at 05:20:17PM +0300, Ville Syrjälä wrote: > On Fri, Oct 01, 2021 at 04:25:35PM +0300, Dan Carpenter wrote: > > Hello Imre Deak, > > > > This is a semi-automatic email about new static checker warnings. > > > > The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY > >

Re: [Intel-gfx] [PATCH] drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of PCI_DMA_BIDIRECTIONAL

2021-10-01 Thread Daniel Vetter
On Thu, Sep 30, 2021 at 08:58:15PM +0200, Christophe JAILLET wrote: > Le 30/09/2021 à 16:21, Daniel Vetter a écrit : > > On Sat, Sep 25, 2021 at 08:46:12PM +0800, Cai Huoqing wrote: > > > Replace direction definition PCI_DMA_BIDIRECTIONAL > > > with DMA_BIDIRECTIONAL, because it helps to enhance

Re: [Intel-gfx] [PULL] drm-misc-fixes

2021-10-01 Thread Daniel Vetter
On Fri, Oct 01, 2021 at 11:50:52AM +0200, Daniel Vetter wrote: > On Thu, Sep 30, 2021 at 12:06:21PM +0200, Maarten Lankhorst wrote: > > drm-misc-fixes-2021-09-30: > > drm-misc-fixes for v5.15: > > - Not sure if drm-misc-fixes-2021-09-08 tag was pulled, assuming it is. > > - Power management fixes

Re: [Intel-gfx] [PATCH v2 02/10] drm/i915: Introduce has_buf_trans_select()

2021-10-01 Thread Imre Deak
On Fri, Oct 01, 2021 at 04:00:59PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Add a small helper to determine if DDI_BUF_CTL uses the > DDI_BUF_TRANS_SELECT field, and whether we have the > accompanying DDI_BUF_TRANS table in the hardware. > > Cc: Imre Deak > Signed-off-by: Ville

Re: [Intel-gfx] [PATCH v2 01/10] drm/i915: Introduce has_iboost()

2021-10-01 Thread Imre Deak
On Fri, Oct 01, 2021 at 04:00:58PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Suck the "do we have iboost?" platform checks into a small helper. > > Cc: Imre Deak > Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 13

Re: [Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P

2021-10-01 Thread Ville Syrjälä
On Fri, Oct 01, 2021 at 04:25:35PM +0300, Dan Carpenter wrote: > Hello Imre Deak, > > This is a semi-automatic email about new static checker warnings. > > The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY > connect/disconnect logic on ADL-P" from Sep 29, 2021, leads to the > following

[Intel-gfx] [bug report] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P

2021-10-01 Thread Dan Carpenter
Hello Imre Deak, This is a semi-automatic email about new static checker warnings. The patch 3e0abc7661c8: "drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P" from Sep 29, 2021, leads to the following Smatch complaint: drivers/gpu/drm/i915/display/intel_ddi.c:4028

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/locking: add backtrace for locking contended locks without backoff (rev2)

2021-10-01 Thread Patchwork
== Series Details == Series: drm/locking: add backtrace for locking contended locks without backoff (rev2) URL : https://patchwork.freedesktop.org/series/95182/ State : success == Summary == CI Bug Log - changes from CI_DRM_10674 -> Patchwork_21215

Re: [Intel-gfx] refactor the i915 GVT support

2021-10-01 Thread Wang, Zhi A
On 9/29/21 6:55 PM, Jason Gunthorpe wrote: > On Wed, Sep 29, 2021 at 06:27:16PM +, Wang, Zhi A wrote: >> On 9/28/21 3:05 PM, Jason Gunthorpe wrote: >>> On Tue, Sep 28, 2021 at 02:35:06PM +, Wang, Zhi A wrote: >>> Yes. I was thinking of the possibility of putting off some work later so

[Intel-gfx] [PATCH v2 08/10] drm/i915: Pass the lane to intel_ddi_level()

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä In order to have per-lane drive settings we need intel_ddi_level() to accept the lane as a parameter. That is, the eventual goal is to call intel_ddi_level() once for each lane. For now we just pass in a hardcoded 0 and use the same settings for every lane. Ie. no change in

[Intel-gfx] [PATCH v2 07/10] drm/i915: Nuke intel_ddi_hdmi_num_entries()

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Since intel_ddi_level() now looks that buf_trans table there's no point in having intel_ddi_hdmi_num_entries() around. Just roll the necessary bits of locic into intel_ddi_hdmi_level()/intel_ddi_level(). Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä ---

[Intel-gfx] [PATCH v2 10/10] drm/i915: Allow per-lane drive settings with LTTPRs

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä LTTPRs should support per-lane drive settings I think, and even if they don't they should implement their own fallback logic to determine suitable common drive settings to use for all the lanes. v2: Actually check the correct thing Reviewed-by: Imre Deak Signed-off-by:

[Intel-gfx] [PATCH v2 02/10] drm/i915: Introduce has_buf_trans_select()

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Add a small helper to determine if DDI_BUF_CTL uses the DDI_BUF_TRANS_SELECT field, and whether we have the accompanying DDI_BUF_TRANS table in the hardware. Cc: Imre Deak Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-- 1 file

[Intel-gfx] [PATCH v2 09/10] drm/i915: Prepare link training for per-lane drive settings

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Adjust the link training code to accommodate per-lane drive settings, if supported by the platform. Actually enabling this will involve some changes to each platform's .set_signal_level() implementation, so for the moment all supported platforms will keep using the current

[Intel-gfx] [PATCH v2 04/10] drm/i915: Nuke useless .set_signal_levels() wrappers

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Now that .set_signal_levels() is used for HDMI as well, we can remove the extra level of indirection and just plug the correct stuff straight into .set_signal_levels(). Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c |

[Intel-gfx] [PATCH v2 05/10] drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels()

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Convert bxt_ddi_phy_set_signal_levels() to act as the full .set_signal_levels() hook instead of going through a pointless wrapper. Reviewed-by: Imre Deak Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 24 +--

[Intel-gfx] [PATCH v2 00/10] drm/i915: DP per-lane drive settings prep work

2021-10-01 Thread Ville Syrjala
From: Ville Syrjälä Revised set after I fixed the DDI_BUF_CTL stuff Imre pointed out. Also pushed the first s/ddi_translation/trans/ rename patch already. There are two new patches at the start of the series to refactor some platform checks into a more sensible form. Ville Syrjälä (10):

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