A new step of 480MHz has been added on SKUs that have a RPL-U
device id. Add a new table which include this new CDCLK step.
BSpec: 55409
Signed-off-by: Chaitanya Kumar Borah
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 39 ++
1 file changed, 39 insertions(+)
diff --git
There are still RPL-U boards which does not support the 480Mhz step of
CDCLK. We can differentiate these board by checking the CPUID Brand
String. 480Mhz step is only supported in SKUs which does not contain
the string "Genuine Intel" in the Brand string.
BSpec: 55409
Signed-off-by: Chaitanya
A new step of 480MHz has been added on SKUs that have a RPL-U
device id. This particular step is to better support 120Hz panels.
This patchset adds a new table to include this new CDCLK
step. Details can be found in BSpec entry 55409.
In addition to identifying RPL-U device id, we need to make a
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev5)
URL : https://patchwork.freedesktop.org/series/109850/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12450 -> Patchwork_109850v5
Summary
---
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev5)
URL : https://patchwork.freedesktop.org/series/109850/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev5)
URL : https://patchwork.freedesktop.org/series/109850/
State : warning
== Summary ==
Error: dim checkpatch failed
d9cc1aa76ff4 drm/i915/selftests: Rename librapl library to libpower
Traceback (most recent call last):
From: Tilak Tangudu
hwmon provides an interface to read energy values for discrete graphics.
add hwmon support to the existing libpower library so that it can verify
power consumption values in different selftests.
Changed prototype of libpower_get_energy_uJ
v2: add per-gt hwmon support
Rename librapl files to libpower and replace librapl
with libpower prefix. No functional changes
v2: update commit message (Anshuman)
Signed-off-by: Riana Tauro
Reviewed-by: Anshuman Gupta
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/gt/selftest_rc6.c
Add an interface to obtain hwmon energy values. The function returns
per-gt energy if register is valid else returns the device level
energy. This is used by selftest to verify power consumption
v2 : use i915_hwmon prefix (Anshuman)
v3 : re-use is_visible function of energy to remove
Rename librapl library to libpower. Add hwmon support in libpower for
dgfx.
Use libpower in selftests.
Rev2 : Update commit message
Rev3 : Remove redundant code
Rev4 : Add hwmon per-gt support
Rev5 : No functional changes.
Change author for last patch
Riana Tauro (2):
== Series Details ==
Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test
pattern (rev7)
URL : https://patchwork.freedesktop.org/series/108636/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12446_full -> Patchwork_108636v7_full
On Fri, Nov 18, 2022 at 03:53:34PM -0800, Zanoni, Paulo R wrote:
On Sat, 2022-11-12 at 23:57 -0800, Niranjana Vishwanathapura wrote:
DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM
buffer objects (BOs) or sections of a BOs at specified GPU virtual
addresses on a specified
Hi all,
After merging the drm-intel tree, today's linux-next build (htmldocs)
produced this warning:
drivers/gpu/drm/i915/gt/intel_gt_mcr.c:739: warning: expecting prototype for
intel_gt_mcr_wait_for_reg_fw(). Prototype was for intel_gt_mcr_wait_for_reg()
instead
Introduced by commit
== Series Details ==
Series: drm/i915: Remove CONFIG_PM dependency from RC6.
URL : https://patchwork.freedesktop.org/series/111465/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12449 -> Patchwork_111465v1
Summary
---
== Series Details ==
Series: series starting with [v6,1/1] drm/i915/pxp: Promote pxp subsystem to
top-level of i915
URL : https://patchwork.freedesktop.org/series/111463/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12449 -> Patchwork_111463v1
RC6 is a sleep state that doesn't depend on the cpu sleep,
or any of the APM or ACPI or anything related to the
CONFIG_PM.
A long time ago we have removed the module parameter
that allows the RC6 disablement. We want that feature enabled
everywhere. However, for some reason this CONFIG_PM was
== Series Details ==
Series: series starting with [v6,1/1] drm/i915/pxp: Promote pxp subsystem to
top-level of i915
URL : https://patchwork.freedesktop.org/series/111463/
State : warning
== Summary ==
Error: make htmldocs had i915 warnings
./drivers/gpu/drm/i915/gt/intel_gt_mcr.c:739:
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the tiles is used for control events
On Mon, 28 Nov 2022 17:21:46 -0800, Umesh Nerlige Ramappa wrote:
>
> +/*
> + * Ref: 14010536224:
> + * 0x20cc is repurposed on MTL, so use a separate array for MTL.
Wondering if it was WAIT_FOR_RC6_EXIT (seen in gen12_oa_mux_regs) which
moved elsewhere and if that needs to be added to the array
On Tue, 29 Nov 2022 17:17:13 -0800, Dixit, Ashutosh wrote:
>
> > @@ -4746,6 +4772,7 @@ static void oa_init_supported_formats(struct
> > i915_perf *perf)
> > break;
> >
> > case INTEL_DG2:
> > + case INTEL_METEORLAKE:
> > oa_format_add(perf,
== Series Details ==
Series: More GuC firmware version improvements (rev3)
URL : https://patchwork.freedesktop.org/series/111218/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12449 -> Patchwork_111218v3
Summary
---
== Series Details ==
Series: Allow error capture without a request / on reset failure
URL : https://patchwork.freedesktop.org/series/111454/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12449 -> Patchwork_111454v1
Summary
On Mon, 28 Nov 2022 17:21:46 -0800, Umesh Nerlige Ramappa wrote:
>
Hi Umesh,
Overall looks ok, just a couple of questions below. Splitting the patches
would be nice and easier to review, but I'm almost done with this one ;-)
> @@ -1876,7 +1875,13 @@ static int alloc_noa_wait(struct
== Series Details ==
Series: More GuC firmware version improvements (rev3)
URL : https://patchwork.freedesktop.org/series/111218/
State : warning
== Summary ==
Error: dim checkpatch failed
3f13a32ca07b drm/i915/uc: Rationalise delimiters in filename macros
71c8b8a09a71 drm/i915/uc: More
>
Alan: [snip]
> In general, no need for cover letter in single/standalone patches.
> In this case, I believe this here is a very good information to be on the
> commit message. It looks more complete and informative for later history,
> then the current one.
>
>
Alan: Okay will republish as
++Nikula if he has suggestions on the bottom most comment.
On Tue, 2022-11-29 at 16:28 -0500, Vivi, Rodrigo wrote:
> On Mon, Nov 28, 2022 at 04:31:52PM -0800, Alan Previn wrote:
> > Starting with MTL, there will be two GT-tiles, a render and media
> > tile. PXP as a service for supporting
== Series Details ==
Series: Allow error capture without a request / on reset failure
URL : https://patchwork.freedesktop.org/series/111454/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Besides the nit below, just would like to echo the same thing Nikula said about
not including the type definition in the
main uc header (which i know can be a bit more work especially if we go with
allocation of the structure at init time
and using a ptr in the uc structure).
That said,
On Wed, Nov 23, 2022 at 11:42:58AM +, Matthew Auld wrote:
On 16/11/2022 00:37, Niranjana Vishwanathapura wrote:
On Tue, Nov 15, 2022 at 03:15:03PM -0800, Niranjana Vishwanathapura wrote:
On Tue, Nov 15, 2022 at 08:33:47AM -0800, Niranjana
Vishwanathapura wrote:
On Tue, Nov 15, 2022 at
From: John Harrison
The GuC firmware includes an extra version number to specify the
submission API level. So use that rather than the main firmware
version number for submission related checks.
Also, while it is guaranteed that GuC version number components are
only 8-bits in size, other
From: John Harrison
As a precursor to a coming change (for adding a GuC submission API
version), abstract the UC version number into its own private
structure separate to the firmware filename.
Signed-off-by: John Harrison
Reviewed-by: Daniele Ceraolo Spurio
---
From: John Harrison
Start using the 'submission API version' for deciding which GuC API to
use in the submission code.
Correct version number manipulation code to support full 32bit
major/minor/patch components, except for GuC which is guaranteed to be
8bit safe.
Other minor code clean ups
From: John Harrison
The way delimiters (underscores and dots) were added to the UC
filenames was different for different types of delimiter. Rationalise
them to all be done the same way - implicitly in the concatenation
macro rather than explicitly in the file name prefix.
Signed-off-by: John
== Series Details ==
Series: drm/i915/dsc: Refactor dsc gen checks (rev3)
URL : https://patchwork.freedesktop.org/series/110744/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12444_full -> Patchwork_110744v3_full
Summary
== Series Details ==
Series: drm/i915/hdmi: SPD infoframe update for discrete
URL : https://patchwork.freedesktop.org/series/111450/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12446 -> Patchwork_111450v1
Summary
---
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev4)
URL : https://patchwork.freedesktop.org/series/109850/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12446 -> Patchwork_109850v4
Summary
---
On Mon, Nov 28, 2022 at 04:31:51PM -0800, Alan Previn wrote:
> MTL has two tiles that is represented by the intel_gt structure in the i915
> code. The PXP feature has a control-structure that currently hangs off the
> intel_gt structure. In MTL, the standalone media tile (i.e. not the root
> tile)
On Mon, Nov 28, 2022 at 04:31:52PM -0800, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
> contexts and protected buffers can be subscribed by process
> workloads on any tile. However,
On 2022-11-25 05:21, Christian König wrote:
Instead of a single worker going over the list of delete BOs in regular
intervals use a per BO worker which blocks for the resv object and
locking of the BO.
This not only simplifies the handling massively, but also results in
much better response
From: John Harrison
Engine resets are supposed to never happen. But in the case when one
does (due to unknwon reasons that normally come down to a missing
w/a), it is useful to get as much information out of the system as
possible. Given that the GuC effectively dies on such a situation, it
is
From: John Harrison
There was a report of error captures occurring without any hung
context being indicated despite the capture being initiated by a 'hung
context notification' from GuC. The problem was not reproducible.
However, it is possible to happen if the context in question has no
active
From: John Harrison
It is technically possible to get a hung context without a valid
request. In such a situation, try to provide as much information in
the error capture as possible rather than just aborting and capturing
nothing.
Similarly, in the case of a engine reset failure the GuC is not
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev4)
URL : https://patchwork.freedesktop.org/series/109850/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: Add hwmon support for dgfx selftests (rev4)
URL : https://patchwork.freedesktop.org/series/109850/
State : warning
== Summary ==
Error: dim checkpatch failed
8f2a045fe927 drm/i915/selftests: Rename librapl library to libpower
Traceback (most recent call last):
On Tue, Nov 29, 2022 at 07:19:11AM +, Patchwork wrote:
Patch Details
Series: drm/i915/perf: Do not parse context image for HSW (rev4)
URL: [1]https://patchwork.freedesktop.org/series/111231/
State: failure
Details:
== Series Details ==
Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test
pattern (rev7)
URL : https://patchwork.freedesktop.org/series/108636/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12446 -> Patchwork_108636v7
== Series Details ==
Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test
pattern (rev7)
URL : https://patchwork.freedesktop.org/series/108636/
State : warning
== Summary ==
Error: dim checkpatch failed
19421b1a4582 drm/i915/display: Don't disable DDI/Transcoder when
Replace integrated with discrete for dgfx platforms.
v2: commit title reword (Jani)
v3: use variable name i915 (Jani)
v4: commit message reword (MattR)
Cc: Jani Nikula
Reviewed-by: Matt Roper
Signed-off-by: Taylor, Clinton A
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 7 ++-
1 file
Instead of defining two versions of intel_sysfs_rc6_init(), one for each
value of CONFIG_PM, add a check on !IS_ENABLED(CONFIG_PM) early in the
function. This will allow the compiler to automatically drop the dead
code when CONFIG_PM is disabled, without having to use #ifdef guards.
This has the
> -Original Message-
> From: Intel-gfx On Behalf Of
> Stanislav Lisovskiy
> Sent: Thursday, November 24, 2022 2:36 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani
> Subject: [Intel-gfx] [PATCH 1/1] drm/i915: Implement workaround for CDCLK
> PLL disable/enable
>
> It was
On 11/23/2022 2:31 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The GuC firmware includes an extra version number to specify the
submission API level. So use that rather than the main firmware
version number for submission related checks.
Also, while it is guaranteed that GuC
On Mon, Nov 28, 2022 at 11:15:52PM -0800, Lucas De Marchi wrote:
On Mon, Nov 28, 2022 at 05:21:46PM -0800, Umesh Nerlige Ramappa wrote:
As part of OA support for MTL,
- Enable 32 bit OAG formats for MTL.
- 0x200c is repurposed on MTL. Use a separate mux table to verify oa
configs passed by
On Mon, 2022-11-28 at 16:31 -0800, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
> contexts and protected buffers can be subscribed by process
>
>
Alan: [snip]
> diff --git
On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
wrote:
>
>
> + Matt
>
> On 25/11/2022 10:21, Christian König wrote:
> > TTM is just wrapping core DMA functionality here, remove the mid-layer.
> > No functional change.
> >
> > Signed-off-by: Christian König
> > ---
> >
On Tue, 2022-11-29 at 14:00 +, Souza, Jose wrote:
> On Tue, 2022-11-29 at 09:51 +0200, Jouni Högander wrote:
> > Currently we are observing occasionally display flickering or
> > complete
> > freeze. This is narrowed down to be caused by single full frame
> > update
> > (SFF).
> >
> > SFF bit
== Series Details ==
Series: drm/i915/fbdev: Implement fb_dirty for intel custom fb helper
URL : https://patchwork.freedesktop.org/series/111433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12442_full -> Patchwork_111433v1_full
== Series Details ==
Series: drm/i915/dsc: Refactor dsc gen checks (rev3)
URL : https://patchwork.freedesktop.org/series/110744/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12444 -> Patchwork_110744v3
Summary
---
== Series Details ==
Series: drm/i915/dsc: Refactor dsc gen checks (rev3)
URL : https://patchwork.freedesktop.org/series/110744/
State : warning
== Summary ==
Error: make htmldocs had i915 warnings
./drivers/gpu/drm/i915/gt/intel_gt_mcr.c:739: warning: expecting prototype for
== Series Details ==
Series: drm/i915/dsc: Refactor dsc gen checks (rev3)
URL : https://patchwork.freedesktop.org/series/110744/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On 11/29/2022 1:45 AM, Dan Carpenter wrote:
The "fw" pointer is freed again in the clean up code at the end of the
function. Set it to NULL here to prevent a double free.
Fixes: 016241168dc5 ("drm/i915/uc: use different ggtt pin offsets for uc loads")
Signed-off-by: Dan Carpenter
This
Rename librapl files to libpower and replace librapl
with libpower prefix. No functional changes
v2: update commit message (Anshuman)
Signed-off-by: Riana Tauro
Reviewed-by: Anshuman Gupta
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/gt/selftest_rc6.c
hwmon provides an interface to read energy values for discrete graphics.
add hwmon support to the existing libpower library so that it can verify
power consumption values in different selftests.
Changed prototype of libpower_get_energy_uJ
v2: add per-gt hwmon support (Ashutosh)
Signed-off-by:
Add an interface to obtain hwmon energy values. The function returns
per-gt energy if register is valid else returns the device level
energy. This is used by selftest to verify power consumption
v2 : use i915_hwmon prefix (Anshuman)
v3 : re-use is_visible function of energy to remove
Rename librapl library to libpower. Add hwmon support in libpower for
dgfx.
Use libpower in selftests.
Rev2 : Update commit message
Rev3 : Remove redundant code
Rev4 : Add hwmon per-gt support
Riana Tauro (3):
drm/i915/selftests: Rename librapl library to libpower
drm/i915/hwmon: Add helper
On Tue, 2022-11-29 at 09:51 +0200, Jouni Högander wrote:
> Currently we are observing occasionally display flickering or complete
> freeze. This is narrowed down to be caused by single full frame update
> (SFF).
>
> SFF bit after it's written gets cleared by HW in subsequent vblank
> i.e. when
On Wed, 23 Nov 2022, Ville Syrjälä wrote:
> On Wed, Nov 23, 2022 at 03:09:32PM +0200, Jani Nikula wrote:
>> The file uses bool and struct completion, include the relevant headers.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed to drm-misc-next.
BR,
Jani.
>
>>
== Series Details ==
Series: drm/i915/fbdev: Implement fb_dirty for intel custom fb helper
URL : https://patchwork.freedesktop.org/series/111433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12442 -> Patchwork_111433v1
Am 29.11.22 um 14:14 schrieb Pan, Xinhui:
[AMD Official Use Only - General]
comments line.
发件人: Koenig, Christian
发送时间: 2022年11月29日 20:07
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com;
After splitting generic drm_fb_helper into it's own file it's left to
helper implementation to have fb_dirty function. Currently intel
fb doesn't have it. This is causing problems when PSR is enabled.
Implement simple fb_dirty callback to deliver notifications to psr
about updates in fb console.
Am 29.11.22 um 12:54 schrieb Pan, Xinhui:
[AMD Official Use Only - General]
comments inline.
发件人: Koenig, Christian
发送时间: 2022年11月29日 19:32
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com;
== Series Details ==
Series: drm/i915/psr: Add continuous full frame bit together with single
URL : https://patchwork.freedesktop.org/series/111420/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12442 -> Patchwork_111420v1
Am 29.11.22 um 11:56 schrieb xinhui pan:
Currently drm-buddy does not have full knowledge of continuous memory.
Lets consider scenario below.
order 1:L R
order 0: LL LR RL RR
for order 1 allocation, it can offer L or R or LR+RL.
For now, we only implement L or R
== Series Details ==
Series: drm/i915/vm_bind: Add VM_BIND functionality (rev11)
URL : https://patchwork.freedesktop.org/series/105879/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12441_full -> Patchwork_105879v11_full
On 29-11-2022 15:41, Tvrtko Ursulin wrote:
>
> On 22/11/2022 07:01, Aravind Iddamsetty wrote:
>> On XE_LPM+ platforms the media engines are carved out into a separate
>> GT but have a common GGTMMADR address range which essentially makes
>> the GGTT address space to be shared between media and
On 29-11-2022 01:49, Lucas De Marchi wrote:
> On Mon, Nov 28, 2022 at 03:43:52PM +0530, Aravind Iddamsetty wrote:
>> From: Pallavi Mishra
>>
>> Caching mode for an object shall be selected via upcoming VM_BIND
>> interface.
>
> last I've heard there was no plan to support this through
Hi Jani,
On Tue, Nov 29, 2022 at 11:29:45AM +0200, Jani Nikula wrote:
> On Fri, 25 Nov 2022, Harry Wentland wrote:
> > On 10/5/22 06:51, Jani Nikula wrote:
> >> Currently i915 assumes all drm_connectors it encounters are embedded in
> >> intel_connectors that i915 allocated. The
On 22/11/2022 07:01, Aravind Iddamsetty wrote:
On XE_LPM+ platforms the media engines are carved out into a separate
GT but have a common GGTMMADR address range which essentially makes
the GGTT address space to be shared between media and render GT. As a
result any updates in GGTT shall
On Mon, 28 Nov 2022, Jani Nikula wrote:
> On Sat, 26 Nov 2022, Mikko Kovanen wrote:
>> intel_dsi->ports contains bitmask of enabled ports and correspondingly
>> logic for selecting port for VBT packet sending must use port specific
>> bitmask when deciding appropriate port.
>>
>> Fixes:
On Fri, 25 Nov 2022, Jani Nikula wrote:
> On Fri, 25 Nov 2022, Xia Fukun wrote:
>> When (size != 0 || ptrs->lvds_ entries != 3), the program tries to
>> free() the ptrs. However, the ptrs is not created by calling kzmalloc(),
>> but is obtained by pointer offset operation.
>> This may lead to
On Tuesday, November 29, 2022 3:51 PM, Hogander, Jouni
wrote:
>Currently we are observing occasionally display flickering or complete freeze.
>This is narrowed down to be caused by single full frame update (SFF).
>
>SFF bit after it's written gets cleared by HW in subsequent vblank i.e. when
On Fri, 25 Nov 2022, Harry Wentland wrote:
> On 10/5/22 06:51, Jani Nikula wrote:
>> Currently i915 assumes all drm_connectors it encounters are embedded in
>> intel_connectors that i915 allocated. The drm_writeback_connector forces
>> a design where this is not the case; we can't provide our own
== Series Details ==
Series: drm/i915/vm_bind: Add VM_BIND functionality (rev11)
URL : https://patchwork.freedesktop.org/series/105879/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12441 -> Patchwork_105879v11
Summary
On 28/11/2022 16:52, Andrzej Hajda wrote:
In case context is exiting preempt_timeout_ms is used for timeout,
but since introduction of DRM_I915_PREEMPT_TIMEOUT_COMPUTE it increases
to 7.5 seconds. Heartbeat occurs earlier but it is still 2.5s.
Fixes: d7a8680ec9fb21 ("drm/i915: Improve long
== Series Details ==
Series: drm/i915/pxp: Add missing cleanup steps for PXP global-teardown
URL : https://patchwork.freedesktop.org/series/111409/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12440_full -> Patchwork_111409v1_full
== Series Details ==
Series: drm/i915/vm_bind: Add VM_BIND functionality (rev11)
URL : https://patchwork.freedesktop.org/series/105879/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/vm_bind: Add VM_BIND functionality (rev11)
URL : https://patchwork.freedesktop.org/series/105879/
State : warning
== Summary ==
Error: dim checkpatch failed
de1854134032 drm/i915/vm_bind: Expose vm lookup function
b435faacf50c drm/i915/vm_bind: Add
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