On Mon, Jul 17, 2023 at 04:52:51PM +0200, Andrzej Hajda wrote:
>
>
> On 17.07.2023 08:22, Su Hui wrote:
> > Clang warning: drivers/gpu/drm/i915/display/intel_tv.c:
> > line 991, column 22 Division by zero.
> > Assuming tv_mode->oversample=1 and (!tv_mode->progressive)=1,
> > then division by
== Series Details ==
Series: gtt_offset and OA buffer cached head/tail
URL : https://patchwork.freedesktop.org/series/120880/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120880v1_full
Summary
Dpt objects that are created from internal get evicted when there is
memory pressure and do not get restored when pinned during scanout. The
pinned page table entries look corrupted and programming the display
engine with the incorrect pte's result in DE throwing pipe faults.
Create DPT objects
== Series Details ==
Series: drm/i915/huc: check HuC and GuC version compatibility on MTL (rev3)
URL : https://patchwork.freedesktop.org/series/120572/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120572v3_full
On Mon, 17 Jul 2023 21:19:13 -0700, Belgaumkar, Vinay wrote:
>
>
> On 7/17/2023 6:50 PM, Dixit, Ashutosh wrote:
> > On Mon, 17 Jul 2023 11:42:13 -0700, Vinay Belgaumkar wrote:
> >> Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
> >> print the values being compared and some
Some subtests seem to be failing in CI, use igt_assert_eq where we
compare the requested freq, which will print the values being compared.
Also print the RP values at the beginning of the test.
v2: Print GT as well (Ashutosh)
v3: Minor commit message correction (Ashutosh)
Reviewed-by: Ashutosh
On 7/17/2023 6:50 PM, Dixit, Ashutosh wrote:
On Mon, 17 Jul 2023 11:42:13 -0700, Vinay Belgaumkar wrote:
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print the values being compared and some additional debug as well.
v2: Print GT as well (Ashutosh)
Signed-off-by:
== Series Details ==
Series: gtt_offset and OA buffer cached head/tail
URL : https://patchwork.freedesktop.org/series/120880/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120880v1
Summary
---
== Series Details ==
Series: drm/i915: Fix an error handling path in igt_write_huge()
URL : https://patchwork.freedesktop.org/series/120867/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120867v1_full
== Series Details ==
Series: Update AUX invalidation sequence (rev4)
URL : https://patchwork.freedesktop.org/series/119798/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_119798v4_full
Summary
There is no reason to add gtt_offset to the cached head/tail pointers
stream->oa_buffer.head and stream->oa_buffer.tail. This causes the code to
constantly add gtt_offset and subtract gtt_offset and is error
prone (e.g. see previous patch).
It is much simpler to maintain stream->oa_buffer.head
Ashutosh Dixit (2):
drm/i915/perf: Subtract gtt_offset from hw_tail
drm/i915/perf: Remove gtt_offset from stream->oa_buffer.head/.tail
drivers/gpu/drm/i915/i915_perf.c | 52
1 file changed, 13 insertions(+), 39 deletions(-)
--
2.41.0
The code in oa_buffer_check_unlocked() is correct only if the OA buffer is
16 MB aligned (which seems to be the case today in i915). However when the
16 MB alignment is dropped, when we "Subtract partial amount off the tail",
the "& (OA_BUFFER_SIZE - 1)" operation in OA_TAKEN() will result in an
== Series Details ==
Series: drm/i915/huc: check HuC and GuC version compatibility on MTL (rev3)
URL : https://patchwork.freedesktop.org/series/120572/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120572v3
== Series Details ==
Series: drm/i915/huc: check HuC and GuC version compatibility on MTL (rev3)
URL : https://patchwork.freedesktop.org/series/120572/
State : warning
== Summary ==
Error: dim checkpatch failed
e42c5cf55be6 drm/i915/huc: check HuC and GuC version compatibility on MTL
-:38:
On Mon, 17 Jul 2023 11:42:13 -0700, Vinay Belgaumkar wrote:
>
> Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
> print the values being compared and some additional debug as well.
>
> v2: Print GT as well (Ashutosh)
>
> Signed-off-by: Vinay Belgaumkar
> ---
>
> From: Alex Williamson
> Sent: Tuesday, July 18, 2023 2:46 AM
>
> On Mon, 17 Jul 2023 08:08:59 +
> "Liu, Yi L" wrote:
>
> > > From: Liu, Yi L
> > > Sent: Monday, July 17, 2023 2:36 PM
> > >
> > > > From: Liu, Yi L
> > > > Sent: Friday, June 16, 2023 5:40 PM
> > > >
> > > > vfio_group is
== Series Details ==
Series: drm/i915/huc: check HuC and GuC version compatibility on MTL (rev2)
URL : https://patchwork.freedesktop.org/series/120572/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120572v2
== Series Details ==
Series: drm/i915/huc: check HuC and GuC version compatibility on MTL (rev2)
URL : https://patchwork.freedesktop.org/series/120572/
State : warning
== Summary ==
Error: dim checkpatch failed
0c599db79392 drm/i915/huc: check HuC and GuC version compatibility on MTL
-:38:
Hi Matt,
> > > > > + /*
> > > > > + * Aux invalidations on Aux CCS platforms require
> > > > > + * memory traffic is quiesced prior.
> > > > > + */
> > > > > + if ((mode & EMIT_INVALIDATE) && !HAS_FLAT_CCS(engine->i915))
> > > >
> > > > It's a pre-existing mistake in
Due to a change in the auth flow on MTL, GuC 70.7.0 and newer will only
be able to authenticate HuC 8.5.1 and newer. The plan is to update the 2
binaries synchronously in linux-firmware so that the fw repo always has
a matching pair that works; still, it's better to check in the kernel so
we can
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move setting of rps thresholds
to init
URL : https://patchwork.freedesktop.org/series/120857/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120857v1_full
On Mon, 17 Jul 2023 19:12:16 -0300
Jason Gunthorpe wrote:
> On Mon, Jul 17, 2023 at 01:08:31PM -0600, Alex Williamson wrote:
>
> > What would that mechanism be? We've been iterating on getting the
> > serialization and buffering correct, but I don't know of another means
> > that combines the
== Series Details ==
Series: drm/i915/tv: avoid possible division by zero
URL : https://patchwork.freedesktop.org/series/120851/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120851v1_full
Summary
Hi Matt,
On Mon, Jul 17, 2023 at 01:27:09PM -0700, Matt Roper wrote:
> On Mon, Jul 17, 2023 at 07:30:59PM +0200, Andi Shyti wrote:
> > Perform some refactoring with the purpose of keeping in one
> > single place all the operations around the aux table
> > invalidation.
> >
> > With this
== Series Details ==
Series: drm: Spelling s/sempahore/semaphore/
URL : https://patchwork.freedesktop.org/series/120847/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13392_full -> Patchwork_120847v1_full
Summary
---
On Mon, Jul 17, 2023 at 11:52:25PM +0200, Andi Shyti wrote:
> Hi Matt,
>
> On Mon, Jul 17, 2023 at 01:31:03PM -0700, Matt Roper wrote:
> > On Mon, Jul 17, 2023 at 10:54:37AM -0700, Matt Roper wrote:
> > > On Mon, Jul 17, 2023 at 07:30:55PM +0200, Andi Shyti wrote:
> > > > From: Jonathan Cavitt
>
== Series Details ==
Series: drm/i915: Fix an error handling path in igt_write_huge()
URL : https://patchwork.freedesktop.org/series/120867/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120867v1
Summary
Hi Andrzej,
On Mon, Jul 17, 2023 at 09:11:26PM +0200, Andrzej Hajda wrote:
> On 17.07.2023 19:30, Andi Shyti wrote:
> > Perform some refactoring with the purpose of keeping in one
> > single place all the operations around the aux table
> > invalidation.
> >
> > With this refactoring add more
Hi Andrzej,
On Mon, Jul 17, 2023 at 08:21:40PM +0200, Andrzej Hajda wrote:
> On 17.07.2023 19:30, Andi Shyti wrote:
> > In preparation of the next patch allign with the datasheet (BSPEC
> > 47112) with the naming of the pipe control set of flag values.
> > The variable "flags" in
Hi Matt,
On Mon, Jul 17, 2023 at 01:31:03PM -0700, Matt Roper wrote:
> On Mon, Jul 17, 2023 at 10:54:37AM -0700, Matt Roper wrote:
> > On Mon, Jul 17, 2023 at 07:30:55PM +0200, Andi Shyti wrote:
> > > From: Jonathan Cavitt
> > >
> > > All memory traffic must be quiesced before requesting
> > >
== Series Details ==
Series: Update AUX invalidation sequence (rev4)
URL : https://patchwork.freedesktop.org/series/119798/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_119798v4
Summary
---
On Mon, 2023-07-17 at 11:45 +0200, Janusz Krzysztofik wrote:
> I could add your comment and resubmit, but my experience from
> communication
> with audience of this patch tells me that silence means rather no
> acceptance.
I don't think adding a comment to explain tricky hidden details would
== Series Details ==
Series: Update AUX invalidation sequence (rev4)
URL : https://patchwork.freedesktop.org/series/119798/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Update AUX invalidation sequence (rev4)
URL : https://patchwork.freedesktop.org/series/119798/
State : warning
== Summary ==
Error: dim checkpatch failed
ab8c9adb02af drm/i915/gt: Cleanup aux invalidation registers
3c567ec2d453 drm/i915/gt: Ensure memory quiesced
On Mon, Jul 17, 2023 at 10:54:37AM -0700, Matt Roper wrote:
> On Mon, Jul 17, 2023 at 07:30:55PM +0200, Andi Shyti wrote:
> > From: Jonathan Cavitt
> >
> > All memory traffic must be quiesced before requesting
> > an aux invalidation on platforms that use Aux CCS.
> >
> > Fixes: 972282c4cf24
On Mon, Jul 17, 2023 at 07:30:59PM +0200, Andi Shyti wrote:
> Perform some refactoring with the purpose of keeping in one
> single place all the operations around the aux table
> invalidation.
>
> With this refactoring add more engines where the invalidation
> should be performed.
>
> Fixes:
On Mon, Jul 17, 2023 at 07:30:58PM +0200, Andi Shyti wrote:
> From: Jonathan Cavitt
>
> For platforms that use Aux CCS, wait for aux invalidation to
> complete by checking the aux invalidation register bit is
> cleared.
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
On Mon, Jul 17, 2023 at 07:30:57PM +0200, Andi Shyti wrote:
> Enable the CCS_FLUSH bit 13 in the control pipe for render and
> compute engines in platforms starting from Meteor Lake (BSPEC
> 43904 and 47112).
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> engines")
On Mon, 17 Jul 2023 11:53:27 -0700, Rodrigo Vivi wrote:
>
> On Mon, Jul 17, 2023 at 06:12:19PM +0100, Tvrtko Ursulin wrote:
> > From: Tvrtko Ursulin
> >
> > A silent conflict sneaked in as I was merging
> > d86ca7e17b58 ("tests/i915_pm_rps: Exercise sysfs thresholds") in a way
> > that
== Series Details ==
Series: drm/i915/hotplug: Reduce SHPD_FILTER to 250us (rev2)
URL : https://patchwork.freedesktop.org/series/120722/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13390_full -> Patchwork_120722v2_full
On 17.07.2023 19:30, Andi Shyti wrote:
Perform some refactoring with the purpose of keeping in one
single place all the operations around the aux table
invalidation.
With this refactoring add more engines where the invalidation
should be performed.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux
On Mon, 17 Jul 2023 10:29:34 +0200
Grzegorz Jaszczyk wrote:
> pt., 14 lip 2023 o 09:05 Christian Brauner napisał(a):
> >
> > On Thu, Jul 13, 2023 at 11:10:54AM -0600, Alex Williamson wrote:
> > > On Thu, 13 Jul 2023 12:05:36 +0200
> > > Christian Brauner wrote:
> > >
> > > > Hey everyone,
Hi André, thanks for review!
On 7/12/23 20:30, André Almeida wrote:
Hi Carlos,
Em 27/06/2023 15:22, Carlos Eduardo Gallo Filho escreveu:
[...]
So, replace each drm_framebuffer_plane_{width,height} and
fb_plane_{width,height} call to drm_format_info_plane_{width,height}
and remove them.
I
All error handling paths go to 'out', except this one. Be consistent and
also branch to 'out' here.
Fixes: c10a652e239e ("drm/i915/selftests: Rework context handling in hugepages
selftests")
Signed-off-by: Christophe JAILLET
---
/!\ Speculative /!\
This patch is based on analysis of the
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move setting of rps thresholds
to init
URL : https://patchwork.freedesktop.org/series/120857/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120857v1
On Mon, Jul 17, 2023 at 06:12:19PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> A silent conflict sneaked in as I was merging
> d86ca7e17b58 ("tests/i915_pm_rps: Exercise sysfs thresholds") in a way
> that igt_sysfs_set_u32 has became a function returning void.
>
> Assert is now
On 17.07.2023 19:30, Andi Shyti wrote:
From: Jonathan Cavitt
For platforms that use Aux CCS, wait for aux invalidation to
complete by checking the aux invalidation register bit is
cleared.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan
On Mon, 17 Jul 2023 08:08:59 +
"Liu, Yi L" wrote:
> > From: Liu, Yi L
> > Sent: Monday, July 17, 2023 2:36 PM
> >
> > > From: Liu, Yi L
> > > Sent: Friday, June 16, 2023 5:40 PM
> > >
> > > vfio_group is not needed for vfio device cdev, so with vfio device cdev
> > > introduced, the
Thanks for cleaning this.
With Matt's suggestion, this is
Reviewed-by: Nirmoy Das
On 7/17/2023 7:30 PM, Andi Shyti wrote:
In preparation of the next patch allign with the datasheet (BSPEC
47112) with the naming of the pipe control set of flag values.
The variable "flags" in
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print the values being compared and some additional debug as well.
v2: Print GT as well (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
tests/i915/i915_pm_freq_api.c | 18 --
1 file changed, 8 insertions(+), 10
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move setting of rps thresholds
to init
URL : https://patchwork.freedesktop.org/series/120857/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move setting of rps thresholds
to init
URL : https://patchwork.freedesktop.org/series/120857/
State : warning
== Summary ==
Error: dim checkpatch failed
9bcdc0ca7378 drm/i915: Move setting of rps thresholds to init
-:6:
On 7/8/2023 12:36 PM, Dixit, Ashutosh wrote:
On Fri, 07 Jul 2023 16:23:59 -0700, Vinay Belgaumkar wrote:
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print the values being compared and some additional debug as well.
Signed-off-by: Vinay Belgaumkar
---
== Series Details ==
Series: drm/i915/tv: avoid possible division by zero
URL : https://patchwork.freedesktop.org/series/120851/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120851v1
Summary
---
On 17.07.2023 19:30, Andi Shyti wrote:
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Cc:
On 17.07.2023 19:30, Andi Shyti wrote:
In preparation of the next patch allign with the datasheet (BSPEC
47112) with the naming of the pipe control set of flag values.
The variable "flags" in gen12_emit_flush_rcs() is applied as a
set of flags called Bit Group 1.
Define also the Bit Group 0 as
On 7/12/2023 10:03, Ceraolo Spurio, Daniele wrote:
On 7/12/2023 3:03 AM, Andrzej Hajda wrote:
On 11.07.2023 22:31, Daniele Ceraolo Spurio wrote:
Due to a change in the auth flow on MTL, GuC 70.7.0 and newer will only
be able to authenticate HuC 8.5.1 and newer. The plan is to update
the 2
== Series Details ==
Series: drm/i915: Start using plane scale factor for relative data rate (rev2)
URL : https://patchwork.freedesktop.org/series/120767/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13390_full -> Patchwork_120767v2_full
On 7/13/2023 05:11, Tvrtko Ursulin wrote:
On 13/07/2023 12:09, Andrzej Hajda wrote:
Hi,
On 13.07.2023 09:39, Tvrtko Ursulin wrote:
On 12/07/2023 19:54, John Harrison wrote:
On 7/12/2023 09:27, Andrzej Hajda wrote:
On 12.07.2023 14:35, Tvrtko Ursulin wrote:
On 12/07/2023 13:18, Andrzej
On Mon, Jul 17, 2023 at 07:30:56PM +0200, Andi Shyti wrote:
> In preparation of the next patch allign with the datasheet (BSPEC
s/allign/align/
Otherwise,
Reviewed-by: Matt Roper
> 47112) with the naming of the pipe control set of flag values.
> The variable "flags" in gen12_emit_flush_rcs()
On Mon, Jul 17, 2023 at 07:30:55PM +0200, Andi Shyti wrote:
> From: Jonathan Cavitt
>
> All memory traffic must be quiesced before requesting
> an aux invalidation on platforms that use Aux CCS.
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> engines")
>
The following changes since commit d3f66064cf43bd7338a79174bd0ff60c4ecbdf6d:
Partially revert "amdgpu: DMCUB updates for DCN 3.1.4 and 3.1.5" (2023-07-07
15:24:32 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware mtl_gsc_102.0.0.1625
for you to
== Series Details ==
Series: drm: Spelling s/sempahore/semaphore/
URL : https://patchwork.freedesktop.org/series/120847/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13392 -> Patchwork_120847v1
Summary
---
On 17.07.2023 14:51, Andi Shyti wrote:
From: Jonathan Cavitt
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by:
On 17.07.2023 14:51, Andi Shyti wrote:
Fix the 'NV' definition postfix that is supposed to be INV.
Take the chance to also order properly the registers based on
their address and call the GEN12_GFX_CCS_AUX_INV address as
GEN12_CCS_AUX_INV like all the other similar registers.
Remove also VD1,
Hi,
On Mon, Jul 17, 2023 at 07:30:56PM +0200, Andi Shyti wrote:
> In preparation of the next patch allign with the datasheet (BSPEC
> 47112) with the naming of the pipe control set of flag values.
> The variable "flags" in gen12_emit_flush_rcs() is applied as a
> set of flags called Bit Group 1.
Perform some refactoring with the purpose of keeping in one
single place all the operations around the aux table
invalidation.
With this refactoring add more engines where the invalidation
should be performed.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Cc: Jonathan Cavitt
Cc: Nirmoy Das
Cc: #
In preparation of the next patch allign with the datasheet (BSPEC
47112) with the naming of the pipe control set of flag values.
The variable "flags" in gen12_emit_flush_rcs() is applied as a
set of flags called Bit Group 1.
Define also the Bit Group 0 as bit_group_0 where currently only
From: Jonathan Cavitt
For platforms that use Aux CCS, wait for aux invalidation to
complete by checking the aux invalidation register bit is
cleared.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
Cc:
From: Jonathan Cavitt
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
Cc: # v5.8+
---
Fix the 'NV' definition postfix that is supposed to be INV.
Take the chance to also order properly the registers based on
their address and call the GEN12_GFX_CCS_AUX_INV address as
GEN12_CCS_AUX_INV like all the other similar registers.
Remove also VD1, VD3 and VE1 registers that don't exist.
Hi,
as there are new hardware directives, we need a little adaptation
for the AUX invalidation sequence.
In this version we support all the engines affected by this
change.
The stable backport has some challenges because the original
patch that this series fixes has had more changes in between.
From: Tvrtko Ursulin
A silent conflict sneaked in as I was merging
d86ca7e17b58 ("tests/i915_pm_rps: Exercise sysfs thresholds") in a way
that igt_sysfs_set_u32 has became a function returning void.
Assert is now built-in so drop it from the test.
v2:
* Fix invalid value test.
* Assert new
From: Tvrtko Ursulin
A silent conflict sneaked in as I was merging
d86ca7e17b58 ("tests/i915_pm_rps: Exercise sysfs thresholds") in a way
that igt_sysfs_set_u32 has became a function returning void.
Assert is now built-in so drop it from the test.
Signed-off-by: Tvrtko Ursulin
Fixes:
From: Tvrtko Ursulin
User feedback indicates significant performance gains are possible in
specific games with non default RPS up/down thresholds.
Expose these tunables via sysfs which will allow users to achieve best
performance when running games and best power efficiency elsewhere.
Note
From: Tvrtko Ursulin
In preparation for exposing via sysfs add helpers for managing rps
thresholds.
v2:
* Force sw and hw re-programming on threshold change.
Signed-off-by: Tvrtko Ursulin
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
Reviewed-by: Andi Shyti
---
From: Tvrtko Ursulin
Record the default values as preparation for exposing the sysfs controls.
Signed-off-by: Tvrtko Ursulin
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/gt/intel_rps.c | 2
From: Tvrtko Ursulin
Since 36d516be867c ("drm/i915/gt: Switch to manual evaluation of RPS")
thresholds are invariant so lets move their setting to init time.
Signed-off-by: Tvrtko Ursulin
Cc: Rodrigo Vivi
Reviewed-by: Rodrigo Vivi
Reviewed-by: Andi Shyti
---
== Series Details ==
Series: Update AUX invalidation sequence (rev3)
URL : https://patchwork.freedesktop.org/series/119798/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13390 -> Patchwork_119798v3
Summary
---
== Series Details ==
Series: drm/i915: Fix premature release of request's reusable memory (rev2)
URL : https://patchwork.freedesktop.org/series/120170/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13390 -> Patchwork_120170v2
== Series Details ==
Series: drm/i915: Fix premature release of request's reusable memory (rev2)
URL : https://patchwork.freedesktop.org/series/120170/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Fix premature release of request's reusable memory (rev2)
URL : https://patchwork.freedesktop.org/series/120170/
State : warning
== Summary ==
Error: dim checkpatch failed
ac314a80afb2 drm/i915: Fix premature release of request's reusable memory
-:187:
== Series Details ==
Series: Add DSC PPS readout (rev3)
URL : https://patchwork.freedesktop.org/series/120456/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13390 -> Patchwork_120456v3
Summary
---
**FAILURE**
On Mon, Jul 17, 2023 at 03:23:20PM +0200, Geert Uytterhoeven wrote:
> Fix misspellings of "semaphore".
>
> Signed-off-by: Geert Uytterhoeven
> Reviewed-by: Hamza Mahfooz
> ---
> v2:
> - Add Reviewed-by.
> ---
> drivers/gpu/drm/i915/i915_request.c | 2 +-
> drivers/gpu/drm/radeon/cik.c
On Mon, Jul 17, 2023 at 09:34:36AM +0100, Tvrtko Ursulin wrote:
>
> On 14/07/2023 18:22, Rodrigo Vivi wrote:
> > On Tue, Jul 11, 2023 at 05:02:13PM +0100, Tvrtko Ursulin wrote:
> > > From: Tvrtko Ursulin
> > >
> > > Sync spinner API is identical and compatible with regular spinners just
> > >
On 17.07.2023 08:22, Su Hui wrote:
Clang warning: drivers/gpu/drm/i915/display/intel_tv.c:
line 991, column 22 Division by zero.
Assuming tv_mode->oversample=1 and (!tv_mode->progressive)=1,
then division by zero will happen.
Fixes: 1bba5543e4fe ("drm/i915: Fix TV encoder clock computation")
== Series Details ==
Series: Add DSC PPS readout (rev3)
URL : https://patchwork.freedesktop.org/series/120456/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1:
== Series Details ==
Series: Add DSC PPS readout (rev3)
URL : https://patchwork.freedesktop.org/series/120456/
State : warning
== Summary ==
Error: dim checkpatch failed
35e5b6fe7614 drm/i915/vdsc: Refactor dsc register field macro
e09ea59f2e49 drm/i915/vdsc: Add a check for dsc split cases
== Series Details ==
Series: drm/i915/hotplug: Reduce SHPD_FILTER to 250us (rev2)
URL : https://patchwork.freedesktop.org/series/120722/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13390 -> Patchwork_120722v2
Summary
On 7/17/2023 2:51 PM, Andi Shyti wrote:
Perform some refactoring with the purpose of keeping in one
single place all the operations around the aux table
invalidation.
With this refactoring add more engines where the invalidation
should be performed.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add
On 7/17/2023 2:51 PM, Andi Shyti wrote:
From: Jonathan Cavitt
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by:
On 7/17/2023 2:51 PM, Andi Shyti wrote:
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Hi,
Fixes: f6b1772b2555 ('vgaarb: remove the unused irq_set_state argument
to vga_client_register')
Because after applied that patch, there have only one callback mechanism
we can use, not two anymore.
On 2023/7/12 00:43, Sui Jingfeng wrote:
From: Sui Jingfeng
Currently, the strategy
Hi
Am 13.07.23 um 16:41 schrieb Sean Paul:
On Thu, Jul 13, 2023 at 9:04 AM Uwe Kleine-König
wrote:
hello Sean,
On Wed, Jul 12, 2023 at 02:31:02PM -0400, Sean Paul wrote:
I'd really prefer this patch (series or single) is not accepted. This
will cause problems for everyone cherry-picking
On Thu, Jul 13, 2023 at 9:04 AM Uwe Kleine-König
wrote:
>
> hello Sean,
>
> On Wed, Jul 12, 2023 at 02:31:02PM -0400, Sean Paul wrote:
> > I'd really prefer this patch (series or single) is not accepted. This
> > will cause problems for everyone cherry-picking patches to a
> > downstream kernel
On Thu, Jul 13, 2023 at 04:14:55PM +0100, Tvrtko Ursulin wrote:
>
> On 13/07/2023 16:09, Thomas Zimmermann wrote:
> > Hi
> >
> > Am 13.07.23 um 16:41 schrieb Sean Paul:
> > > On Thu, Jul 13, 2023 at 9:04 AM Uwe Kleine-König
> > > wrote:
> > > >
> > > > hello Sean,
> > > >
> > > > On Wed, Jul
Hi
Am 13.07.23 um 17:14 schrieb Tvrtko Ursulin:
On 13/07/2023 16:09, Thomas Zimmermann wrote:
Hi
Am 13.07.23 um 16:41 schrieb Sean Paul:
On Thu, Jul 13, 2023 at 9:04 AM Uwe Kleine-König
wrote:
hello Sean,
On Wed, Jul 12, 2023 at 02:31:02PM -0400, Sean Paul wrote:
I'd really prefer this
hello Sean,
On Wed, Jul 12, 2023 at 02:31:02PM -0400, Sean Paul wrote:
> I'd really prefer this patch (series or single) is not accepted. This
> will cause problems for everyone cherry-picking patches to a
> downstream kernel (LTS or distro tree). I usually wouldn't expect
> sympathy here, but
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