== Series Details ==
Series: drm/i915: Simplify expression &to_i915(dev)->drm
URL : https://patchwork.freedesktop.org/series/121164/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13407_full -> Patchwork_121164v1_full
Summar
== Series Details ==
Series: drm/i915/guc/slpc: Restore efficient freq earlier
URL : https://patchwork.freedesktop.org/series/121150/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13406_full -> Patchwork_121150v1_full
Summa
Hi Tvrtko,
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Friday, July 21, 2023 1:17 AM
> To: Sripada, Radhakrishna ; Yang, Fei
> ; intel-gfx@lists.freedesktop.org
> Cc: sta...@vger.kernel.org; Ville Syrjälä ;
> Wilson,
> Chris P
> Subject: Re: [PATCH v2] drm/i915/dpt: Use shmem fo
On Wed, Jul 12, 2023 at 12:46:04PM +0100, Tvrtko Ursulin wrote:
> $ cat drm.memory.stat
> card0 region=system total=12898304 shared=0 active=0 resident=12111872
> purgeable=167936
> card0 region=stolen-system total=0 shared=0 active=0 resident=0 purgeable=0
>
> Data is generated on demand f
On 7/21/2023 3:08 PM, Belgaumkar, Vinay wrote:
On 7/21/2023 2:23 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 01:44:34PM -0700, Belgaumkar, Vinay wrote:
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done before
On Fri, Jul 21, 2023 at 12:19:32PM -1000, Tejun Heo wrote:
> On Wed, Jul 12, 2023 at 12:46:03PM +0100, Tvrtko Ursulin wrote:
> > + drm.active_us
> > + GPU time used by the group recursively including all child groups.
>
> Maybe instead add drm.stat and have "usage_usec" inside? That'd be more
>
On Wed, Jul 12, 2023 at 12:46:03PM +0100, Tvrtko Ursulin wrote:
> + drm.active_us
> + GPU time used by the group recursively including all child groups.
Maybe instead add drm.stat and have "usage_usec" inside? That'd be more
consistent with cpu side.
Thanks.
--
tejun
On Wed, Jul 12, 2023 at 12:46:00PM +0100, Tvrtko Ursulin wrote:
> +DRM scheduling soft limits
> +~~
Please don't say soft limits for this. It means something different for
memcg, so it gets really confusing. Call it "weight based CPU time control"
and maybe call the trigger
== Series Details ==
Series: drm/i915: Simplify expression &to_i915(dev)->drm
URL : https://patchwork.freedesktop.org/series/121164/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13407 -> Patchwork_121164v1
Summary
---
Hello,
On Wed, Jul 12, 2023 at 12:45:56PM +0100, Tvrtko Ursulin wrote:
> +void drmcgroup_client_migrate(struct drm_file *file_priv)
> +{
> + struct drm_cgroup_state *src, *dst;
> + struct cgroup_subsys_state *old;
> +
> + mutex_lock(&drmcg_mutex);
> +
> + old = file_priv->__css;
>
On 7/21/2023 2:23 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 01:44:34PM -0700, Belgaumkar, Vinay wrote:
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done before the soft min/max frequencies are restored.
When
On Fri, Jul 21, 2023 at 01:44:34PM -0700, Belgaumkar, Vinay wrote:
>
> On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
> > On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
> > > This should be done before the soft min/max frequencies are restored.
> > > When we disable the "Ignore effic
to_i915 is defined as
container_of(dev, struct drm_i915_private, drm);
So for a struct drm_device *dev, to_i915(dev)->drm is just dev. Simplify
accordingly.
Signed-off-by: Uwe Kleine-König
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 ++
drivers/gpu/drm/i915/gt/inte
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done before the soft min/max frequencies are restored.
When we disable the "Ignore efficient frequency" flag, GuC does not
actually bring the requested freq down to RPn.
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
> This should be done before the soft min/max frequencies are restored.
> When we disable the "Ignore efficient frequency" flag, GuC does not
> actually bring the requested freq down to RPn.
>
> Specifically, this scenario-
>
> - i
== Series Details ==
Series: drm/i915/guc/slpc: Restore efficient freq earlier
URL : https://patchwork.freedesktop.org/series/121150/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13406 -> Patchwork_121150v1
Summary
---
On Fri, Jul 21, 2023 at 06:15:10PM +0200, Andi Shyti wrote:
> Enable the CCS_FLUSH bit 13 in the control pipe for render and
> compute engines in platforms starting from Meteor Lake (BSPEC
> 43904 and 47112).
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> engines")
>
On Fri, Jul 21, 2023 at 06:15:07PM +0200, Andi Shyti wrote:
> We always assumed that a device might either have AUX or FLAT
> CCS, but this is an approximation that is not always true, e.g.
> PVC represents an exception.
>
> Set the basis for future finer selection by implementing a
> boolean gen1
On Fri, Jul 21, 2023 at 02:00:52AM -0400, Gupta, Anshuman wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Friday, July 21, 2023 2:34 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Vivi, Rodrigo ; Gupta, Anshuman
> >
> > Subject: [PATCH 3/4] drm/xe: Fix the runtim
On Fri, Jul 21, 2023 at 03:39:35AM -0400, Gupta, Anshuman wrote:
>
>
> > -Original Message-
> > From: Vivi, Rodrigo
> > Sent: Friday, July 21, 2023 2:34 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Vivi, Rodrigo ; Gupta, Anshuman
> >
> > Subject: [PATCH 1/4] drm/xe: Only set PCI d
On Tue, Jul 18, 2023 at 2:44 PM Nathan Chancellor wrote:
>
> A proposed update to clang's -Wconstant-logical-operand to warn when the
> left hand side is a constant shows the following instance in
> nsecs_to_jiffies_timeout() when NSEC_PER_SEC is not a multiple of HZ,
> such as CONFIG_HZ=300:
>
>
== Series Details ==
Series: Update AUX invalidation sequence (rev9)
URL : https://patchwork.freedesktop.org/series/119798/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13406 -> Patchwork_119798v9
Summary
---
**FAIL
== Series Details ==
Series: series starting with [v2,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121131/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13404_full -> Patchwork_121131v1_full
===
This should be done before the soft min/max frequencies are restored.
When we disable the "Ignore efficient frequency" flag, GuC does not
actually bring the requested freq down to RPn.
Specifically, this scenario-
- ignore efficient freq set to true
- reduce min to RPn (from efficient)
- suspend
== Series Details ==
Series: Update AUX invalidation sequence (rev9)
URL : https://patchwork.freedesktop.org/series/119798/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:11
== Series Details ==
Series: Update AUX invalidation sequence (rev9)
URL : https://patchwork.freedesktop.org/series/119798/
State : warning
== Summary ==
Error: dim checkpatch failed
ab141e3c4e99 drm/i915/gt: Cleanup aux invalidation registers
4a7a6c513e10 drm/i915: Add the gen12_needs_ccs_aux
> WA_22016122933 was recently applied to all MeteorLake engines,
> which is simultaneously too broad (should only apply to Media
> engines) and too specific (should apply to all platforms that
> use the same media engine as MeteorLake). Correct this in
> cases where coherency settings are modified
The following changes since commit d3f66064cf43bd7338a79174bd0ff60c4ecbdf6d:
Partially revert "amdgpu: DMCUB updates for DCN 3.1.4 and 3.1.5" (2023-07-07
15:24:32 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware mtl_gsc_1636
for you to fetch cha
> Refactor i915_coherent_map_type to be GT-centric rather than device-centric.
> Each GT may require different coherency handling due to hardware workarounds.
>
> Suggested-by: Matt Roper
> Signed-off-by: Jonathan Cavitt
Acked-by: Fei Yang
> ---
> drivers/gpu/drm/i915/display/intel_hdcp_gsc
== Series Details ==
Series: series starting with [v1,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121129/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13404_full -> Patchwork_121129v1_full
===
Just a trivial refactoring for reducing the number of code
duplicate. This will come at handy in the next commits.
Meantime, propagate the error to the above layers if we fail to
emit the pipe control.
Signed-off-by: Andi Shyti
Cc: # v5.8+
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 47
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Cc: Jonathan Cavitt
Cc: Nirmoy Das
Cc: # v5.
From: Jonathan Cavitt
For platforms that use Aux CCS, wait for aux invalidation to
complete by checking the aux invalidation register bit is
cleared.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
Cc: #
Perform some refactoring with the purpose of keeping in one
single place all the operations around the aux table
invalidation.
With this refactoring add more engines where the invalidation
should be performed.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed
From: Jonathan Cavitt
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt
Signed-off-by: Andi Shyti
Cc: # v5.8+
Reviewed-by: Nir
Commit af9e423a8aae ("drm/i915/gt: Ensure memory quiesced before
invalidation") has made sure that the memory is quiesced before
invalidating the AUX CCS table. Do it for all the other engines
and not just RCS.
Signed-off-by: Andi Shyti
Cc: Jonathan Cavitt
Cc: Matt Roper
Cc: # v5.8+
---
drive
In preparation of the next patch align with the datasheet (BSPEC
47112) with the naming of the pipe control set of flag values.
The variable "flags" in gen12_emit_flush_rcs() is applied as a
set of flags called Bit Group 1.
Define also the Bit Group 0 as bit_group_0 where currently only
PIPE_CONTR
We always assumed that a device might either have AUX or FLAT
CCS, but this is an approximation that is not always true, e.g.
PVC represents an exception.
Set the basis for future finer selection by implementing a
boolean gen12_needs_ccs_aux_inv() function that tells whether aux
invalidation is ne
Fix the 'NV' definition postfix that is supposed to be INV.
Take the chance to also order properly the registers based on
their address and call the GEN12_GFX_CCS_AUX_INV address as
GEN12_CCS_AUX_INV like all the other similar registers.
Remove also VD1, VD3 and VE1 registers that don't exist and
Hi,
as there are new hardware directives, we need a little adaptation
for the AUX invalidation sequence.
In this version we support all the engines affected by this
change.
The stable backport has some challenges because the original
patch that this series fixes has had more changes in between.
== Series Details ==
Series: drm/i915: use direct alias for i915 in requests (rev3)
URL : https://patchwork.freedesktop.org/series/120991/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13404_full -> Patchwork_120991v3_full
> -Original Message-
> From: dri-devel On Behalf Of Tvrtko
> Ursulin
> Sent: Friday, July 21, 2023 6:08 AM
> To: Intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Ursulin, Tvrtko
> Subject: [PATCH] drm/i915: Use the i915_vma_flush_writes helper
>
> From: Tvrtko Ur
On Thu, Jul 20, 2023 at 09:28:56PM -0700, Yang, Fei wrote:
> >>> [snip]
> > @@ -27,15 +28,8 @@ static bool gpu_write_needs_clflush(struct
> > drm_i915_gem_object *obj)
>
> The code change here looks accurate, but while we're here, I have a
> side question about this function
On Fri, Jul 21, 2023 at 02:46:35PM -, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [v2,1/1] drm/i915: Move abs_diff() to math.h
> URL : https://patchwork.freedesktop.org/series/121131/
> State : warning
>
> == Summary ==
>
> Error: dim checkpatch failed
> 543baa
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make
i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_121133v1
===
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make
i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make
i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : warning
== Summary ==
Error: dim checkpatch failed
20d96369b3a6 drm/i915: Make i915_coherent_map_type GT-centric
-
== Series Details ==
Series: series starting with [v2,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121131/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_121131v1
Hi,
Here's this week drm-misc-next PR
Thanks!
Maxime
The following changes since commit 36672dda2eb715af99e9abbcdc400d46598b691c:
drm/loongson: Remove a useless check in cursor_plane_atomic_async_check()
(2023-07-13 01:24:42 +0800)
are available in the Git repository at:
ssh://git.freede
== Series Details ==
Series: series starting with [v2,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121131/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [v2,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121131/
State : warning
== Summary ==
Error: dim checkpatch failed
543baaccedcc drm/i915: Move abs_diff() to math.h
-:142: CHECK:SPACING: No space is ne
== Series Details ==
Series: series starting with [v1,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121129/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_121129v1
Refactor i915_coherent_map_type to be GT-centric rather than
device-centric. Each GT may require different coherency
handling due to hardware workarounds.
Suggested-by: Matt Roper
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c| 2 +-
drivers/gpu/drm/i
WA_22016122933 was recently applied to all MeteorLake engines, which is
simultaneously too broad (should only apply to Media engines) and too
specific (should apply to all platforms that use the same media engine
as MeteorLake). Correct this in cases where coherency settings are
modified.
There w
== Series Details ==
Series: series starting with [v1,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121129/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: series starting with [v1,1/1] drm/i915: Move abs_diff() to math.h
URL : https://patchwork.freedesktop.org/series/121129/
State : warning
== Summary ==
Error: dim checkpatch failed
751919dc6c9b drm/i915: Move abs_diff() to math.h
-:118: CHECK:SPACING: No space is ne
Hi Janusz,
> > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > index 3ded597f002a2..30fb4e0af6134 100644
> > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > @@ -165,9 +165,36 @@ static u
== Series Details ==
Series: drm/i915: Use the i915_vma_flush_writes helper
URL : https://patchwork.freedesktop.org/series/121122/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_121122v1
Summary
---
abs_diff() belongs to math.h. Move it there.
This will allow others to use it.
Signed-off-by: Andy Shevchenko
---
v2: better header location on ipu-v3, converted omap-serial as well
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 +
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 7 ---
On Fri, Jul 21, 2023 at 04:42:35PM +0300, Andy Shevchenko wrote:
> abs_diff() belongs to math.h. Move it there.
> This will allow others to use it.
Sorry, forgot omap-serial case.
Will be v2 soon.
--
With Best Regards,
Andy Shevchenko
abs_diff() belongs to math.h. Move it there.
This will allow others to use it.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 1 +
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 7 ---
drivers/gpu/ipu-v3/ipu-image-convert.c| 14 ++
d
Hi Andi,
On Thursday, 20 July 2023 23:07:37 CEST Andi Shyti wrote:
> Perform some refactoring with the purpose of keeping in one
> single place all the operations around the aux table
> invalidation.
>
> With this refactoring add more engines where the invalidation
> should be performed.
>
> Fix
== Series Details ==
Series: drm/i915: use direct alias for i915 in requests (rev3)
URL : https://patchwork.freedesktop.org/series/120991/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_120991v3
Summary
--
From: Tvrtko Ursulin
We can use the existing helper in flush_write_domain() and save some lines
of code.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_doma
On 21/07/2023 05:28, Yang, Fei wrote:
[snip]
@@ -27,15 +28,8 @@ static bool gpu_write_needs_clflush(struct
drm_i915_gem_object *obj)
The code change here looks accurate, but while we're here, I have a
side question about this function in general...it was originally
introduced in commit 48004
== Series Details ==
Series: drm/i915: use direct alias for i915 in requests (rev3)
URL : https://patchwork.freedesktop.org/series/120991/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: use direct alias for i915 in requests (rev3)
URL : https://patchwork.freedesktop.org/series/120991/
State : warning
== Summary ==
Error: dim checkpatch failed
441eb942f415 drm/i915: use direct alias for i915 in requests
-:138: WARNING:AVOID_BUG: Do not cr
Hi Janusz,
On Fri, Jul 21, 2023 at 12:10:22PM +, Krzysztofik, Janusz wrote:
> Hi Andi,
>
> On Thursday, 20 July 2023 23:07:35 CEST Andi Shyti wrote:
> > Commit af9e423a8aae
>
> You can't use this commit ID, it is invalid (the patch you are referring to
> belongs to your series, then is not
On Fri, Jul 21, 2023 at 12:03:37AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Fix connector HPD polling
> URL : https://patchwork.freedesktop.org/series/121050/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_13399_full -> Patchwork_121050v1_f
== Series Details ==
Series: drm/i915/tc: some clean-ups in max lane count handling code (rev3)
URL : https://patchwork.freedesktop.org/series/120980/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13403 -> Patchwork_120980v3
Hi Andi,
On Thursday, 20 July 2023 23:07:35 CEST Andi Shyti wrote:
> Commit af9e423a8aae
You can't use this commit ID, it is invalid (the patch you are referring to
belongs to your series, then is not available in any official repository,
hence no stable commit ID yet).
> ("drm/i915/gt: Ensur
Hi Janusz,
> > Enable the CCS_FLUSH bit 13 in the control pipe for render and
> > compute engines in platforms starting from Meteor Lake (BSPEC
> > 43904 and 47112).
> >
> > Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> > engines")
>
> I'm not sure why you think that
Hi Andi,
On Thursday, 20 July 2023 23:07:34 CEST Andi Shyti wrote:
> Just a trivial refactoring for reducing the number of code
> duplicate. This will come at handy in the next commits.
>
> Signed-off-by: Andi Shyti
> Cc: # v5.8+
> ---
> drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 44 ++
Hi Andi,
On Thursday, 20 July 2023 23:07:33 CEST Andi Shyti wrote:
> Enable the CCS_FLUSH bit 13 in the control pipe for render and
> compute engines in platforms starting from Meteor Lake (BSPEC
> 43904 and 47112).
>
> Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all
> eng
It is irrelevant for the caller that the max lane count is being
derived from a FIA register, so having "fia" in the function name is
irrelevant. Rename the function accordingly.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 2 +-
drivers/gpu/drm/i915/display/int
This function doesn't really return the pin assignment mask, but the
max lane count derived from that. So rename the function to
mtl_tc_port_get_max_lane_count() to better reflect what it really does.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 4 ++--
1 file change
This makes the code a bit more symmetric and readable, especially when
we start adding more display version-specific alternatives.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 32 +++--
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git
Hi,
Here are four patches with some clean-ups in the code that handles the
max lane count of Type-C connections.
This is done mostly in preparation for a new way to read the pin
assignments and lane count in future devices.
In v2:
* Fix some rebasing damage.
In v3:
* Fixed "assigment" typ
This function is only used locally, so make it static and remove the
definition from the header file.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_tc.c | 2 +-
drivers/gpu/drm/i915/display/intel_tc.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/driver
Hi Andrzej,
> > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > index 7566c89d9def3..9d050b9a19194 100644
> > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
> > @@ -218,6 +218,13 @@ int gen
On 20.07.2023 23:07, Andi Shyti wrote:
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Cc: Jo
On Fri, Jul 21, 2023 at 12:10:48PM +0200, Andrzej Hajda wrote:
> On 20.07.2023 23:07, Andi Shyti wrote:
> > Just a trivial refactoring for reducing the number of code
> > duplicate. This will come at handy in the next commits.
> >
> > Signed-off-by: Andi Shyti
> > Cc: # v5.8+
> > ---
> > drive
On 20.07.2023 23:07, Andi Shyti wrote:
Just a trivial refactoring for reducing the number of code
duplicate. This will come at handy in the next commits.
Signed-off-by: Andi Shyti
Cc: # v5.8+
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 44 +---
1 file changed, 23 inse
Hi Nirmoy,
On Fri, Jul 21, 2023 at 12:05:10PM +0200, Andrzej Hajda wrote:
> On 20.07.2023 23:07, Andi Shyti wrote:
> > Enable the CCS_FLUSH bit 13 in the control pipe for render and
> > compute engines in platforms starting from Meteor Lake (BSPEC
> > 43904 and 47112).
> >
> > Fixes: 972282c4cf24
On 20.07.2023 23:07, Andi Shyti wrote:
Enable the CCS_FLUSH bit 13 in the control pipe for render and
compute engines in platforms starting from Meteor Lake (BSPEC
43904 and 47112).
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Andi Shyti
Cc: Jo
Hi Janusz,
On Fri, Jul 21, 2023 at 09:25:03AM +, Krzysztofik, Janusz wrote:
> Hi Andy,
>
> On Thursday, 20 July 2023 23:07:30 CEST Andi Shyti wrote:
> > We always assumed that a device might either have AUX or FLAT
> > CCS, but this is an approximation that is not always true
>
> If there e
Hi Andrzej,
On Fri, Jul 21, 2023 at 11:41:22AM +0200, Andrzej Hajda wrote:
> On 20.07.2023 23:07, Andi Shyti wrote:
> > We always assumed that a device might either have AUX or FLAT
> > CCS, but this is an approximation that is not always true as it
> > requires some further per device checks.
> >
On 20.07.2023 23:07, Andi Shyti wrote:
We always assumed that a device might either have AUX or FLAT
CCS, but this is an approximation that is not always true as it
requires some further per device checks.
Add the "has_aux_ccs" flag in the intel_device_info structure in
order to have a per devic
Hi Andy,
On Thursday, 20 July 2023 23:07:30 CEST Andi Shyti wrote:
> We always assumed that a device might either have AUX or FLAT
> CCS, but this is an approximation that is not always true
If there exists a device that can have CCSs that fall into either none or both
of those categories then
On 20/07/2023 18:02, Sripada, Radhakrishna wrote:
Hi Tvrtko,
-Original Message-
From: Tvrtko Ursulin
Sent: Thursday, July 20, 2023 2:17 AM
To: Yang, Fei ; Sripada, Radhakrishna
; intel-gfx@lists.freedesktop.org
Cc: sta...@vger.kernel.org; Ville Syrjälä ;
Wilson,
Chris P
Subject: Re
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Friday, July 21, 2023 2:34 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vivi, Rodrigo ; Gupta, Anshuman
>
> Subject: [PATCH 2/4] drm/xe: Move d3cold_allowed decision all together.
>
> And let's use the VRAM threshold to keep d3cold
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Friday, July 21, 2023 2:34 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vivi, Rodrigo ; Gupta, Anshuman
>
> Subject: [PATCH 1/4] drm/xe: Only set PCI d3cold_allowed when we are
> really allowing.
>
> First of all it was strange to s
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Friday, July 21, 2023 2:34 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Vivi, Rodrigo ; Gupta, Anshuman
>
> Subject: [PATCH 4/4] drm/xe: Only init runtime PM after all d3cold config is
> in
> place.
>
> We cannot allow runtime pm s
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