== Series Details ==
Series: drm/i915/dg2: Wa_22014600077 also applies to DG2-G12
URL : https://patchwork.freedesktop.org/series/126610/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13890 -> Patchwork_126610v1
Summary
On Fri, Nov 17, 2023 at 04:44:46PM -0800, Matt Roper wrote:
> This workaround now applies to all variants of DG2 so move it to the
> corresponding block.
>
> Signed-off-by: Matt Roper
Actually let's hold on this patch for now...I'm seeing some conflicting
information indicating that maybe we
This workaround now applies to all variants of DG2 so move it to the
corresponding block.
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
On Sat, Nov 11, 2023 at 01:43:20PM +0200, Vinod Govindapillai wrote:
> FIFO underruns are observed when FBC is enabled on plane 2 or
> plane 3. Recommended WA is to update the FBC enabling sequence.
> The plane binding register bits need to be updated separately
> before programming the FBC enable
== Series Details ==
Series: drm/xe/uapi: Fix various struct padding for 64b alignment
URL : https://patchwork.freedesktop.org/series/126603/
State : failure
== Summary ==
Error: patch
https://patchwork.freedesktop.org/api/1.0/series/126603/revisions/1/mbox/ not
applied
Applying:
On Mon, Jan 30, 2023 at 03:38:05PM +0530, Chaitanya Kumar Borah wrote:
Separate out RPLU device ids and add them to both RPL and
newly created RPL-U subplatforms.
v2: (Matt)
- Sort PCI-IDs numerically
- Name the sub-platform to accurately depict what it is for
- Make RPL-U part of RPL
On Tue, Nov 14, 2023 at 10:13:59PM -0500, Rodrigo Vivi wrote:
> On Sun, Nov 05, 2023 at 05:27:03PM +, Paz Zcharya wrote:
> > Fix the value of variable `phys_base` to be the relative offset in
> > stolen memory, and not the absolute offset of the GSM.
>
> to me it looks like the other way
On 11/16/2023 12:44 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. However, the trace logs use the uabi class and
instance to identify the engine, so leaving uabi class unset makes the
GSC CS show up
On Thu, Nov 16, 2023 at 01:46:25PM -0800, Matt Roper wrote:
> On Thu, Nov 16, 2023 at 01:25:11PM -0800, Radhakrishna Sripada wrote:
> > Commit 78cc55e0b64c ("drm/i915/mcr: Hold GT forcewake during steering
> > operations")
> > introduced the workaround which was in early stages. With a valid
> >
== Series Details ==
Series: series starting with [1/3] drm/i915/fbc: Split plane size vs. surface
size checks apart
URL : https://patchwork.freedesktop.org/series/126594/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13888 -> Patchwork_126594v1
On Thu, Nov 16, 2023 at 09:58:06AM +0100, Hans de Goede wrote:
> On 11/3/23 21:18, Andy Shevchenko wrote:
> > DSI code for VBT has a set of ugly GPIO hacks, one of which is direct
> > talking to GPIO IP behind the actual driver's back. A second attempt
> > to fix that is here.
> >
> > If I
On Thu, Nov 16, 2023 at 12:15:03PM +0200, Jani Nikula wrote:
> On Thu, 16 Nov 2023, Hans de Goede wrote:
> > Ok, this now has been testen on both a BYT and a CHT device which
> > actually use GPIO controls in their MIPI sequences so this
> > series is:
> >
> > Tested-by: Hans de Goede
> >
> >
On Fri, Nov 17, 2023 at 05:49:03AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/dg2: Wa_18028616096 now applies to all DG2
> URL : https://patchwork.freedesktop.org/series/126488/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_13881_full ->
== Series Details ==
Series: series starting with [1/3] drm/i915/fbc: Split plane size vs. surface
size checks apart
URL : https://patchwork.freedesktop.org/series/126594/
State : warning
== Summary ==
Error: dim checkpatch failed
fb15693f91d5 drm/i915/fbc: Split plane size vs. surface size
On Fri, 2023-11-17 at 15:48 -0500, Rodrigo Vivi wrote:
> Let's respect Documentation/process/botching-up-ioctls.rst
> and add the proper padding for a 64b alignment with all as
> well as all the required checks and settings for the pads
> and the reserved entries.
>
> v2: Fix remaining wholes and
Let's respect Documentation/process/botching-up-ioctls.rst
and add the proper padding for a 64b alignment with all as
well as all the required checks and settings for the pads
and the reserved entries.
v2: Fix remaining wholes and double check with pahole (Jose)
Ensure with pahole that both
== Series Details ==
Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL : https://patchwork.freedesktop.org/series/126526/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13888 -> Patchwork_126526v5
== Series Details ==
Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL : https://patchwork.freedesktop.org/series/126526/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Fix UHBR data, link M/N/TU and PBN values (rev5)
URL : https://patchwork.freedesktop.org/series/126526/
State : warning
== Summary ==
Error: dim checkpatch failed
6342447c744c drm/dp_mst: Store the MST PBN divider value in fixed point format
-:45:
== Series Details ==
Series: drm/i915/display: Use int type for entry_setup_frames (rev2)
URL : https://patchwork.freedesktop.org/series/126513/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13888 -> Patchwork_126513v2
On Fri, Nov 17, 2023 at 06:21:07PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 05:09:27PM +0200, Imre Deak wrote:
> > The current way of calculating the pbn_div value, the link BW per each
> > MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> > rates calculating with
== Series Details ==
Series: drm/i915: eliminate warnings (rev2)
URL : https://patchwork.freedesktop.org/series/126338/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13888 -> Patchwork_126338v2
Summary
---
Quoting Matt Roper (2023-11-15 15:21:18-03:00)
>The workaround database was just updated to extend this workaround to
>DG2-G11 (whereas previously it applied only to G10 and G12).
>
>Signed-off-by: Matt Roper
Reviewed-by: Gustavo Sousa
>---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
On Friday, 17 November 2023 17:48:03 CET Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/vma: Fix VMA UAF on destroy against deactivate race (rev2)
> URL : https://patchwork.freedesktop.org/series/126530/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
From: Ville Syrjälä
IVB Bspec says:
"Frame Buffer Compression is only supported with memory surfaces of 4096 lines
or less and pipe source sizes of 4096 pixels by 2048 lines or less. "
so seems like we should be able to bump the offset+size limit to
at least 4kx4k. Make it so.
Signed-off-by:
From: Ville Syrjälä
FBC on icl+ should supposedly be fine with surface sizes up to
8kx4k. Bump up the limit.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
From: Ville Syrjälä
Do separate checks for the visible plane size vs. the surface
size (which I take to mean offset+size). For now both use the
same max w/h, but we can relax the surface size limits as
a followup.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fbc.c | 32
On Fri, 2023-11-17 at 11:50 -0500, Rodrigo Vivi wrote:
> On Fri, Nov 17, 2023 at 11:26:44AM +0200, Ville Syrjälä wrote:
> > On Fri, Nov 17, 2023 at 10:41:43AM +0200, Ville Syrjälä wrote:
> > > On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> > > > Thanks for your comments, Ville!
On Thu, Nov 16, 2023 at 03:18:41PM +0200, Imre Deak wrote:
> Reuse intel_dp_max_data_rate() and intel_dp_effective_data_rate() in
> intel_link_compute_m_n(), instead of open-coding the equivalent. Note
> the kbit/sec -> kByte/sec unit change in the M/N values, but this not
> reducing the
On Thu, Nov 16, 2023 at 03:18:40PM +0200, Imre Deak wrote:
> Simplify intel_dp_max_data_rate() using
> drm_dp_bw_channel_coding_efficiency() to calculate the max data rate for
> both DP1.4 and UHBR link rates. This trades a redundant multiply/divide
> for readability.
>
> Cc: Jani Nikula
>
On Fri, Nov 17, 2023 at 10:07 AM Gustavo Sousa wrote:
>
> The following changes since commit 6723a8d9092325d00a125a1b3ca058644f74d314:
>
> Merge branch 'robot/pr-5-1700153542' into 'main' (2023-11-16 16:54:38 +)
>
> are available in the Git repository at:
>
>
On Fri, Nov 17, 2023 at 11:26:44AM +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 10:41:43AM +0200, Ville Syrjälä wrote:
> > On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> > > Thanks for your comments, Ville!
> > >
> > > On Fri, 2023-11-17 at 09:19 +0200, Ville Syrjälä
On Fri, Nov 17, 2023 at 05:09:27PM +0200, Imre Deak wrote:
> The current way of calculating the pbn_div value, the link BW per each
> MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> rates calculating with the correct channel coding efficiency based on
> the link rate.
>
>
On Fri, Nov 17, 2023 at 05:27:37PM +0200, Imre Deak wrote:
> Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> and UHBR link configurations.
>
> v2:
> - List test cases in decreasing rate,lane count order matching the
> corresponding DP Standard tables. (Ville)
> - Add
On Fri, Nov 17, 2023 at 12:02:27PM +0200, Jouni Högander wrote:
> Currently we are enabling selective fetch for all planes that are visible.
> This is suboptimal as we might be fetching for memory for planes that are
> not part of selective update.
>
> Fix this by adding proper handling for
On Fri, Nov 17, 2023 at 12:02:26PM +0200, Jouni Högander wrote:
> Currently selective fetch configuration for planes is implemented in psr
> code. More suitable place for this code is where everything else is
> configured for planes -> move it into skl_universal_plane.c and
> intel_cursor.c. This
Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.
v2:
- List test cases in decreasing rate,lane count order matching the
corresponding DP Standard tables. (Ville)
- Add references to the DP Standard tables.
v3:
- Sort the testcases properly.
Atm the allocated MST PBN value is calculated from the TU size (number
of allocated MTP slots) as
PBN = TU * pbn_div
pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this
worked, as pbn_div there is guraranteed to be an integer number, however
on UHBR this isn't the case. To
Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
and UHBR link configurations.
v2:
- List test cases in decreasing rate,lane count order matching the
corresponding DP Standard tables. (Ville)
- Add references to the DP Standard tables.
Cc: Ville Syrjälä
Cc: Lyude Paul
The current way of calculating the pbn_div value, the link BW per each
MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
rates calculating with the correct channel coding efficiency based on
the link rate.
v2:
- Return the fractional pbn_div value from
The following changes since commit 6723a8d9092325d00a125a1b3ca058644f74d314:
Merge branch 'robot/pr-5-1700153542' into 'main' (2023-11-16 16:54:38 +)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware mtl_dmc_2.19
for you to fetch changes up to
Hi Janusz,
On Thu, Nov 16, 2023 at 03:07:20PM +0100, Janusz Krzysztofik wrote:
> Object debugging tools were sporadically reporting illegal attempts to
> free a still active i915 VMA object from when parking a GPU tile believed
> to be idle.
>
> [161.359441] ODEBUG: free active (active state 0)
On Fri, Nov 17, 2023 at 01:04:02PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:33PM +0200, Imre Deak wrote:
> > Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> > and UHBR link configurations.
> >
> > Cc: Lyude Paul
> > Cc: dri-de...@lists.freedesktop.org
On Fri, Nov 17, 2023 at 12:56:36PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:31PM +0200, Imre Deak wrote:
> > On UHBR links the PBN divider is a fractional number, accordingly store
> > it in fixed point format. For now drm_dp_get_vc_payload_bw() always
> > returns a whole number
On Fri, Nov 17, 2023 at 01:00:58PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 03:18:32PM +0200, Imre Deak wrote:
> > The current way of calculating the pbn_div value, the link BW per each
> > MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> > rates calculating with
Current, the dewake_scanline variable is defined as unsigned int,
an unsigned int variable that is always greater than or equal to 0.
when _intel_dsb_commit function is called by intel_dsb_commit function,
the dewake_scanline variable may have an int value.
So the dewake_scanline variable is
On Tue, 14 Nov 2023, Jani Nikula wrote:
> Considering what the functions do, intel_dpll.c is a more suitable
> location, and lets us make some functions static while at it.
>
> This also means intel_display.c no longer does any DPIO access.
>
> Reviewed-by: Ville Syrjälä
> Signed-off-by: Jani
On Tue, 14 Nov 2023, Rodrigo Vivi wrote:
> On Tue, Nov 14, 2023 at 05:55:28PM +0200, Jani Nikula wrote:
>> Like the comment says,
>>
>> /* Grouping using anonymous structs. Keep sorted. */
>>
>> Stick to it.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Rodrigo Vivi
Thanks, pushed
On 17/11/2023 12:21, Coelho, Luciano wrote:
Adding Tvrtko, for some reason he didn't get CCed before.
On Fri, 2023-11-17 at 11:26 +0200, Ville Syrjälä wrote:
On Fri, Nov 17, 2023 at 10:41:43AM +0200, Ville Syrjälä wrote:
On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
Adding Tvrtko, for some reason he didn't get CCed before.
On Fri, 2023-11-17 at 11:26 +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 10:41:43AM +0200, Ville Syrjälä wrote:
> > On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> > > Thanks for your comments, Ville!
> > >
>
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Separate xe and i915
common dpt code into own file (rev3)
URL : https://patchwork.freedesktop.org/series/126538/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13886 -> Patchwork_126538v3
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Separate xe and i915
common dpt code into own file (rev3)
URL : https://patchwork.freedesktop.org/series/126538/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Separate xe and i915
common dpt code into own file (rev3)
URL : https://patchwork.freedesktop.org/series/126538/
State : warning
== Summary ==
Error: dim checkpatch failed
2b7246633d13 drm/i915/display: Separate xe and
On Thu, Nov 16, 2023 at 03:18:39PM +0200, Imre Deak wrote:
> Callers of intel_dp_max_data_rate() use the return value as an upper
> bound for the BW a given mode requires. As such the rounding shouldn't
> result in a bigger value than the actual upper bound. Use round-down
> instead of -closest
On Fri, 2023-11-17 at 13:09 +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 12:02:27PM +0200, Jouni Högander wrote:
> > Currently we are enabling selective fetch for all planes that are
> > visible.
> > This is suboptimal as we might be fetching for memory for planes
> > that are
> > not
On Fri, Nov 17, 2023 at 12:02:27PM +0200, Jouni Högander wrote:
> Currently we are enabling selective fetch for all planes that are visible.
> This is suboptimal as we might be fetching for memory for planes that are
> not part of selective update.
>
> Fix this by adding proper handling for
On Thu, Nov 16, 2023 at 03:18:33PM +0200, Imre Deak wrote:
> Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4
> and UHBR link configurations.
>
> Cc: Lyude Paul
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Imre Deak
> ---
>
On Thu, Nov 16, 2023 at 03:18:32PM +0200, Imre Deak wrote:
> The current way of calculating the pbn_div value, the link BW per each
> MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR
> rates calculating with the correct channel coding efficiency based on
> the link rate.
>
>
On Thu, Nov 16, 2023 at 03:18:31PM +0200, Imre Deak wrote:
> On UHBR links the PBN divider is a fractional number, accordingly store
> it in fixed point format. For now drm_dp_get_vc_payload_bw() always
> returns a whole number and all callers will use only the integer part of
> it which should
== Series Details ==
Series: Implement sel_fetch disable for planes (rev3)
URL : https://patchwork.freedesktop.org/series/114224/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13885 -> Patchwork_114224v3
Summary
---
On Thu, Nov 16, 2023 at 02:48:52PM +0100, Maarten Lankhorst wrote:
> Hi Dave, Daniel,
>
> Small pull request, mostly nouveau fixes.
>
> Cheers,
> ~Maarten
>
> Mostly drm-misc-fixes-2023-11-16:
> Assorted fixes for v6.7-rc2:
> - Nouveau GSP fixes.
> - Fix nouveau driver load without display.
> -
== Series Details ==
Series: Implement sel_fetch disable for planes (rev3)
URL : https://patchwork.freedesktop.org/series/114224/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Implement sel_fetch disable for planes (rev3)
URL : https://patchwork.freedesktop.org/series/114224/
State : warning
== Summary ==
Error: dim checkpatch failed
405a5d68bca3 drm/i915/psr: Move plane sel fetch configuration into plane source
files
-:50:
Currently we are enabling selective fetch for all planes that are visible.
This is suboptimal as we might be fetching for memory for planes that are
not part of selective update.
Fix this by adding proper handling for disabling plane selective fetch:
If plane previously part of selective update
Currently selective fetch configuration for planes is implemented in psr
code. More suitable place for this code is where everything else is
configured for planes -> move it into skl_universal_plane.c and
intel_cursor.c. This also allows us to drop hooks for cursor handling.
v2: Removed setting
Move plane sel fetch configuration into plane source files and
implement selective fetch disable for planes that are not part of
selective update.
v2:
- Move some changes from patch 1. to patch 2.
Cc: Ville Syrjälä
Cc: Mika Kahola
Jouni Högander (2):
drm/i915/psr: Move plane sel fetch
Hi,
Here's the first drm-misc-next PR for what will become 6.8.
There's one missing SoB on the commit 0da611a87021 ("dma-buf: add
dma_fence_timestamp helper") from the committer. They provided their SoB
on the ML here after the facts:
On Fri, Nov 17, 2023 at 09:14:31AM +0200, Ville Syrjälä wrote:
> On Thu, Nov 09, 2023 at 04:34:50PM +0100, Maarten Lankhorst wrote:
> > For the atomic codepath we unpin_work in old_plane_state to unpin the
> > old fb. As this happened after swapping state, this is allowed.
> >
> > Use the
On Fri, Nov 17, 2023 at 10:41:43AM +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> > Thanks for your comments, Ville!
> >
> > On Fri, 2023-11-17 at 09:19 +0200, Ville Syrjälä wrote:
> > > On Thu, Nov 16, 2023 at 01:27:00PM +0200, Luca Coelho wrote:
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Thursday, November 16, 2023 6:49 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 07/11] drm/i915/dp_mst: Calculate the BW
> overhead in intel_dp_mst_find_vcpi_slots_for_bpp()
>
> The next
== Series Details ==
Series: drm/i915: use ref_tracker library in i915 (rev4)
URL : https://patchwork.freedesktop.org/series/125770/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13885 -> Patchwork_125770v4
Summary
---
== Series Details ==
Series: drm/i915: use ref_tracker library in i915 (rev4)
URL : https://patchwork.freedesktop.org/series/125770/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: use ref_tracker library in i915 (rev4)
URL : https://patchwork.freedesktop.org/series/125770/
State : warning
== Summary ==
Error: dim checkpatch failed
8742c98b7241 drm/i915: Replace custom intel runtime_pm tracker with ref_tracker
library
-:441:
On Fri, 2023-11-17 at 10:41 +0200, Ville Syrjälä wrote:
> On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> > Thanks for your comments, Ville!
> >
> > On Fri, 2023-11-17 at 09:19 +0200, Ville Syrjälä wrote:
> > > On Thu, Nov 16, 2023 at 01:27:00PM +0200, Luca Coelho wrote:
> > >
On Fri, Nov 17, 2023 at 08:05:21AM +, Coelho, Luciano wrote:
> Thanks for your comments, Ville!
>
> On Fri, 2023-11-17 at 09:19 +0200, Ville Syrjälä wrote:
> > On Thu, Nov 16, 2023 at 01:27:00PM +0200, Luca Coelho wrote:
> > > Since we're abstracting the display code from the underlying
Thanks for your comments, Ville!
On Fri, 2023-11-17 at 09:19 +0200, Ville Syrjälä wrote:
> On Thu, Nov 16, 2023 at 01:27:00PM +0200, Luca Coelho wrote:
> > Since we're abstracting the display code from the underlying driver
> > (i.e. i915 vs xe), we can't use the uncore's spinlock to protect
> >
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