Looks good.
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Intel-gfx On Behalf Of Matt
> Roper
> Sent: Friday, March 4, 2022 3:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 1/2] drm/i91
Apart from checking if squashing can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++--
1 file changed, 11
Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++---
1 file changed, 11
to intel_cdclk_squash()
and intel_cdclk_crawl().
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 115 +++--
1 file changed, 81 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display
This is a prep patch for what the rest of the series does.
Add existing actions that change cdclk - squash, crawl, modeset to
intel_cdclk_state so we have access to the cdclk values
that are in transition.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display
() and intel_cdclk_needs_modeset() have changes
to accommodate this.
v2: Introduce intel_cdclk_modeset() instead of cramming
all changes into intel_cdclk_needs_modeset().
Cc: Stanislav Lisovskiy
Anusha Srivatsa (5):
drm/i915/display: Add CDCLK actions to intel_cdclk_state
drm/i915/display: s
Checked the logs, a lot of machines not showing tests results even though
igt_run.txt shows as PASS for most. The boot log shows ACL errors in
/var/log/journal/ , sending the series again.
Anusha
From: Patchwork
Sent: Friday, March 11, 2022 12:55 AM
To: Srivatsa, Anusha
Cc: intel-gfx
Apart from checking if squashing can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++--
1 file changed, 11
Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++---
1 file changed, 11
to intel_cdclk_squash()
and intel_cdclk_crawl().
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 115 +++--
1 file changed, 81 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display
() and intel_cdclk_needs_modeset() have changes
to accommodate this.
v2: Introduce intel_cdclk_modeset() instead of cramming
all changes into intel_cdclk_needs_modeset().
Cc: Stanislav Lisovskiy
Anusha Srivatsa (5):
drm/i915/display: Add CDCLK actions to intel_cdclk_state
drm/i915/display: s
This is a prep patch for what the rest of the series does.
Add existing actions that change cdclk - squash, crawl, modeset to
intel_cdclk_state so we have access to the cdclk values
that are in transition.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display
The change is to be able to have access to the in-flight state.
Changing this one functions, trickles the change to
intel_cdclk_changed()
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 22 ++-
drivers/gpu/drm/i915/display/intel_cdclk.h| 3
This is a prep patch for what the rest of the series does.
Add existing actions that change cdclk - squash, crawl, modeset to
intel_cdclk_state so we have access to the cdclk values
that are in transition.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display
Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +-
1 file changed, 9 insertions
Checking cdclk conditions during atomic check and preparing
for commit phase so we can have atomic commit as simple
as possible. Add the specific steps to be taken during
cdclk changes, prepare for squashing, crawling and modeset
scenarios.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Apart from checking if squashing can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++--
1 file changed, 11
() and intel_cdclk_needs_modeset() have changes
to accommodate this.
Cc: Stanislav Lisovskiy
Anusha Srivatsa (5):
drm/i915/display: Add CDCLK actions to intel_cdclk_state
drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
drm/i915
Checking cdclk conditions during atomic check and preparing
for commit phase so we can have atomic commit as simple
as possible. Add the specific steps to be taken during
cdclk changes, prepare for squashing, crawling and modeset
scenarios.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
The change is to be able to have access to the in-flight state.
Changing this one functions, trickles the change to
intel_cdclk_changed()
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 22 ++-
drivers/gpu/drm/i915/display/intel_cdclk.h| 3
Apart from checking if crawling can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +-
1 file changed, 9 insertions
Apart from checking if squashing can be performed,
accommodate accessing in-flight cdclk state for any changes
that are needed during commit phase.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++--
1 file changed, 11
This is a prep patch for what the rest of the series does.
Add existing actions that change cdclk - squash, crawl, modeset to
intel_cdclk_state so we have access to the cdclk values
that are in transition.
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display
() and intel_cdclk_needs_modeset() have changes
to accommodate this.
Cc: Stanislav Lisovskiy
Anusha Srivatsa (5):
drm/i915/display: Add CDCLK actions to intel_cdclk_state
drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash
drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl
drm/i915
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, March 3, 2022 1:59 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/cdclk: Add cdclk check to atomic
> check
>
> On Wed, 02 Mar 2
() and
intel_cdclk_can_crawl() since they no longer simply check
if squashing and crawling can be performed.
Cc: Stanislav Lisovskiy
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 169 +++---
drivers/gpu/drm/i915/display/intel_cdclk.h| 16
() and
intel_cdclk_can_crawl() since they no longer simply check
if squashing and crawling can be performed.
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 162 +++---
drivers/gpu/drm/i915/display/intel_cdclk.h| 16 +-
.../drm/i915/display
t; Cc: Vinay Belgaumkar
> Signed-off-by: José Roberto de Souza
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/gt/intel_rps.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
> b/drivers/gpu/drm/i915
DG1 at a state where we can safely remove require_force_probe.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f449c454b6f8..cafc569fdf66 100644
for ADL-N.
>
> Signed-off-by: Tejas Upadhyay
>
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/intel_pch.c | 1 +
> drivers/gpu/drm/i915/intel_pch.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pch.c
> b/drivers/gp
> -Original Message-
> From: Roper, Matthew D
> Sent: Thursday, February 10, 2022 10:51 AM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Update DMC_DEBUG3 register
>
> On Thu, Feb 10, 2022 at
DMC_DEBUGU3 changes from DG1+
Bspec: 49788
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 --
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Set the chicken bit to invalidate LSC L1 operation due to UAV
coherency barrier.
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers
Add stepping-substepping info in
accordance to BSpec changes.
Though it looks weird, the revision ID
for the newer stepping is indeed backwards
and is in accordance to the spec.
v2: Rearrange the platforms in logical order (Matt)
Bspec: 53655
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
> -Original Message-
> From: Roper, Matthew D
> Sent: Monday, January 24, 2022 5:06 PM
> To: Srivatsa, Anusha
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [v2] drm/i915/rpl-s: Add stepping info
>
> On Mon, Jan 24, 2022 at 04:16:35PM -0800, Anusha
Add stepping-substepping info in
accordance to BSpec changes.
Though it looks weird, the revision ID
for the newer stepping is indeed backwards
and is in accordance to the spec.
v2: Rearrange the platforms in logical order (Matt)
Bspec: 53655
Cc: Roper, Matthew D
Signed-off-by: Anusha Srivatsa
Add stepping-substepping info in
accordance to BSpec changes.
Though it looks weird, the revision ID
for the newer stepping is indeed backwards
and is in accordance to the spec.
v2: Rearrange the platforms in logical order (Matt)
Bspec: 53655
Cc: Roper, Matthew D
Signed-off-by: Anusha Srivatsa
Add stepping-substepping info in
accordance to BSpec changes.
Bspec: 53655
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_step.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_step.c
b/drivers/gpu/drm/i915/intel_step.c
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, December 21, 2021 1:03 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Cc: Syrjala, Ville
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Move cdclk checks to
> atomic check
() and
intel_cdclk_can_crawl() since they no longer simply check
if squashing and crawling can be performed.
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c| 130 +++---
drivers/gpu/drm/i915/display/intel_cdclk.h| 3 +-
.../drm/i915/display
story
> > Changes since V1:
> > - replace IS_ALDERLAKE_N with IS_ADLP_N - Jani Nikula
> >
> > Signed-off-by: Tejas Upadhyay
> >
>
> Acked-by: Jani Nikula
Checked the changes with Bspec,
Reviewed-by: Anusha Srivatsa
>
>
> > ---
> &g
> -Original Message-
> From: Jani Nikula
> Sent: Friday, December 10, 2021 4:17 PM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [RFC] drm/i915/display: Move cdclk checks to atomic
> check
>
> On Thu, 09 Dec 2
i915 has squashing for DG2 and crawling for ADLP.
Moving the checks to atomic check phase so
at a later phase we know how the cdclk changes.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 49 +-
drivers/gpu/drm/i915/i915_drv.h| 11
> -Original Message-
> From: Hansen, Dave
> Sent: Thursday, December 9, 2021 2:27 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Cc: x...@kernel.org; dri-de...@lists.freedesktop.org; Ingo Molnar
> ; Borislav Petkov ; Dave Hansen
> ; Joonas Lah
Ping :)
Can these updates be merged to linux-firmware?
Thanks,
Anusha
> -Original Message-
> From: Tolakanahalli Pradeep, Madhumitha
>
> Sent: Thursday, December 2, 2021 6:48 AM
> To: Hutchings, Ben ; intel-gfx@lists.freedesktop.org;
> k...@mcmartin.ca; jwbo.
> -Original Message-
> From: Tolakanahalli Pradeep, Madhumitha
>
> Sent: Wednesday, December 8, 2021 8:25 AM
> To: Srivatsa, Anusha ; De Marchi, Lucas
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/dmc: Change DMC FW size
> -Original Message-
> From: Srivatsa, Anusha
> Sent: Monday, December 6, 2021 9:59 AM
> To: 'Tvrtko Ursulin' ; intel-
> g...@lists.freedesktop.org
> Cc: x...@kernel.org; dri-de...@lists.freedesktop.org; Ingo Molnar
> ; Borislav Petkov ; Dave Hansen
> ; Joonas L
Though, RPL-S is defined as subplatform of ADL-S, unlike
ADL-S, it has GuC submission by default.
v2: Remove extra parenthesis (Jani)
v3: s/IS_RAPTORLAKE/IS_ADLS_RPLS (Jani)
Cc: dri-de...@lists.freedesktop.org
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Signed-off-by: Anusha
Add the PCH ID for RPL-S.
v2: Self contained commit message (Jani)
Cc: dri-de...@lists.freedesktop.org
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Reviewed-by: José Roberto de Souza
---
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915
/IS_ADLS_RPLS (Jani)
- Fix comment (Tvrtko)
BSpec: 53655
Cc: x...@kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Cc: Matt Roper
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Reviewed-by: José Roberto de
are reviewed. Jani has acked the series.
Looking for other acks in order to merge these to
respective branches.
Cc: x...@kernel.org
Cc: dri-de...@lists.freedesktop.org
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: Joonas Lahtinen
Cc: Tvrtko Ursulin
Acked-by: Jani Nikula
Anusha Srivatsa
> -Original Message-
> From: Jani Nikula
> Sent: Wednesday, December 1, 2021 5:52 PM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [v3 0/3] Introduce Raptor Lake S
>
> On Wed, 01 Dec 2021, Anusha Srivatsa wrote:
Add the PCH ID for RPL-S.
v2: Self contained commit message (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915/intel_pch.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
Though, RPL-S is defined as subplatform of ADL-S, unlike
ADL-S, it has GuC submission by default.
v2: Remove extra parenthesis (Jani)
v3: s/IS_RAPTORLAKE/IS_ADLS_RPLS (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2
/IS_ADLS_RPLS (Jani)
- Fix comment (Tvrtko)
BSpec: 53655
Cc: Matt Roper
Cc: Tvrtko Ursulin
Cc: Swathi Dhanavanthri
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c
Raptor Lake S(RPL-S) is a version 12
Display, Media and Render. For all i915
purposes it is the same as Alder Lake S (ADL-S).
The series introduces it as a subplatform
of ADL-S. The one difference is the GuC
submission which is default on RPL-S but
was not the case with ADL-S.
Anusha Srivatsa (3
> -Original Message-
> From: Jani Nikula
> Sent: Wednesday, December 1, 2021 2:46 PM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Cc: Srivatsa, Anusha ; Dhanavanthri, Swathi
>
> Subject: Re: [v3 3/3] drm/i915/rpl-s: Enable guc submission by def
Though, RPL-S is defined as subplatform of ADL-S, unlike
ADL-S, it has GuC submission by default.
v2: Remove extra parenthesis (Jani)
v3: s/IS_RAPTORLAKE/IS_ADLS_RPLS (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2
Add the PCH ID for RPL-S.
v2: Self contained commit message (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915/intel_pch.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
/IS_ADLS_RPLS (Jani)
- Fix comment (Tvrtko)
BSpec: 53655
Cc: Matt Roper
Cc: Tvrtko Ursulin
Cc: Swathi Dhanavanthri
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c
Raptor Lake S(RPL-S) is a version 12
Display, Media and Render. For all i915
purposes it is the same as Alder Lake S (ADL-S).
The series introduces it as a subplatform
of ADL-S. The one difference is the GuC
submission which is default on RPL-S but
was not the case with ADL-S.
Anusha Srivatsa (3
> -Original Message-
> From: Jani Nikula
> Sent: Monday, November 22, 2021 3:28 PM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org; Tvrtko Ursulin ;
> Syrjala, Ville ; Vivi, Rodrigo
> ; Joonas Lahtinen
>
> Cc: Srivatsa, Anusha ; Dhanavanthri, S
> -Original Message-
> From: Tvrtko Ursulin
> Sent: Monday, November 22, 2021 3:49 PM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [v2 1/3] drm/i915/rpl-s: Add PCI IDS for Raptor Lake
> S
>
>
> On 20/11/202
Though, RPL-S is defined as subplatform of ADL-S, unlike
ADL-S, it has GuC submission by default.
v2: Remove extra parenthesis (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
1 file changed, 1 insertion(+), 1
Add the PCH ID for RPL-S.
v2: Self contained commit message (Jani)
Cc: Jani Nikula
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915/intel_pch.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915
Roper
Cc: Swathi Dhanavanthri
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
---
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 7 +++
drivers/gpu/drm
Raptor Lake S(RPL-S) is a version 12
Display, Media and Render. For all i915
purposes it is the same as Alder Lake S (ADL-S).
The series introduces it as a subplatform
of ADL-S. The one difference is the GuC
submission which is default on RPL-S but
was not the case with ADL-S.
Anusha Srivatsa (3
restore issue
>
> Could you also add the 2.12 -> 2.13 release notes?
Oops saw Imre's comment now.
@Tolakanahalli Pradeep, Madhumitha Please do the needful.
Anusha
> > Signed-off-by: Madhumitha Tolakanahalli Pradeep
> >
> > ---
> > drivers/gpu/drm/i915/display
; The release notes mention that DMC v2.14 provides - 1. Fix for Flip queue
> roll over cases with DC6v 2. Enhancement for residency 3. Workaround for
> 3Dlut restore issue
>
> Signed-off-by: Madhumitha Tolakanahalli Pradeep
>
Thanks for the patch.
Reviewed-by: Anusha Srivat
> -Original Message-
> From: Jani Nikula
> Sent: Monday, November 15, 2021 4:07 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/rpl-s: Add PCI IDS
>
> On Fri, 12 Nov 2021, Anusha Srivatsa w
> -Original Message-
> From: Jani Nikula
> Sent: Monday, November 15, 2021 4:09 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915/rpl-s: Add PCH ID
>
> On Fri, 12 Nov 2021, Anusha Srivatsa w
> -Original Message-
> From: Jani Nikula
> Sent: Monday, November 15, 2021 4:10 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915/rpl-s: Enable guc submission by
> default
>
> On Fri, 12 Nov 2
Adding PCI ids for RPL-S. Introducing RPL-S as a
subplatform of ADL-S. From graphics POV,RPL-S is
the same as ADL-S.
BSpec: 53655
Cc: Matt Roper
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
arch/x86/kernel/early-quirks.c | 1 +
drivers/gpu/drm/i915/i915_drv.h
Raptor Lake S(RPL-S) is a version 12
Display, Media and Render. For all i915
purposes it is the same as Alder Lake S (ADL-S).
The series introduces it as a subplatform
of ADL-S. The one difference is the GuC
submission which is default on RPL-S but
was not the case with ADL-S.
Anusha Srivatsa (3
Though, RPL-S is defined as subplatform of ADL-S, unlike
ADL-S, it has GuC submission by default.
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/uc
Add the PCH ID for the same.
Cc: Swathi Dhanavanthri
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915/intel_pch.h | 1 +
include/drm/i915_pciids.h| 5 -
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, November 2, 2021 3:25 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-de...@lists.freedesktop.org; Roper, Matthew D
> ; Srivatsa, Anusha
>
> Subject: [PATCH 2/3] drm/i915/dg2: Add initial g
Replying to the right patch this time.
From what the bspec says, the changes look good.
Minor feedback below inline.
With that change,
Reviewed-by: Anusha Srivatsa
> -Original Message-
> From: Intel-gfx On Behalf Of
> Radhakrishna Sripada
> Sent: Friday, October 15,
So far we had support for main, PipeA and PipeB
DMC. If we find a binary from PipeA-D, lets load it.
Cc: Imre Deak
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h
b
up to 09ab718bfa2b32a2186dd8f9e39e0cc9a9df7170:
i915: Update ADLP DMC v2.12 (2021-09-14 14:42:47 -0700)
Anusha Srivatsa (1):
i915: Update ADLP DMC v2.12
WHENCE| 3 +++
i915/adlp_dmc_ver2_12.bin | Bin 0
The release notes mentions that this version-
1. Fix for unblock indication to punit.
2. Robustness fix for DC6/6v abort scenarios.
Cc: Imre Deak >
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
DMC v2.12 (2021-09-14 14:42:47 -0700)
Anusha Srivatsa (1):
i915: Update ADLP DMC v2.12
WHENCE| 3 +++
i915/adlp_dmc_ver2_12.bin | Bin 0 -> 72104 bytes
2 files changed, 3 insertions(+)
create mode 100
t parameter to allow them to opt-in.
>
> Bspec: 45974, 45718
> Cc: John Harrison
> Signed-off-by: Matt Roper
Looks good.
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 +++--
> drivers/gpu/drm/i915/i915_reg.h
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, August 12, 2021 2:59 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Cc: Roper, Matthew D ; De Marchi, Lucas
>
> Subject: Re: [Intel-gfx] [CI 1/2] drm/i915/step: Add macro ma
repository at:
git://anongit.freedesktop.org/drm/drm-firmware tgl_rkl_dmc_updates
for you to fetch changes up to 6c9fd94d41310443ea4ff782ce1545e49e74221c:
i915: Add v2.03 DMC for RKL (2021-07-28 09:45:27 -0700)
Anusha Srivatsa (2
repository at:
git://anongit.freedesktop.org/drm/drm-firmware adlp_dmc_2_11
for you to fetch changes up to e5b34bc00848422a9d9907694202f1e29c5e9671:
i915: Bump DMC version for ADLP to v2.11 (2021-07-27 11:20:31 -0700)
Anusha Srivatsa
Release notes mention that this verion has:
- Fixes for DC6v issue.
- Flip queue enabled on pipe C and pipe D.
Cc: Imre Deak
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
panel will be
s/ guaratee/ guarantee
> properly updated.
>
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> di
te and
> programing calls.
>
> Without this patch is possible to see a mouse movement lag in Gnome when
> PSR2 selective fetch is enabled.
>
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
Assuming this was tested on gnome, the change makes sense.
Reviewed
gned-off-by: José Roberto de Souza
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index d43649
Lets use RUNTIME_INFO->step since all platforms now have their
stepping info in intel_step.c. This makes intel_get_stepping_info()
a lot simpler.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c |
Add support to load latest DMC version.
The Release Notes mentions that this version fixes
timeout issues.
Cc: Madhumitha Pradeep
Signed-off-by: Anusha Srivatsa
Reviewed-by: Madhumitha Pradeep <
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
Add support to the latest DMC firmware.
Cc: Madhunitha Pradeep
Signed-off-by: Anusha Srivatsa
Reviewed-by: Madhumitha Pradeep <
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
With the addition of stepping info for
all platforms, lets use macros for handling them
and autogenerating code for all steps at a time.
Suggested-by: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_step.c | 14
> xelpd platforms also requires that FBC is disabled when PSR2 is enabled so
> extending it.
>
> BSpec: 50422
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
Roberto de Souza
>
> PSR2 is not supported on DG2.
>
> Cc: Caz Yokoyama
> Cc: Gwan-gyeong Mun
> Signed-off-by: José Roberto de Souza
> Signed-off-by: Matt Roper
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
> 1 file changed, 2 i
> -Original Message-
> From: Roper, Matthew D
> Sent: Tuesday, July 13, 2021 8:16 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Roper, Matthew D ; Mun, Gwan-gyeong
> ; Srivatsa, Anusha
>
> Subject: [PATCH v2 47/50] drm/i915/dg2: Update lane disable power stat
; dummy
> QGV point with the proper amount of memory bandwidth, rather than trying
> to query the pcode for this information.
>
> Bspec: 64631
> Signed-off-by: Matt Roper
Reviewed-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/i915/display/intel_bw.c | 24
> +++
Lets use RUNTIME_INFO->step since all platforms now have their
stepping info in intel_step.c. This makes intel_get_stepping_info()
a lot simpler.
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c |
With the addition of stepping info for
all platforms, lets use macros for handling them
and autogenerating code for all steps at a time.
Suggested-by: Matt Roper
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_step.c | 14
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