On 6/21/2024 5:46 PM, john.c.harri...@intel.com wrote:
From: John Harrison
There is a new part to an existing workaround, so enable that piece as
well.
v2: Extend even further.
v3: Drop DG2 as there are CI failures still to resolve. Also re-order
the parameters to a function to reduce
On 6/21/2024 5:46 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The context switch out workaround also applies to ARL.
Signed-off-by: John Harrison
LGTM,
Reviewed-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
On 2/28/2024 4:54 AM, Tvrtko Ursulin wrote:
On 27/02/2024 23:51, Vinay Belgaumkar wrote:
Allow user to provide a low latency context hint. When set, KMD
sends a hint to GuC which results in special handling for this
context. SLPC will ramp the GT frequency aggressively every time
it switches
On 2/23/2024 12:51 AM, Tvrtko Ursulin wrote:
On 22/02/2024 23:31, Belgaumkar, Vinay wrote:
On 2/22/2024 7:32 AM, Tvrtko Ursulin wrote:
On 21/02/2024 21:28, Rodrigo Vivi wrote:
On Wed, Feb 21, 2024 at 09:42:34AM +, Tvrtko Ursulin wrote:
On 21/02/2024 00:14, Vinay Belgaumkar wrote
On 2/22/2024 7:32 AM, Tvrtko Ursulin wrote:
On 21/02/2024 21:28, Rodrigo Vivi wrote:
On Wed, Feb 21, 2024 at 09:42:34AM +, Tvrtko Ursulin wrote:
On 21/02/2024 00:14, Vinay Belgaumkar wrote:
Allow user to provide a context hint. When this is set, KMD will
send a hint to GuC which
On 1/18/2024 3:50 PM, Matt Roper wrote:
On Thu, Jan 18, 2024 at 03:17:28PM -0800, Vinay Belgaumkar wrote:
Instead of waiting until the interrupt reaches GuC, we can grab a
forcewake while triggering the H2G interrupt. GEN11_GUC_HOST_INTERRUPT
is inside an "always on" domain with respect to
On 1/5/2024 3:33 AM, Kamil Konieczny wrote:
Hi Vinay,
On 2024-01-04 at 17:10:00 -0800, Vinay Belgaumkar wrote:
looks good, there are some nits, first about subject:
[PATCH i-g-t] tests/perf_pmu: Restore sysfs freq in exit handler
s!tests/perf_pmu:!tests/intel/perf_pmu:!
Also you can drop
On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.
Signed-off-by: John Harrison
---
On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.
Signed-off-by: John Harrison
On 10/27/2023 2:18 PM, john.c.harri...@intel.com wrote:
From: John Harrison
To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
On 11/9/2023 12:35 PM, Ville Syrjälä wrote:
On Thu, Nov 09, 2023 at 12:01:26PM -0800, Belgaumkar, Vinay wrote:
On 11/9/2023 11:30 AM, Ville Syrjälä wrote:
On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote:
We read RENDER_HEAD as a part of the flush. If GT is in
deeper sleep
On 11/9/2023 11:30 AM, Ville Syrjälä wrote:
On Thu, Nov 09, 2023 at 11:21:48AM -0800, Vinay Belgaumkar wrote:
We read RENDER_HEAD as a part of the flush. If GT is in
deeper sleep states, this could lead to read errors since we are
not using a forcewake. Safer to read a shadowed register
On 10/16/2023 4:24 PM, John Harrison wrote:
On 10/16/2023 15:55, Vinay Belgaumkar wrote:
This bit does not cause an explicit L3 flush. We already use
At all? Or only on newer hardware? And as a genuine spec change or as
a bug / workaround?
If the hardware has re-purposed the bit then it is
On 9/15/2023 2:55 PM, john.c.harri...@intel.com wrote:
From: John Harrison
To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.
Signed-off-by: John Harrison
---
.../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h | 1 +
On 9/15/2023 2:55 PM, john.c.harri...@intel.com wrote:
From: John Harrison
Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.
Signed-off-by: John Harrison
---
On 9/14/2023 3:28 PM, john.c.harri...@intel.com wrote:
From: Daniele Ceraolo Spurio
The GuC handles the WA, the KMD just needs to set the flag to enable
it on the appropriate platforms.
Signed-off-by: John Harrison
Signed-off-by: Daniele Ceraolo Spurio
---
On 9/21/2023 3:41 AM, Tvrtko Ursulin wrote:
On 20/09/2023 22:56, Vinay Belgaumkar wrote:
Provide a bit to disable waitboost while waiting on a gem object.
Waitboost results in increased power consumption by requesting RP0
while waiting for the request to complete. Add a bit in the gem_wait()
On 9/20/2023 7:07 AM, Rodrigo Vivi wrote:
On Mon, Sep 18, 2023 at 12:02:59PM -0700, Vinay Belgaumkar wrote:
A prior(rps) test leaves the system in a bad state causing failures
in the basic test.
Why?
What was the freq immediately before the failure that made the
machine to be busted and not
On 8/14/2023 12:24 AM, Riana Tauro wrote:
Hi Vinay
On 8/9/2023 6:20 AM, Vinay Belgaumkar wrote:
Register read for requested_freq can return 0 when system is
in runtime_pm. Make allowance for this case.
Link: https://gitlab.freedesktop.org/drm/intel/issues/8736
Link:
On 8/10/2023 5:22 PM, Rodrigo Vivi wrote:
On Wed, Aug 02, 2023 at 12:41:09AM +, Belgaumkar, Vinay wrote
On 7/21/2023 3:08 PM, Belgaumkar, Vinay wrote:
On 7/21/2023 2:23 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 01:44:34PM -0700, Belgaumkar, Vinay wrote:
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done
On 7/21/2023 2:23 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 01:44:34PM -0700, Belgaumkar, Vinay wrote:
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done before the soft min/max frequencies are restored.
When
On 7/21/2023 1:41 PM, Rodrigo Vivi wrote:
On Fri, Jul 21, 2023 at 11:03:49AM -0700, Vinay Belgaumkar wrote:
This should be done before the soft min/max frequencies are restored.
When we disable the "Ignore efficient frequency" flag, GuC does not
actually bring the requested freq down to RPn.
On 7/17/2023 9:26 PM, Dixit, Ashutosh wrote:
On Mon, 17 Jul 2023 21:19:13 -0700, Belgaumkar, Vinay wrote:
On 7/17/2023 6:50 PM, Dixit, Ashutosh wrote:
On Mon, 17 Jul 2023 11:42:13 -0700, Vinay Belgaumkar wrote:
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print
On 7/17/2023 6:50 PM, Dixit, Ashutosh wrote:
On Mon, 17 Jul 2023 11:42:13 -0700, Vinay Belgaumkar wrote:
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print the values being compared and some additional debug as well.
v2: Print GT as well (Ashutosh)
Signed-off-by:
On 7/8/2023 12:36 PM, Dixit, Ashutosh wrote:
On Fri, 07 Jul 2023 16:23:59 -0700, Vinay Belgaumkar wrote:
Some subtests seem to be failing in CI, use igt_assert_(lt/eq) which
print the values being compared and some additional debug as well.
Signed-off-by: Vinay Belgaumkar
---
On 5/23/2023 3:51 AM, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Exercise a bunch of up and down rps thresholds to verify hardware
is happy with them all.
To limit the overall runtime relies on probability and number of runs
to approach complete coverage.
Signed-off-by: Tvrtko Ursulin
Cc:
On 6/28/2023 10:41 AM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* drm/i915/guc: Dump perf_limit_reasons for debug (rev2)
*URL:* https://patchwork.freedesktop.org/series/119893/
*State:*failure
*Details:*
On 6/26/2023 11:43 PM, Dixit, Ashutosh wrote:
On Mon, 26 Jun 2023 21:02:14 -0700, Belgaumkar, Vinay wrote:
On 6/26/2023 8:17 PM, Dixit, Ashutosh wrote:
On Mon, 26 Jun 2023 19:12:18 -0700, Vinay Belgaumkar wrote:
GuC load takes longer sometimes due to GT frequency not ramping up.
Add
On 6/26/2023 8:17 PM, Dixit, Ashutosh wrote:
On Mon, 26 Jun 2023 19:12:18 -0700, Vinay Belgaumkar wrote:
GuC load takes longer sometimes due to GT frequency not ramping up.
Add perf_limit_reasons to the existing warn print to see if frequency
is being throttled.
Signed-off-by: Vinay
On 6/13/2023 7:25 PM, Dixit, Ashutosh wrote:
On Fri, 09 Jun 2023 15:02:52 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
We were skipping when min_softlimit was equal to RPn. We need to apply
it rergardless as efficient frequency will push the SLPC min to RPe.
regardless
This will break
On 6/13/2023 2:25 PM, Dixit, Ashutosh wrote:
On Mon, 12 Jun 2023 12:42:13 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Verify that SLPC API works as expected after a suspend. Added
another subtest that does multiple GT resets and checks freq api
works as expected after each one.
We now check
On 6/1/2023 8:59 AM, Alan Previn wrote:
In the case of failed suspend flow or cases where the kernel does not go
into full suspend but goes from suspend_prepare back to resume_complete,
we get called for a pm_complete but without runtime_pm guaranteed.
Thus, ensure we take the runtime_pm when
On 6/7/2023 4:11 PM, Belgaumkar, Vinay wrote:
On 6/7/2023 3:56 PM, Dixit, Ashutosh wrote:
On Wed, 07 Jun 2023 15:31:33 -0700, Belgaumkar, Vinay wrote:
On 6/7/2023 2:12 PM, Dixit, Ashutosh wrote:
On Tue, 06 Jun 2023 13:35:35 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Verify that SLPC API
On 6/7/2023 3:56 PM, Dixit, Ashutosh wrote:
On Wed, 07 Jun 2023 15:31:33 -0700, Belgaumkar, Vinay wrote:
On 6/7/2023 2:12 PM, Dixit, Ashutosh wrote:
On Tue, 06 Jun 2023 13:35:35 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Verify that SLPC API works as expected after a suspend.
Signed-off
On 6/7/2023 2:12 PM, Dixit, Ashutosh wrote:
On Tue, 06 Jun 2023 13:35:35 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Verify that SLPC API works as expected after a suspend.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/i915_pm_freq_api.c | 30 ++
1 file
On 6/1/2023 12:55 PM, Andrzej Hajda wrote:
On 24.05.2023 21:19, Vinay Belgaumkar wrote:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32 +++-
1 file changed,
On 5/25/2023 11:25 AM, Kamil Konieczny wrote:
Hi Vinay,
On 2023-05-24 at 12:19:06 -0700, Vinay Belgaumkar wrote:
Hang and heartbeat subtests are not supported with GuC submission
enabled.
Signed-off-by: Vinay Belgaumkar
---
tests/i915/gem_ctx_persistence.c | 32
On 4/18/2023 11:17 AM, john.c.harri...@intel.com wrote:
From: John Harrison
In the past, There have been sporadic CTB failures which proved hard
to reproduce manually. The most effective solution was to dump the GuC
log at the point of failure and let the CI system do the repro. It is
On 4/18/2023 11:17 AM, john.c.harri...@intel.com wrote:
From: John Harrison
This is useful for getting debug information out in certain
situations, such as failing kernel selftests and CI runs that don't
log error captures. It is especially useful for things like retrieving
GuC logs as GuC
On 4/18/2023 11:17 AM, john.c.harri...@intel.com wrote:
From: John Harrison
Sometimes, the only effective way to debug an issue is to dump all the
interesting information at the point of failure. So add support for
doing that.
v2: Extra CONFIG wrapping (review feedback from Rodrigo)
On 5/12/2023 5:39 PM, Dixit, Ashutosh wrote:
On Fri, 12 May 2023 16:56:03 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
rps_boost debugfs shows host turbo related info. This is not valid
when SLPC is enabled.
A couple of thoughts about this. It appears people are know only about
rps_boost_info
On 4/26/2023 6:13 PM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide
sysfs for efficient freq (rev2)
*URL:* https://patchwork.freedesktop.org/series/116957/
*State:*failure
*Details:*
On 4/25/2023 6:40 PM, Patchwork wrote:
Project List - Patchwork *Patch Details*
*Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide
sysfs for efficient freq
*URL:* https://patchwork.freedesktop.org/series/116957/
*State:*failure
*Details:*
On 4/14/2023 1:25 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 12:16:37 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Use default of 0 where GT id is not being used.
v2: Add a helper for GT 0 (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 36
On 4/17/2023 6:39 PM, Andi Shyti wrote:
Hi Vinay,
Looks good, just few minor comments below,
[...]
@@ -267,13 +267,11 @@ static int run_test(struct intel_gt *gt, int test_type)
}
/*
-* Set min frequency to RPn so that we can test the whole
-* range of
On 4/14/2023 1:25 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 12:16:37 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Use default of 0 where GT id is not being used.
v2: Add a helper for GT 0 (Ashutosh)
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 36
On 4/14/2023 4:49 PM, Dixit, Ashutosh wrote:
On Fri, 14 Apr 2023 15:34:15 -0700, Vinay Belgaumkar wrote:
@@ -457,6 +458,34 @@ int intel_guc_slpc_get_max_freq(struct intel_guc_slpc
*slpc, u32 *val)
return ret;
}
+int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc,
On 4/14/2023 11:10 AM, Dixit, Ashutosh wrote:
On Thu, 13 Apr 2023 15:44:12 -0700, Vinay Belgaumkar wrote:
Use default of 0 where GT id is not being used.
Signed-off-by: Vinay Belgaumkar
---
lib/igt_pm.c | 20 ++--
lib/igt_pm.h | 2 +-
On 4/3/2023 8:36 AM, Dixit, Ashutosh wrote:
On Mon, 03 Apr 2023 08:23:45 -0700, Belgaumkar, Vinay wrote:
On 3/31/2023 4:56 PM, Dixit, Ashutosh wrote:
On Mon, 27 Mar 2023 19:00:28 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
+/*
+ * Too many intermediate components and steps before freq
On 3/31/2023 4:56 PM, Dixit, Ashutosh wrote:
On Mon, 27 Mar 2023 19:00:28 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
+/*
+ * Too many intermediate components and steps before freq is adjusted
+ * Specially if workload is under execution, so let's wait 100 ms.
+ */
+#define ACT_FREQ_LATENCY_US
On 3/28/2023 11:53 AM, Rodrigo Vivi wrote:
On Mon, Mar 27, 2023 at 04:29:55PM -0700, Belgaumkar, Vinay wrote:
On 3/26/2023 4:04 AM, Rodrigo Vivi wrote:
On Fri, Mar 24, 2023 at 03:49:59PM -0700, Vinay Belgaumkar wrote:
Use the xe_guc_pc test for i915 as well. Validate basic
api for GT freq
On 3/26/2023 4:04 AM, Rodrigo Vivi wrote:
On Fri, Mar 24, 2023 at 03:49:59PM -0700, Vinay Belgaumkar wrote:
Use the xe_guc_pc test for i915 as well. Validate basic
api for GT freq control. Also test interaction with GT
reset. We skip rps tests with SLPC enabled, this will
re-introduce some
On 3/26/2023 3:51 AM, Rodrigo Vivi wrote:
On Fri, Mar 24, 2023 at 05:34:42PM -0700, Vinay Belgaumkar wrote:
When min/max are both at RPn, restoring min back to 300
will not work. Max needs to be increased first.
why max needs to come first in this case? we should probably at
least document
On 3/24/2023 4:31 PM, Dixit, Ashutosh wrote:
On Fri, 24 Mar 2023 11:15:02 -0700, Belgaumkar, Vinay wrote:
Hi Vinay,
Thanks for the review. Comments inline below.
Sorry about asking the same questions all over again :) Didn't look at
previous versions.
On 3/15/2023 8:59 PM, Ashutosh Dixit
On 3/24/2023 11:02 AM, Umesh Nerlige Ramappa wrote:
Earlier merge dropped an if block when applying the patch -
"drm/i915/mtl: Synchronize i915/BIOS on C6 enabling". Bring back the
if block as the check is required by - "drm/i915/mtl: Disable MC6 for MTL
A step" to disable C6 on media for A0
On 3/15/2023 8:59 PM, Ashutosh Dixit wrote:
On dGfx, the PL1 power limit being enabled and set to a low value results
in a low GPU operating freq. It also negates the freq raise operation which
is done before GuC firmware load. As a result GuC firmware load can time
out. Such timeouts were
On 3/16/2023 8:43 PM, Dixit, Ashutosh wrote:
On Wed, 15 Mar 2023 18:00:51 -0700, Umesh Nerlige Ramappa wrote:
From: Vinay Belgaumkar
Hi Vinay,
If BIOS enables/disables C6, i915 should do the same.
So MTL bios has a control for enabling/disabling C6? Both RC6 and MC6
individually or
On 3/7/2023 9:33 PM, Ashutosh Dixit wrote:
Using common freq functions with sysfs in PMU (but without taking
forcewake) solves the following issues (a) missing support for MTL (b)
For the requested_freq, we read it only if actual_freq is zero below
(meaning, GT is in C6). So then what is
On 2/22/2023 1:01 PM, Alan Previn wrote:
The Driver-FLR flow may inadvertently exit early before the full
completion of the re-init of the internal HW state if we only poll
GU_DEBUG Bit31 (polling for it to toggle from 0 -> 1). Instead
we need a two-step completion wait-for-completion flow
On 1/16/2023 10:58 AM, Andi Shyti wrote:
Hi,
On Thu, Jan 12, 2023 at 08:48:11PM -0800, Belgaumkar, Vinay wrote:
On 1/12/2023 8:37 PM, Dixit, Ashutosh wrote:
On Thu, 12 Jan 2023 20:26:34 -0800, Belgaumkar, Vinay wrote:
I think the ABI was changed by the patch mentioned in the commit
On 1/12/2023 8:37 PM, Dixit, Ashutosh wrote:
On Thu, 12 Jan 2023 20:26:34 -0800, Belgaumkar, Vinay wrote:
I think the ABI was changed by the patch mentioned in the commit
(a8a4f0467d70).
The ABI was originally changed in 80cf8af17af04 and 56a709cf77468.
Yes, you are right. @Andi, did we
On 1/12/2023 7:15 PM, Dixit, Ashutosh wrote:
On Thu, 12 Jan 2023 18:27:52 -0800, Vinay Belgaumkar wrote:
Reading current root sysfs entries gives a min/max of all
GTs. Updating this so we return default (GT0) values when root
level sysfs entries are accessed, instead of min/max for the card.
On 12/21/2022 9:49 AM, Alan Previn wrote:
If PXP arb-session is being attempted on older hardware SKUs or
on hardware with older, unsupported, firmware versions, then don't
report the failure with a drm_error. Instead, look specifically for
the API-version error reply and drm_dbg that reply.
On 11/15/2022 5:44 AM, Badal Nilawar wrote:
From: Vinay Belgaumkar
By defaut idle mesaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments (Vinay)
- Set GSC idle hysterisis to 5 us (Badal)
Bspec: 71496
Cc:
On 11/9/2022 3:25 AM, Riana Tauro wrote:
Run a workload on tiles simultaneously by requesting for RP0 frequency.
Pcode can however limit the frequency being granted due to throttling
reasons. This test checks if there is any throttling but does not fail
if RP0 is not granted due to throttle
On 10/31/2022 8:36 PM, Badal Nilawar wrote:
From: Vinay Belgaumkar
By defaut idle mesaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
C6 entry instead of RC6. Also *needs*.
Bspec: 71496
Cc: Daniele Ceraolo Spurio
Signed-off-by: Vinay
On 10/30/2022 10:14 PM, Riana Tauro wrote:
Run a workload on tiles simultaneously by requesting for RP0 frequency.
Pcode can however limit the frequency being granted due to throttling
reasons. This test fails if there is any throttling
It actually passes if there was throttling. Only fails if
On 10/26/2022 12:13 PM, Belgaumkar, Vinay wrote:
Project List - Patchwork
*From:* Patchwork
*Sent:* Tuesday, October 25, 2022 7:39 PM
*To:* Belgaumkar, Vinay
*Cc:* intel-gfx@lists.freedesktop.org
*Subject:* ✗ Fi.CI.IGT: failure for drm/i915/slpc: Use platform limits
for min/max frequency
From: Patchwork
Sent: Tuesday, October 25, 2022 7:39 PM
To: Belgaumkar, Vinay
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.IGT: failure for drm/i915/slpc: Use platform limits for
min/max frequency (rev5)
Patch Details
Series:
drm/i915/slpc: Use platform limits for min/max frequency
On 10/21/2022 10:26 PM, Dixit, Ashutosh wrote:
On Fri, 21 Oct 2022 18:38:57 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 3:57 PM, Dixit, Ashutosh wrote:
On Tue, 18 Oct 2022 11:30:31 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c
b/drivers
On 10/22/2022 12:22 PM, Dixit, Ashutosh wrote:
On Sat, 22 Oct 2022 10:56:03 -0700, Belgaumkar, Vinay wrote:
Hi Vinay,
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
index fc23c562d9b2..32e1f5dde5bb 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
On 10/21/2022 7:11 PM, Dixit, Ashutosh wrote:
On Fri, 21 Oct 2022 17:24:52 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Waitboost (when SLPC is enabled) results in a H2G message. This can result
in thousands of messages during a stress test and fill up an already full
CTB. There is no need to
On 10/20/2022 3:57 PM, Dixit, Ashutosh wrote:
On Tue, 18 Oct 2022 11:30:31 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
diff --git a/drivers/gpu/drm/i915/gt/selftest_slpc.c
b/drivers/gpu/drm/i915/gt/selftest_slpc.c
index 4c6e9257e593..e42bc215e54d 100644
---
On 10/21/2022 11:40 AM, Dixit, Ashutosh wrote:
On Fri, 21 Oct 2022 11:24:42 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 4:36 PM, Dixit, Ashutosh wrote:
On Thu, 20 Oct 2022 13:16:00 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
On Wed, 19 Oct 2022 17:29
On 10/20/2022 4:36 PM, Dixit, Ashutosh wrote:
On Thu, 20 Oct 2022 13:16:00 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
On Wed, 19 Oct 2022 17:29:44 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Waitboost (when SLPC is enabled) results in a H2G message
On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
On Wed, 19 Oct 2022 17:29:44 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Waitboost (when SLPC is enabled) results in a H2G message. This can result
in thousands of messages during a stress test and fill up an already full
CTB. There is no need to
On 10/19/2022 4:05 PM, Vinay Belgaumkar wrote:
Waitboost (when SLPC is enabled) results in a H2G message. This can result
in thousands of messages during a stress test and fill up an already full
CTB. There is no need to request for RP0 if GuC is already requesting the
same.
v2: Add the
On 10/19/2022 2:12 PM, Belgaumkar, Vinay wrote:
On 10/19/2022 12:40 AM, Tvrtko Ursulin wrote:
On 18/10/2022 23:15, Vinay Belgaumkar wrote:
Waitboost (when SLPC is enabled) results in a H2G message. This can
result
in thousands of messages during a stress test and fill up an already
full
On 10/19/2022 12:40 AM, Tvrtko Ursulin wrote:
On 18/10/2022 23:15, Vinay Belgaumkar wrote:
Waitboost (when SLPC is enabled) results in a H2G message. This can
result
in thousands of messages during a stress test and fill up an already
full
CTB. There is no need to request for RP0 if GuC is
On 10/13/2022 3:28 PM, Dixit, Ashutosh wrote:
On Thu, 13 Oct 2022 08:55:24 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
GuC will set the min/max frequencies to theoretical max on
ATS-M. This will break kernel ABI, so limit min/max frequency
to RP0(platform max) instead.
Isn't what we are
On 10/13/2022 8:14 AM, Das, Nirmoy wrote:
On 10/12/2022 8:26 PM, Vinay Belgaumkar wrote:
GuC will set the min/max frequencies to theoretical max on
ATS-M. This will break kernel ABI, so limit min/max frequency
to RP0(platform max) instead.
Also modify the SLPC selftest to update the min
On 10/13/2022 4:34 AM, Tauro, Riana wrote:
On 10/12/2022 11:56 PM, Vinay Belgaumkar wrote:
GuC will set the min/max frequencies to theoretical max on
ATS-M. This will break kernel ABI, so limit min/max frequency
to RP0(platform max) instead.
Also modify the SLPC selftest to update the min
On 10/4/2022 4:33 PM, Patchwork wrote:
== Series Details ==
Series: drm/i915/slpc: Update frequency debugfs for SLPC (rev3)
URL : https://patchwork.freedesktop.org/series/109328/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
CALL
On 10/4/2022 12:36 AM, Jani Nikula wrote:
On Mon, 03 Oct 2022, Vinay Belgaumkar wrote:
Move it to the RPS source file.
The idea was that the 1st patch would be non-functional code
movement. This is still a functional change.
Or you can do the functional changes first, and then move code,
On 9/26/2022 11:19 AM, Umesh Nerlige Ramappa wrote:
On Mon, Sep 26, 2022 at 08:56:01AM -0700, Dixit, Ashutosh wrote:
On Fri, 23 Sep 2022 13:11:53 -0700, Umesh Nerlige Ramappa wrote:
From: Vinay Belgaumkar
Hi Umesh/Vinay,
@@ -3254,6 +3265,24 @@ static int i915_oa_stream_init(struct
On 9/23/2022 4:00 AM, Riana Tauro wrote:
A fundamental assumption is that at lower frequencies,
not only do we run slower, but we save power compared to
higher frequencies.
live_slpc_power checks if running at low frequency saves power
v2: re-use code to measure power
fixed cosmetic
On 9/23/2022 4:00 AM, Riana Tauro wrote:
Run slpc selftests on all tiles
Signed-off-by: Riana Tauro
LGTM,
Reviewed-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_slpc.c | 45 -
1 file changed, 37 insertions(+), 8 deletions(-)
diff --git
On 9/23/2022 4:00 AM, Riana Tauro wrote:
move the power measurement and the triangle filter
to a different function. No functional changes.
Signed-off-by: Riana Tauro
LGTM,
Reviewed-by: Vinay Belgaumkar
---
drivers/gpu/drm/i915/gt/selftest_rps.c | 12 +---
1 file changed, 9
On 9/22/2022 7:32 AM, Riana Tauro wrote:
A fundamental assumption is that at lower frequencies,
not only do we run slower, but we save power compared to
higher frequencies.
live_slpc_power checks if running at low frequency saves power
Signed-off-by: Riana Tauro
---
On 8/15/2022 10:32 AM, Rodrigo Vivi wrote:
On Sun, Aug 14, 2022 at 04:46:54PM -0700, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the
On 8/15/2022 9:51 AM, Rodrigo Vivi wrote:
On Tue, Aug 09, 2022 at 05:03:06PM -0700, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm
On 8/14/2022 4:46 PM, Vinay Belgaumkar wrote:
Host Turbo operates at efficient frequency when GT is not idle unless
the user or workload has forced it to a higher level. Replicate the same
behavior in SLPC by allowing the algorithm to use efficient frequency.
We had disabled it during boot due
From: Patchwork
Sent: Monday, June 27, 2022 10:00 PM
To: Belgaumkar, Vinay
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/guc/slpc: Add a new SLPC selftest
(rev4)
Patch Details
Series:
drm/i915/guc/slpc: Add a new SLPC selftest (rev4)
URL:
https
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:
+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps
*rps, u32 *max_act_freq)
+{
+ struct intel_gt *gt = rps_to_gt(rps);
+ u32 perf_limit_reasons;
+
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:21:46 -0700, Belgaumkar, Vinay wrote:
On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:
On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
This test will validate we can achieve actual frequency of RP0. Pcode
grants
On 6/24/2022 8:59 PM, Dixit, Ashutosh wrote:
On Thu, 23 Jun 2022 16:33:20 -0700, Vinay Belgaumkar wrote:
+static int max_granted_freq(struct intel_guc_slpc *slpc, struct intel_rps
*rps, u32 *max_act_freq)
+{
+ struct intel_gt *gt = rps_to_gt(rps);
+ u32 perf_limit_reasons;
+
On 6/22/2022 1:32 PM, Dixit, Ashutosh wrote:
On Fri, 10 Jun 2022 16:47:12 -0700, Vinay Belgaumkar wrote:
This test will validate we can achieve actual frequency of RP0. Pcode
grants frequencies based on what GuC is requesting. However, thermal
throttling can limit what is being granted. Add a
On 6/21/2022 5:26 PM, Dixit, Ashutosh wrote:
On Sat, 14 May 2022 23:05:06 -0700, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when GuC channel is backed up and it is unable to respond
in a timely fashion causing warnings and affecting CI.
On 6/17/2022 1:53 PM, Dixit, Ashutosh wrote:
On Fri, 17 Jun 2022 13:25:34 -0700, Vinay Belgaumkar wrote:
We have seen multiple RC6 issues where it is useful to know
which global forcewake bits are set. Add this to the 'drpc'
debugfs output.
A couple of optional nits below to look at but
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