On LunarLake and onwards we are using vrr send push mechanism to trigger
frame change event. Due to this we need to trigger it using
intel_vrr_psr_send_push provided by VRR code on legacy cursor update.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_cursor.c | 5 +
1
Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR
usage.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
b/drivers/gpu/drm/i915/display
ned-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 20
drivers/gpu/drm/i915/display/intel_vrr.h | 4
3 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/disp
ional locking as it's taken care by psr mutex.
v2: implement intel_vrr_trans_push_enabled_set_clear and use that
instead of rmw
Jouni Högander (7):
drm/i915/psr: Add TRANS_PUSH register bit definition for PSR
drm/i915/vrr: Do not overwrite TRANS_PUSH PSR Frame Change Enable
drm/i9
psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2
HW tracking and PSR2 selective fetch. Due to this rename it as
psr_force_exit.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 8
1 file changed, 4 insertions(+), 4 deletions
.
2. Rewrite bits in PSR2_MAN_TRK_CTL if two invalidate calls in row without
flush in between (psr.psr2_sel_fetch_cff_enabled == true).
Flush:
1. intel_dp->psr.psr2_sel_fetch_cff_enabled is clearn also when it is
already false.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/disp
In Lunarlake and onwards it is possible to generate "PSR frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push.
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni Högander
--
Currently vrr code is overwriting possibly set PSR PR Frame Change Enable
bit in TRANS_PUSH register. Avoid this by adding trans_push_enabled into
struct intel_crtc and use that when writing TRANS_PUSH register.
v2: use intel_vrr_trans_push_enabled_set_clear instead of rmw
Signed-off-by: Jouni
errors on pipe A: 0x00040080
xe :00:02.0: [drm] *ERROR* Fault errors on pipe A: 0x00040080
Let's disable Panel Replay as well if VRR is enabled.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 ++---
1 file changed, 6 insertions(+), 7 dele
ess comment
- modify intel_dp_needs_link_retrain return statement
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_types.h| 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 3 +-
drivers/gpu/drm/i915/display/intel_psr.c | 40 +++
drivers/gpu/drm/i9
5. Now read panel link status registers again:
$ dpcd_reg read --offset 0x200e --count=1
0x200e: 80
Workaround this by not trusting link status registers after PSR is enabled
until first short pulse interrupt is received.
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_d
We don't want to check vbt.psr.enable on DP Panel Replay as it is targeted
for eDP panel usage only.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr
On LunarLake and onwards we are using vrr send push mechanism to trigger
frame change event. Due to this we need to trigger it using
intel_vrr_psr_send_push provided by VRR code on legacy cursor update.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_cursor.c | 5 +
1
Add own interface for PSR usage to perform push on frontbuffer tracking
invalidate and flush call backs. Use this new interface from PSR code.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 18
.
2. Rewrite bits in PSR2_MAN_TRK_CTL if two invalidate calls in row without
flush in between (psr.psr2_sel_fetch_cff_enabled == true).
Flush:
1. intel_dp->psr.psr2_sel_fetch_cff_enabled is clearn also when it is
already false.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/disp
Currently vrr code is overwriting possibly set PSR PR Frame Change Enable
bit in TRANS_PUSH register. Avoid this by using rmw instead of write.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_vrr.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a
psr_force_hw_tracking_exit is misleading name as it is used for PSR1, PSR2
HW tracking and PSR2 selective fetch. Due to this rename it as
psr_force_exit.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 8
1 file changed, 4 insertions(+), 4 deletions
In Lunarlake and onwards it is possible to generate "PSR frame change"
event using TRANS_PUSH mechanism. Implement function to enable this and
take PSR into account in intel_vrr_send_push.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6
drivers/gp
Add TRANS_PUSH register bit LNL_TRANS_PUSH_PSR_PR_EN definition for PSR
usage.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_vrr_regs.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr_regs.h
b/drivers/gpu/drm/i915/display
it is set "automatic" frame change event generation doesn't work
anymore.
This patch set is taking trans push mechanism into use.
Jouni Högander (7):
drm/i915/psr: Add TRANS_PUSH register bit definition for PSR
drm/i915/vrr: Do not overwrite TRANS_PUSH PSR Frame Change En
DC6 while vblank is enabled for
Panel Replay")
Signed-off-by: Jouni Högander
Suggested-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
b/drive
pes/vblank_wa_num_pipes/
- use int as a type for the counter
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_core.h | 2 ++
drivers/gpu/drm/i915/display/intel_display_irq.c | 8
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i
DC6 while vblank is enabled for
Panel Replay")
Signed-off-by: Jouni Högander
Suggested-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
b/drive
We are about to change meaning of vblank_enabled to fix Panel Replay vblank
workaround. For sake of clarity we need to rename it. Vblank_enabled is
used for i915gm/i945gm vblank irq workaround as well -> instead of rename
add new counter named as vblank_wa_pipes.
Signed-off-by: Jouni Högan
This patch implements HW workaround 14019834836 for display version 30.
v2:
- move Wa 14019834836 to it's own function
- apply only for display version 30
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 36
1 file changed, 36 inser
intel_psr2_sel_fetch_update is already quite long function. Now we are
about to add one more HW workaround. Let's split applying workarounds to
selective update area into a separate function.
Signed-off-by: Jouni Högander
Reviewed-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_
This patch set implements Wa 14019834836. Also a new helper is added
to apply workarounds for selective update area.
v2:
- move Wa 14019834836 to it's own function
- apply only for display version 30
Jouni Högander (2):
drm/i915/psr: Add new SU area calculation helper to apply workar
This patch implements HW workaround 14019834836 for display version >= 30.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 30
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i
intel_psr2_sel_fetch_update is already quite long function. Now we are
about to add one more HW workaround. Let's split applying workarounds to
selective update area into a separate function.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c
This patch set implements Wa 14019834836. Also a new helper is added
to apply workarounds for selective update area.
Jouni Högander (2):
drm/i915/psr: Add new SU area calculation helper to apply workarounds
drm/i915/psr: Implement Wa 14019834836
drivers/gpu/drm/i915/display/intel_psr.c | 52
e adding block_dc_for_vblank into this patch
v2:
- use READ_ONCE in intel_display_vblank_work
- use DC_STATE_DISABLE instead of DC_STATE_EN_UPTO_DC6
- use intel_crtc->block_dc6_needed
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
Reviewe
ction
to query need for dc entry blocking on.
Signed-off-by: Jouni Högander
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_psr.c | 31
drivers/gpu/drm/i915/display/intel_psr.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/drivers/gpu/drm
ing block_dc_for_vblank into patch 2.
- patch 1. scope changed
v3: check that encoder is dp
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Jouni Högander (2):
drm/i915/psr: Add intel_psr_needs_block_dc_vblank for blocking dc
entry
drm/i915/display: Prevent DC6 while vblank is enabled for Pa
ank_work
- use DC_STATE_DISABLE instead of DC_STATE_EN_UPTO_DC6
- use intel_crtc->block_dc6_needed
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_crtc.c | 7 +
.../gpu/drm/i
ction
to query need for dc entry blocking on.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 31
drivers/gpu/drm/i915/display/intel_psr.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/dr
blank
- check crtc->block_dc_for_vblank in bdw_disable_vblank as well
- move adding block_dc_for_vblank into patch 2.
- patch 1. scope changed
v3: check that encoder is dp
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Jouni Högander (2):
drm/i915/psr: Add intel_psr_needs_block_dc_vb
eplay and VBI is enabled.
v2:
- use READ_ONCE in intel_display_vblank_work
- use DC_STATE_DISABLE instead of DC_STATE_EN_UPTO_DC6
- use intel_crtc->block_dc6_needed
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915
t the
variable accordingly.
v3: check that encoder is dp
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_crtc.c | 17 +
.../gpu/drm/i915/display/intel_display_types.h | 7 +++
drivers/gpu/drm
We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
prevent DC6 in case of Panel Replay. This causes problems if user-space is
polling for vblank events.
v3: check that encoder is dp
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Jouni Högander (2):
drm
Do not allow Panel Replay if pipe is other than A or B.
Bspec: 68920
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2736
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915
eplay and VBI is enabled.
v2:
- use READ_ONCE in intel_display_vblank_work
- use DC_STATE_DISABLE instead of DC_STATE_EN_UPTO_DC6
- use intel_crtc->block_dc6_needed
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915
t the
variable accordingly.
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_crtc.c | 12
drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++
drivers/gpu/drm/i915/display/intel_
We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
prevent DC6 in case of Panel Replay. This causes problems if user-space is
polling for vblank events.
v2: set/clear block_dc6_needed in intel_crtc_vblank_on/off
Jouni Högander (2):
drm/i915/display: Add block_dc6_n
We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
prevent DC6 in case of Panel Replay. This causes problems if user-space is
polling for vblank events. For this purpose add new block_dc6_needed
variable into intel_crtc.
Signed-off-by: Jouni Högander
---
.../gpu/drm
eplay and VBI is enabled.
v2:
- use READ_ONCE in intel_display_vblank_work
- use DC_STATE_DISABLE instead of DC_STATE_EN_UPTO_DC6
- use intel_crtc->block_dc6_needed
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915
We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
prevent DC6 in case of Panel Replay. This causes problems if user-space is
polling for vblank events.
Jouni Högander (2):
drm/i915/display: Add block_dc6_needed variable into intel_crtc
drm/i915/display: Preven
eplay and VBI is enabled.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
Signed-off-by: Jouni Högander
---
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../gpu/drm/i915/display/intel_display_irq.c | 48 +++
2 files changed, 50 insertions(+)
diff --
into account in Panel Replay code by not waiting PSR getting
idle after enabling VBI.
Fixes: 29fb595d4875 ("drm/i915/psr: Panel replay uses SRD_STATUS to track it's
status")
Cc: Animesh Manna
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
Connector debugfs files are currently not add for MST connector. We
can now add them as we have taken into account possibility to have
NULL in connector->encoder in intel_attached_dp.
v2: remove TODO comment
Reviewed-by: Imre Deak
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/disp
p.
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_dp_link_training.c | 30 +++
1 file changed, 11 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index f45
Connector->encoder might be null for MST connector. Take this into account
in intel_attached_dp.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/disp
intel_attached_dp in link training code
Jouni Högander (4):
drm/i915/display: Handle MST connector in intel_attached_dp
drm/i915/display: Use intel_attached_dp instead of local
implementation
drm/i915/psr: Add connector debugfs files for MST connector as well
drm/i915/psr: Do not wait for PSR being
into account in Panel Replay code by not waiting PSR getting
idle after enabling VBI.
Fixes: 29fb595d4875 ("drm/i915/psr: Panel replay uses SRD_STATUS to track it's
status")
Cc: Animesh Manna
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
Connector debugfs files are currently not add for MST connector. We
can now add them as we have taken into account possibility to have
NULL in connector->encoder in intel_attached_dp.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 5 ++---
1 file changed
Connector->encoder might be null for MST connector. Take this into account
in intel_attached_dp.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/disp
This patch set contains fixes for DP2.1 Panel Replay issues we have
found while testing the code using DP2.1 emulator. These issues are
related to DP2.1 monitor always being MST. Also wrong usage of
SRD_STATUS and PSR2_STATUS registers are fixed.
Jouni Högander (3):
drm/i915/display: Handle MST
intel_init_dpcd_quirks is added and called after drm_dp_read_desc with
proper sink device identity read from dpcdc.
v3:
- !mem_is_zero fixed to mem_is_zero
v2:
- instead of using struct intel_quirk add new struct intel_dpcd_quirk
Signed-off-by: Jouni Högander
---
.../drm/i915/display
s/9739
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2246
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11762
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 16 +++-
drivers/
struct intel_quirk add new struct intel_dpcd_quirk
Jouni Högander (2):
drm/i915/display: Add mechanism to use sink model when applying quirk
drm/i915/display: Increase Fast Wake Sync length as a quirk
drivers/gpu/drm/i915/display/intel_alpm.c | 2 +-
.../drm/i915/display
rspace. User space should use this bpp to avoid changing bpp if
it wants to avoid full mode set.
Tackle this for now in our driver by using existing bpp if full modeset is
not allowed.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.c | 33 ++--
1 file chan
intel_init_dpcd_quirks is added and called after drm_dp_read_desc with
proper sink device identity read from dpcdc.
v2:
- instead of using struct intel_quirk add new struct intel_dpcd_quirk
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_types.h| 4 ++
drivers/gpu/drm
s/9739
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2246
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11762
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 16 +++-
drivers/
Implement mechanism to apply quirk only if certain panel is detected
on certain setup. Use this new mechanism to increase fastwake sync
pulse count on certain Dell laptop and only if specific panel is
installed on that laptop.
Jouni Högander (2):
drm/i915/display: Add mechanism to use sink
s/9739
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2246
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11762
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 17 -
drivers/
identity read from dpcdc.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 ++
drivers/gpu/drm/i915/display/intel_quirks.c | 90 +++--
drivers/gpu/drm/i915/display/intel_quirks.h | 3 +
3 files changed, 74 insertions(+), 24 deletions(-)
diff
Implement mechanism to apply quirk only if certain panel is detected
on certain setup. Use this new mechanism to increase fastwake sync
pulse count on certain Dell laptop and only if specific panel is
installed on that laptop.
Jouni Högander (2):
drm/i915/display: Add mechanism to use sink
Similarly as for PSR2 CRC calculation seems to timeout when Panel Replay is
enabled. Fix this by falling back to PSR if CRC calculation is enabled.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2266
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6
Panel
Replay")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index a9d9383e4ee5..0dbcaf644624 100644
--- a/drivers/gp
There are couple of bits in PSR2_CTL which needs to be written in case of
eDP Panel Replay
Bspec: 68920
v2: use boolean instead of assuming eDP Panel Replay mean Early Transport
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
1 file changed, 13
to separate function
v3: move vblank check as well
v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count
check
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 41
1 file changed, 28 insertions(+), 13 deletions(-)
diff
Scanline indication needs to be checked and configure for both PSR2 and
Panel Replay Selective Update. Move this check to
intel_sel_update_config_valid.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions
Take into account in Panel Replay compute config that HW will not allow PR
on eDP when HDCP enabled.
v2: add debug message to print out why Panel Replay is not possible
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 14 ++
1 file changed, 14
Move Early Transport validity check to be performed for Panel Replay as
well and use Early Transport for eDP Panel Replay always.
v2:set crtc_state->enable_psr2_su_region_et directly (not in if block)
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
1 f
Take into account that 128b/132b Panel Replay is not supported on eDP.
Bspec: 68920
v2:
- make crtc_state as const
- add debug message to print out why Panel Replay is not possible
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 21 +++--
1
Intel_alpm_compute_params doesn't change crtc_state. Let's convert it as
const.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 9 +
drivers/gpu/drm/i915/display/intel_alpm.h | 2 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/d
Our HW doesn't support panel replay without Early Transport on eDP.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/dr
configure ALPM for DP2.0 Panel Replay
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 36
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index
Display version >= 20 support eDP 1.5. Inform Panel Replay source support
on eDP for display version >= 20.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/dr
llow eDP Panel Replay when HDCP is enabled
v2:
- printout "Selective Update enabled (Early Transport)" instead of
"Selective Update Early Transport enabled"
- ensure that fastset is performed when the disable bit changes
Jouni Högander (11):
drm/i915/psr: Check panel A
Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check
panel support for this and prevent eDP panel replay if it doesn't exits.
Bspec: 68920
v2: use intel_alpm_aux_less_wake_supported
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7
PORT_ALPM_* registers are using MMIO_TRANS2 macro. This is not correct as
they are port register. Use _PORT_MMIO instead.
Fixes: 4ee30a448255 ("drm/i915/alpm: Add ALPM register definitions")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_alpm.c | 5 +++--
d
Enabling/disabling Panel Replay on sink side has to be done before link
training. We can't disable it in sink side on PSR disable.
Fixes: 88ae6c65ecdb ("drm/i915/psr: Unify panel replay enable/disable sink")
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drive
Port clock is link rate in 10 kbit/s units. Take this into account when
calculating AUX Less wake time.
Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time")
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_alpm.c | 3 +
This reverts commit f3c2031db7dfdf470a2d9bf3bd1efa6edfa72d8d.
We want to notice possible issues faced with PSR2 Region Early Transport as
early as possible -> let's revert patch disabling Region Early Transport by
default. Also eDP 1.5 Panel Replay requires Early Transport.
Signed-off-b
Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT
write CURPOS_ERLY_TPT.
v2: use right offset as well
Fixes: 29cdef8539c3 ("drm/i915/display: Implement Wa_16021440873")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 ++--
d
of Panel Replay specific checks are increasing.
v2: Squash adding Panel Replay compute config helper
Signed-off-by: Jouni Högander
---
.../drm/i915/display/intel_display_params.c | 3 +--
drivers/gpu/drm/i915/display/intel_psr.c | 27 +--
2 files changed, 26 insertions
Region Early Transport is allowed.
v2: fix/improve commit desciption
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display
Add new debug bit to be used with i915_edp_psr_debug debugfs
interface. This can be used to disable Panel Replay.
v2: ensure that fastset is performed when the bit changes
Signed-off-by: Jouni Högander
Reviewed-by: Animesh Manna
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1
now as it is tested on two different panels.
Jouni Högander (9):
drm/i915/psr: Set SU area width as pipe src width
drm/i915/display: Wa 16021440873 is writing wrong register
drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation
drm/i915/psr: Disable Panel Replay if PSR mode
Currently SU area width is set as MAX_INT. This is causing
problems. Instead set it as pipe src width.
Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+),
Currently PSR2 SU Region Early Transport is enabled by default on Lunarlake
if panel supports it despite psr_enable value. Prevent SU Region Early
Transport if psr_enable is set to than -1 which is the default.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13
Display version >= 20 support eDP 1.5. Inform Panel Replay source support
on eDP for display version >= 20.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/dr
Take into account that 128b/132b Panel Replay is not supported on eDP.
Bspec: 68920
v2:
- make crtc_state as const
- add debug message to print out why Panel Replay is not possible
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 21 +++--
1
to separate function
v3: move vblank check as well
v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count
check
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 41
1 file changed, 28 insertions(+), 13 deletions(-)
diff
There are couple of bits in PSR2_CTL which needs to be written in case of
eDP Panel Replay
Bspec: 68920
v2: use boolean instead of assuming eDP Panel Replay mean Early Transport
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
1 file changed, 13
Add new debug bit to be used with i915_edp_psr_debug debugfs
interface. This can be used to disable Panel Replay.
v2: ensure that fastset is performed when the bit changes
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display
Move Early Transport validity check to be performed for Panel Replay as
well and use Early Transport for eDP Panel Replay always.
v2:set crtc_state->enable_psr2_su_region_et directly (not in if block)
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
1 f
Our HW doesn't support panel replay without Early Transport on eDP.
Bspec: 68920
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/dr
Our HW doesn't support Panel Replay without AUX_LESS ALPM on eDP. Check
panel support for this and prevent eDP panel replay if it doesn't exits.
Bspec: 68920
v2: use intel_alpm_aux_less_wake_supported
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 7
We are about to add more checks for Panel Replay. Due to that it makes
sense to add now Panel Replay compute config helper.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
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