This will let the driver decide where GuC can be used
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c| 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm
We should update GuC power domain states also when GuC submission
is disabled, otherwise GuC might complain or ignore our requests.
This seems to be required for all currently released GuC firmwares.
v2: it is only needed by pre-Gen11 firmwares
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
On Wed, 05 Sep 2018 16:09:21 +0200, Chris Wilson
wrote:
Introduce a complementary function to i915_driver_create() to undo all
that is created.
Suggested-by: Michal Wajdeczko
Signed-off-by: Chris Wilson
Cc: Michal Wajdeczko
Reviewed-by: Michal Wajdeczko
~Michal
37,6 @@ int i915_driver_load(struct pci_dev *pdev, const
struct pci_device_id *ent)
out_fini:
i915_load_error(dev_priv, "Device initialization failed (%d)\n", ret);
drm_dev_fini(&dev_priv->drm);
-out_free:
kfree(dev_priv);
pci_set_drvdata(p
On Wed, 29 Aug 2018 22:57:54 +0200, Daniele Ceraolo Spurio
wrote:
On 29/08/18 12:10, Michal Wajdeczko wrote:
We should update GuC power domain states also when GuC submission
is disabled, otherwise GuC might complain or ignore our requests.
This seems to be required for all currently
On Wed, 29 Aug 2018 23:52:26 +0200, Daniele Ceraolo Spurio
wrote:
On 29/08/18 12:10, Michal Wajdeczko wrote:
Action ID of this command has been changed in GuC firmware.
the commit message of patch 1 says we need to use this command even if
GuC submission is disabled, which is still a
Gen11 defines new more flexible Host-to-GuC interrupt register.
Now the host can write any 32-bit payload to trigger an interrupt
and GuC can additionally read this payload from the register.
Current GuC firmware ignores the payload so we just write 0.
Bspec: 21043
Signed-off-by: Michal
have GuC submission disabled and we will
update these functions in follow up patch which requires new IDs.
Bspec: 20944
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Oscar Mateo
Signed-off-by: Michel Thierry
Signed-off-by: Rodrigo Vivi
Signed-off-by: Michal Wajdeczko
Cc: Michal
In upcoming GuC patch we will require notification per engine context
allocation/update/free to correctly setup GuC stage descriptors.
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Tomasz Lis
Cc: Michal Winiarski
---
drivers/gpu/drm
Work queue items definitions were updated.
To simplify the scheduling logic in the GuC firmware, now only
out-of-order mode of scheduling is supported.
Credits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Michał
edits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Vinay Belgaumkar
Cc: Michal Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc.c | 73 ++--
drivers/gpu/drm/i915/intel_guc.h | 6
2
Gen11 adds new set of scratch registers that can be used for MMIO
based Host-to-Guc communication. Due to limited number of these
registers it is expected that host will use them only for command
transport buffers (CTB) communication setup if one is available.
Bspec: 21044
Signed-off-by: Michal
Gen11 GuC firmware can handle commands over CT buffers.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm
Gen11 defines new register for checking HuC authentication status.
Look into the right register and bit.
BSpec: 19686
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tony Ye
Cc: Vinay Belgaumkar
Cc: Michel Thierry
Cc: John Spotswood
Cc: Anusha Srivatsa
passed on every work queue item.
Signed-off-by: Michel Thierry
Signed-off-by: Oscar Mateo
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Tomasz Lis
Cc: Michal Winiarski
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 +-
drivers
ad of per GEM context, but that has other problems (e.g. maximum
number of user-created contexts would be variable, no relationship
between a GuC principal descriptor and the proxy descriptor it uses, ...)
Bspec: 12254
Signed-off-by: Oscar Mateo
Signed-off-by: Rodrigo Vivi
Signed-off-by: M
: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John Spotswood
Cc: Vinay Belgaumkar
Cc: Tony Ye
Cc: Anusha Srivatsa
Cc: Jeff Mcgee
Cc: Antonio Argenziano
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/intel_uc.c | 15
GuC submission on those machines.
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John Spotswood
Cc: Vinay Belgaumkar
Cc: Tony Ye
Cc: Anusha Srivatsa
Cc: Jeff Mcgee
Cc: Antonio Argenziano
Cc: Sujaritha Sundaresan
Michal Wajdeczko (21):
drm/i915
Gen11 GuC boot parameter definitions are different than previously
used for Gen9. Try to support both definitions until new firmwares
for pre-Gen11 will be available.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John
must insert a
special wq item called resume-parsing and wait until the queue_engine_error
field is updated.
Signed-off-by: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Vinay Belgaumkar
Cc: MichaĹ Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc_submission.c
the driver and firmware logs.
Signed-off-by: Michel Thierry
Signed-off-by: Rodrigo Vivi
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Lucas De Marchi
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_engine_cs.c | 13 +
drivers/gpu/drm/i915
Action ID of this command has been changed in GuC firmware.
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
This is just to fool CI skl|kbl-guc machines
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_uc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 185b29b..95697c0 100644
--- a/drivers/gpu/drm/i915
GuC may send notification messages with payload larger than
single u32. Prepare driver to accept those messages.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Vinay Belgaumkar
Cc: Michal Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc.c
GuC sends ENGINE_RESET_COMPLETE message as an follow-up answer
to earlier ENGINE_RESET request from the host. Once this message
is received, clear engine reset flag to unblock our reset process.
Credits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel
Definition of the Additional Data Structure (ADS) object and
some of its sub-structs has been updated in the GuC firmware.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_engine_cs.c | 5
Definition of the parameters block passed to GuC is about to change.
Slightly refactor code now to make upcoming patch smaller.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: John Spotswood
---
drivers/gpu/drm/i915/intel_guc.c | 38 +++---
1 file
We should update GuC power domain states also when GuC submission
is disabled, otherwise GuC might complain or ignore our requests.
This seems to be required for all currently released GuC firmwares.
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Cc: Anusha Srivatsa
Cc: Tomasz Lis
Gen11 GuC firmware can handle commands over CT buffers.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm
have GuC submission disabled and we will
update these functions in follow up patch which requires new IDs.
Bspec: 20944
Signed-off-by: Daniele Ceraolo Spurio
Signed-off-by: Oscar Mateo
Signed-off-by: Michel Thierry
Signed-off-by: Rodrigo Vivi
Signed-off-by: Michal Wajdeczko
Cc: Michal
This is just to fool CI skl|kbl-guc machines
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_uc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 185b29b..95697c0 100644
--- a/drivers/gpu/drm/i915
Gen11 adds new set of scratch registers that can be used for MMIO
based Host-to-Guc communication. Due to limited number of these
registers it is expected that host will use them only for command
transport buffers (CTB) communication setup if one is available.
Bspec: 21044
Signed-off-by: Michal
GuC may send notification messages with payload larger than
single u32. Prepare driver to accept those messages.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Vinay Belgaumkar
Cc: Michal Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc.c
must insert a
special wq item called resume-parsing and wait until the queue_engine_error
field is updated.
Signed-off-by: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Vinay Belgaumkar
Cc: MichaĹ Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc_submission.c
GuC sends ENGINE_RESET_COMPLETE message as an follow-up answer
to earlier ENGINE_RESET request from the host. Once this message
is received, clear engine reset flag to unblock our reset process.
Credits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel
Gen11 defines new register for checking HuC authentication status.
Look into the right register and bit.
BSpec: 19686
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Tony Ye
Cc: Vinay Belgaumkar
Cc: Michel Thierry
Cc: John Spotswood
Cc: Anusha Srivatsa
edits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Vinay Belgaumkar
Cc: Michal Winiarski
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_guc.c | 73 ++--
drivers/gpu/drm/i915/intel_guc.h | 6
2
Work queue items definitions were updated.
To simplify the scheduling logic in the GuC firmware, now only
out-of-order mode of scheduling is supported.
Credits-to: Michel Thierry
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Michał
Gen11 defines new more flexible Host-to-GuC interrupt register.
Now the host can write any 32-bit payload to trigger an interrupt
and GuC can additionally read this payload from the register.
Current GuC firmware ignores the payload so we just write 0.
Bspec: 21043
Signed-off-by: Michal
passed on every work queue item.
Signed-off-by: Michel Thierry
Signed-off-by: Oscar Mateo
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Tomasz Lis
Cc: Michal Winiarski
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 +-
drivers
In upcoming GuC patch we will require notification per engine context
allocation/update/free to correctly setup GuC stage descriptors.
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
Cc: Daniele Ceraolo Spurio
Cc: Joonas Lahtinen
Cc: Tomasz Lis
Cc: Michal Winiarski
---
drivers/gpu/drm
ad of per GEM context, but that has other problems (e.g. maximum
number of user-created contexts would be variable, no relationship
between a GuC principal descriptor and the proxy descriptor it uses, ...)
Bspec: 12254
Signed-off-by: Oscar Mateo
Signed-off-by: Rodrigo Vivi
Signed-off-by: M
Definition of the Additional Data Structure (ADS) object and
some of its sub-structs has been updated in the GuC firmware.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_engine_cs.c | 5
Action ID of this command has been changed in GuC firmware.
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
---
drivers/gpu/drm/i915/intel_guc_fwif.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915
Gen11 GuC boot parameter definitions are different than previously
used for Gen9. Try to support both definitions until new firmwares
for pre-Gen11 will be available.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John
the driver and firmware logs.
Signed-off-by: Michel Thierry
Signed-off-by: Rodrigo Vivi
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: Lucas De Marchi
Cc: Tomasz Lis
---
drivers/gpu/drm/i915/intel_engine_cs.c | 13 +
drivers/gpu/drm/i915
: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John Spotswood
Cc: Vinay Belgaumkar
Cc: Tony Ye
Cc: Anusha Srivatsa
Cc: Jeff Mcgee
Cc: Antonio Argenziano
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/intel_uc.c | 15
Definition of the parameters block passed to GuC is about to change.
Slightly refactor code now to make upcoming patch smaller.
Signed-off-by: Michal Wajdeczko
Cc: Joonas Lahtinen
Cc: John Spotswood
---
drivers/gpu/drm/i915/intel_guc.c | 38 +++---
1 file
We should update GuC power domain states also when GuC submission
is disabled, otherwise GuC might complain or ignore our requests.
This seems to be required for all currently released GuC firmwares.
Signed-off-by: Michal Wajdeczko
Cc: John Spotswood
Cc: Anusha Srivatsa
Cc: Tomasz Lis
GuC submission on those machines.
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Cc: John Spotswood
Cc: Vinay Belgaumkar
Cc: Tony Ye
Cc: Anusha Srivatsa
Cc: Jeff Mcgee
Cc: Antonio Argenziano
Cc: Sujaritha Sundaresan
Michal Wajdeczko (21):
drm/i915
On Thu, 09 Aug 2018 00:58:53 +0200, Paulo Zanoni
wrote:
Em Qua, 2018-08-08 às 22:22 +, Patchwork escreveu:
== Series Details ==
Series: series starting with [1/4] drm/i915: kill
intel_display_power_well_is_enabled()
URL : https://patchwork.freedesktop.org/series/47908/
State : warning
On Fri, 27 Jul 2018 17:55:01 +0200, Chris Wilson
wrote:
As we now have a ring->vma available, we can just lookup our i915
pointer from inside the vm, and so not require the unsightly parameter.
Signed-off-by: Chris Wilson
---
Reviewed-by: Michal Wajdec
he context they're in.
Fixes: f7dc0157e4b5 ("drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc
specific init")
Testcase: igt/drv_selftest/mock_contexts #GuC
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
Reviewed-by: Chris Wils
On Fri, 27 Jul 2018 10:53:49 +0200, Jakub Bartmiński
wrote:
Add a fault injection point in the WOPCM initialization path.
v4:
Move the injection inside the WOPCM init function.
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
Reviewed-by
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
Reviewed-by: Michal Wajdeczko
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Fri, 27 Jul 2018 12:29:15 +0200, Chris Wilson
wrote:
Quoting Jakub Bartmiński (2018-07-27 09:53:47)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d0acef299b9c..8ac5214b3648 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/
On Wed, 25 Jul 2018 12:56:55 +0200, Jakub Bartmiński
wrote:
Missing commit message ... at minimum just repeat commit title
v4:
Move the injection inside the WOPCM init.
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915
7;t really need to.
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_context.c | 2 --
drivers/gpu/drm/i915/i915_gem_context.h | 3 ---
drivers/gpu/drm/i915/intel_lrc.c| 6 ++
drivers/gp
e4b5 ("drm/i915/uc: Fetch GuC/HuC firmwares from guc/huc
specific init")
Testcase: igt/drv_selftest/mock_contexts #GuC
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_context.c | 22 ++
drivers
load-inject
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_guc.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_guc.c
index 846d693ecb53..3
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_guc.c | 50 ++--
1 file changed, 22 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b/drivers/gpu/drm/i915/intel_gu
On Tue, 17 Jul 2018 16:22:01 +0200, Ville Syrjälä
wrote:
On Tue, Jul 17, 2018 at 03:26:18PM +0200, Michal Wajdeczko wrote:
On Tue, 17 Jul 2018 14:53:20 +0200, Ville Syrjala
wrote:
> From: Ville Syrjälä
>
> If there's no guc don't try to initialize it even if the use
On Tue, 17 Jul 2018 14:53:19 +0200, Ville Syrjala
wrote:
From: Ville Syrjälä
Most plattforms don't have a fixed 1MiB WOPCM so stop saying that they
do.
Also toss in a FIXME about actually using the WOPCM size we probed from
the hardware instead of assuming the fixed 1MiB size.
Cc: Jackie
On Tue, 17 Jul 2018 14:53:20 +0200, Ville Syrjala
wrote:
From: Ville Syrjälä
If there's no guc don't try to initialize it even if the user asked for
it.
Cc: Michal Wajdeczko
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_uc.c | 5 +
1 file changed, 5
On Tue, 17 Jul 2018 14:09:16 +0200, Chris Wilson
wrote:
Quoting Jakub Bartmiński (2018-07-17 12:55:58)
It would seem that we are using uninitialized WOPCM variables when
setting the GuC pin bias. The pin bias has to be set after the WOPCM,
but before the call to i915_gem_contexts_init where
place to set it seems to be right after
initializing the relevant variables in intel_wopcm_init.
Signed-off-by: Jakub Bartmiński
Cc: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
---
drivers/gpu/drm/i915/intel_guc.c | 21 -
drivers/gpu/drm/i915/intel_wopcm.c
On Mon, 16 Jul 2018 10:03:31 +0200, Chris Wilson
wrote:
On an aborted module load, we unwind and free our device private - but
we left a dangling pointer to our privates inside the pci_device. After
the attempted aborted unload, we may still get a call to
i915_pci_remove()
when the module
On Fri, 13 Jul 2018 19:52:09 +0200, Chris Wilson
wrote:
Quoting Michal Wajdeczko (2018-07-13 18:48:05)
On Fri, 13 Jul 2018 19:26:58 +0200, Chris Wilson
wrote:
> Hopefully the final hack to get guc fault-injection happy before we
can
> clean it up again, starting from a know
7fffa01c2ae8
[ 383.018468] R10: 7fffa01c1aa4 R11: 0206 R12:
560b954f7470
Testcase: igt/drv_module_reload/basic-reload-inject
Signed-off-by: Chris Wilson
Cc: Michał Winiarski
Cc: Michal Wajdeczko
Cc: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_guc_submission.c | 3 ++-
1 fil
On Thu, 12 Jul 2018 17:31:14 +0200, Chris Wilson
wrote:
Quoting Chris Wilson (2018-05-29 15:54:12)
Quoting Michal Wajdeczko (2018-05-28 18:16:18)
> SOFT_SCRATCH(15) is used by GuC for sending MMIO GuC events to host
and
> those events are now hand
On Mon, 18 Jun 2018 18:25:21 +0200, Patchwork
wrote:
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/guc: Print CTL params
passed to Guc
URL : https://patchwork.freedesktop.org/series/44934/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4334_full
On Thu, 28 Jun 2018 20:20:11 +0200, Patchwork
wrote:
== Series Details ==
Series: series starting with [v3,1/3] drm/i915/guc: Use
intel_guc_init_misc to hide GuC internals
URL : https://patchwork.freedesktop.org/series/45593/
State : failure
== Summary ==
= CI Bug Log - changes from C
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index aebe046..3e4e128 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers
wopcm_init - Michele
v3: fetch in init_misc phase - Michal
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Reviewed-by: Michel Thierry #2
---
drivers/gpu/drm/i915/i915_gem.c | 7 ---
drivers/gpu/drm/i915/intel_guc.c | 9 -
drivers/gpu/drm/i915/intel_
We will add more init steps to misc phase and there is no need
to expose them separately for use in uc_init_misc function.
Signed-off-by: Michal Wajdeczko
Cc: Michel Thierry
---
drivers/gpu/drm/i915/intel_guc.c | 28
drivers/gpu/drm/i915/intel_guc.h | 5
On Wed, 27 Jun 2018 16:41:13 +0200, Jani Nikula
wrote:
There's already some BIT() usage here and there, embrace it.
Cc: Paulo Zanoni
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_reg.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/
While debugging we may want to examine params passed to GuC.
v2: drop #ifdef DEBUG_GUC - Michal
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
Reviewed-by: Michel Thierry #1
Cc: Michal Winiarski
---
drivers/gpu/drm/i915/intel_guc.c | 3 +++
1 file changed, 3
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index aebe046..3e4e128 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers
On Sat, 16 Jun 2018 01:30:09 +0200, Patchwork
wrote:
== Series Details ==
Series: drm/i915/guc: Print CTL params passed to Guc
URL : https://patchwork.freedesktop.org/series/44834/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4325_full -> Patchwork_9327_full =
== Sum
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_params.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index aebe046..3e4e128 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
---
drivers/gpu/drm/i915/i915_gem.c | 8
drivers/gpu/drm/i915/intel_guc.c | 7 ++-
drivers/gpu/drm/i915/intel_huc.c | 8
drivers/gpu/drm/i915/intel_huc.h | 6 ++
drivers/gpu/drm/i915/intel_
We're fetching GuC/HuC firmwares directly from uc level during
init_early stage but this breaks guc/huc struct isolation and
also strict SW-only initialization rule. Move fw fetching to
init phase and do it separately per guc/huc struct.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo S
While debugging we may want to examine params passed to GuC.
Print them all if config I915_DEBUG_GUC is enabled.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Michel Thierry
---
drivers/gpu/drm/i915/intel_guc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers
On Tue, 12 Jun 2018 11:38:04 +0200, Colin King
wrote:
From: Colin Ian King
The check for level being less than zero always false because flags
is currently unsigned and can never be negative. Fix this by making
level a s32.
Detected by CoverityScan, CID#1468363 ("Macro compares unsigned to
On Fri, 08 Jun 2018 15:42:01 +0200, Mika Kuoppala
wrote:
Carve out chipset definitions into new intel_chipset.h
Cc: Chris Wilson
Signed-off-by: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_drv.h | 194 +
drivers/gpu/drm/i915/intel_chipset.h | 202 ++
On Wed, 06 Jun 2018 16:50:09 +0200, Michał Winiarski
wrote:
On Wed, Jun 06, 2018 at 03:41:53PM +0100, Chris Wilson wrote:
When we reach the magic value and do inject a fault into our module
load,
mark the module option as being hit. Since we fail from inside pci
probe, the module load isn'
On Wed, 06 Jun 2018 16:19:29 +0200, Chris Wilson
wrote:
Quoting Chris Wilson (2018-06-06 14:33:19)
Quoting Michal Wajdeczko (2018-06-06 14:25:34)
> On Wed, 06 Jun 2018 15:09:37 +0200, Chris Wilson
> wrote:
>
> > When we reach the magic value and do inject a fault into ou
On Wed, 06 Jun 2018 15:09:37 +0200, Chris Wilson
wrote:
When we reach the magic value and do inject a fault into our module load,
mark the module option as being hit. Since we fail from inside pci
probe, the module load isn't actually aborted and the module (and
paramters) are left lingering.
On Tue, 05 Jun 2018 15:57:46 +0200, Chris Wilson
wrote:
Since the kernel provides SZ_1M, use it in preference of 1 << 20.
Signed-off-by: Chris Wilson
---
Reviewed-by: Michal Wajdeczko
___
Intel-gfx mailing list
Intel-gfx@lists.freedeskt
more friendly (Michał Wajdeczko)
- merge statements in guc_ctl_log_params_flags() (Michał Wajdeczko)
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 8
drivers/gpu/drm/i915
In function gem_init_hw() we are calling uc_init_hw() but in case
of error later in function, we missed to call matching uc_fini_hw()
v2: pulled out from the series
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915
In case of failure during GuC clients creation, we forget to
cleanup earlier pool allocation. Use proper teardown to fix that.
Signed-off-by: Michal Wajdeczko
Cc: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Michal Winiarski
---
drivers/gpu/drm/i915/intel_guc_submission.c | 5 -
1 file
We should keep i915_gem_init/fini functions together for easier
tracking of their symmetry.
v2: rebased, pulled out from the series
Signed-off-by: Michal Wajdeczko
Cc: Sagar Arun Kamble
Cc: Chris Wilson
Reviewed-by: Sagar Arun Kamble
---
drivers/gpu/drm/i915/i915_drv.c | 22
Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 12 ++--
drivers/gpu/drm/i915/intel_guc_log.h | 6 ++
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c
b
Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c | 28 +++-
drivers/gpu/drm/i915/intel_guc_fwif.h | 20 +++-
drivers/gpu/drm/i915/intel_guc_log.c | 28
On Wed, 30 May 2018 15:53:32 +0200, Piotr Piorkowski
wrote:
At the moment, the preparation of GUC_CTL_CTXINFO is disordered.
Lets move all GUC_CTL_CTXINFO related operations to one place.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc
LOG_PARAMS related operations to one place,
and lets remove field 'flags' from struct intel_guc_log.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc: Chris Wilson
---
Reviewed-by: Michal Wajdeczko
_
On Wed, 30 May 2018 15:53:30 +0200, Piotr Piorkowski
wrote:
At the moment, the preparation of GUC_CTL_FEATURE is disordered.
Lets move all GUC_CTL_FEATURE related operations to one place.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc
On Wed, 30 May 2018 15:53:29 +0200, Piotr Piorkowski
wrote:
At the moment, the preparation of GUC_CTL_DEBUG is disordered.
Lets move all GUC_CTL_DEBUG related operations to one place.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał Winiarski
Cc: Joonas Lahtinen
Cc: Chris
Hi,
On Wed, 30 May 2018 15:53:28 +0200, Piotr Piorkowski
wrote:
From: Piotr Piórkowski
Currently we are using modparam as placeholder for GuC log level.
Stop doing this and keep runtime GuC level in intel_guc_log struct.
Signed-off-by: Piotr Piórkowski
Cc: Michal Wajdeczko
Cc: Michał
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