> >> > +static __inline__ void set_bin_index_0(struct intel_display
> >> > +*display, enum pipe pipe)
> >> ^^
> >>
> >> Why?
> >>
> > Sorry, didn't get your question. Is it why "enum pipe pipe"
>
> No, why __inline__? What's the point?
>
> (I tried to underline it with ^
> -Original Message-
> From: Jani Nikula
> Sent: Wednesday, September 25, 2024 2:18 PM
> To: Murthy, Arun R ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R ; Srikanth V, NagaVenkata
> ; Kandpal, Suraj
>
> Subject: Re
> > .../gpu/drm/i915/display/intel_histogram.c| 111 +-
> > .../drm/i915/display/intel_histogram_reg.h| 25
> > 2 files changed, 105 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
> > b/drivers/gpu/drm/i915/display/i
> > > +static int intel_histogram_enable(struct intel_crtc *intel_crtc) {
> > > + struct intel_display *display = to_intel_display(intel_crtc);
> > > + struct intel_histogram *histogram = intel_crtc->histogram;
> > > + int pipe = intel_crtc->pipe;
> > > + u64 res;
> > > + u32 gbandthreshold;
> > >
> > +struct intel_histogram {
> > + struct intel_crtc *crtc;
> > + struct delayed_work histogram_int_work;
>
> I think I mentioned this in my previous comment but naming this just work
> should be fine since I don’t see any other work for histogram So itll be
> called as
> histogram->work whi
> > + /*
> > +* During LT, Tx shall read DPCD 02216h before DPCD 00202h
> to 00207h and
> > +* 0200Ch through 0200Fh.
> > +*/
>
> I really like comments that are actual helpful sentences. Why do I I need to
> look
> up what 02216h and 00202h-00207h ar
> On Thu, 12 Sep 2024, Arun R Murthy wrote:
> > DP Source should be reading AUX_RD interval after we get adjusted
> > TX_FFE_PRESET_VALUE from the DP Sink. (before actually adjusting in DP
> > Source)
>
> I don't think that's correct. See below.
>
Will correct the statement.
> > Signed-off-by:
> > > > - /*
> > > > -* The delay may get updated. The transmitter shall
> > > > read the
> > > > -* delay before link status during link training.
> > > > -*/
> > > > - delay_us =
> > > > drm_dp_128b132b_read_aux_rd_inter
> > diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
> > b/drivers/gpu/drm/i915/display/intel_histogram.c
> > index 189f7ccd6df8..9c31a7d83362 100644
> > --- a/drivers/gpu/drm/i915/display/intel_histogram.c
> > +++ b/drivers/gpu/drm/i915/display/intel_histogram.c
> > @@ -26,38 +26,41 @@
> -Original Message-
> From: Kandpal, Suraj
> Sent: Wednesday, September 11, 2024 4:20 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: RE: [PATCHv2 5/5] drm/i915/display/histogram: Histogram changes
> -Original Message-
> From: Kandpal, Suraj
> Sent: Wednesday, September 11, 2024 4:10 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: RE: [PATCHv2 4/5] drm/i915/histogram: histogram delay counter
> doesnt reset
>
>
&
> > The delay counter for histogram does not reset and as a result the
> > histogram bin never gets updated. Woraround would be to use save and
> > restore histogram register.
>
> Lets not mention the issue in the commit message just what the patch/ WA is
> doing The issue is very well describe in
> > #define INTEL_CRTC_FUNCS \
> > .set_config = drm_atomic_helper_set_config, \
> > .destroy = intel_crtc_destroy, \
> > @@ -229,7 +326,9 @@ static int intel_crtc_late_register(struct drm_crtc
> *crtc)
> > .set_crc_source = intel_crtc_set_crc_source, \
> > .verify_crc_source = int
> > > > +static int intel_crtc_set_property(struct drm_crtc *crtc,
> > > > + struct drm_crtc_state *state,
> > > > + struct drm_property *property,
> > > > + u64 val)
> > > > +{
> > > > + struct
> > > +static int intel_crtc_get_property(struct drm_crtc *crtc,
> > > +const struct drm_crtc_state *state,
> > > +struct drm_property *property,
> > > +uint64_t *val)
> > > +{
> > > + struct drm_i915_private *i915
> > diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
> > b/drivers/gpu/drm/i915/display/intel_histogram.c
> > index 45e968e00af6..83ba826a7a89 100644
> > --- a/drivers/gpu/drm/i915/display/intel_histogram.c
> > +++ b/drivers/gpu/drm/i915/display/intel_histogram.c
> > @@ -19,12 +19,83 @@
> > Upon enabling histogram an interrupt is trigerred after the generation
> > of the statistics. This patch registers the histogram interrupt and
> > handles the interrupt.
> >
> > v2: Added intel_crtc backpointer to intel_histogram struct (Jani)
> > Removed histogram_wq and instead use dev_pr
> > > > +#define HISTOGRAM_GUARDBAND_THRESHOLD_DEFAULT 300//
> > 3.0% of
> > > > the pipe's current pixel count.
> > > > +#define HISTOGRAM_GUARDBAND_PRECISION_FACTOR 1 //
> > Precision
> > > > factor for threshold guardband.
> > > > +#define HISTOGRAM_DEFAULT_GUARDBAND_DELAY 0x04
> > > >
> > pipe's current pixel count.
> > +#define HISTOGRAM_GUARDBAND_PRECISION_FACTOR 1 // Precision
> > factor for threshold guardband.
> > +#define HISTOGRAM_DEFAULT_GUARDBAND_DELAY 0x04
> > +
> > +struct intel_histogram {
> > + struct drm_i915_private *i915;
>
> Lets use intel_display here
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, September 12, 2024 2:36 PM
> To: Murthy, Arun R ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R ; Srikanth V, NagaVenkata
>
> Subject: Re: [PATCH 1/3] drm/i915/d
> On Thu, 12 Sep 2024, Arun R Murthy wrote:
> > DP Source should be reading AUX_RD interval after we get adjusted
> > TX_FFE_PRESET_VALUE from the DP Sink. (before actually adjusting in DP
> > Source)
>
> Please explain why.
As per the DP 2.1 spec section 3.5.2.16.1
"The transmitter shall finish
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, September 12, 2024 2:32 PM
> To: Murthy, Arun R ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R ; Srikanth V, NagaVenkata
>
> Subject: Re: [PATCH 1/3] drm/i915/d
> > +static void intel_histogram_handle_int_work(struct work_struct *work) {
> > + struct intel_histogram *histogram = container_of(work,
> > + struct intel_histogram, handle_histogram_int_work.work);
> > + struct drm_i915_private *i915 = histogram->i915;
> > + struct intel_crtc *in
> > @@ -7503,6 +7508,14 @@ static void intel_atomic_commit_tail(struct
> > intel_atomic_state *state)
> > * FIXME get rid of this funny new->old swapping
> > */
> > old_crtc_state->dsb = fetch_and_zero(&new_crtc_state-
> > >dsb);
> > +
>
> Since there is a wai
> > @@ -7503,6 +7508,14 @@ static void intel_atomic_commit_tail(struct
> > intel_atomic_state *state)
> > * FIXME get rid of this funny new->old swapping
> > */
> > old_crtc_state->dsb = fetch_and_zero(&new_crtc_state-
> > >dsb);
> > +
>
> Since there is a wai
> > @@ -161,12 +191,19 @@ static int intel_histogram_enable(struct
> > intel_crtc
> > *intel_crtc)
> > * enable DPST_CTL Histogram mode
> > * Clear DPST_CTL Bin Reg function select to TC
> > */
> > - intel_de_rmw(i915, DPST_CTL(pipe),
> > -DPST_CTL_BIN_REG_FUNC_SEL
> > -Original Message-
> > From: Intel-gfx On Behalf Of
> > Arun R Murthy
> > Sent: Wednesday, August 21, 2024 3:54 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Murthy, Arun R
> > Subject: [PATCHv2 1/5] drm/i915/display: Add support for
> > > The sharpness property requires the use of one of the scaler so need
> > > to set the sharpness scaler coefficient values.
> > > These values are based on experiments and vary for different tap
> > > value/win size. These values are normalized by taking the sum of all
> > > values and then di
> > > +static int
> > > +intel_atomic_replace_property_blob_from_id(struct drm_device *dev,
> > > +struct drm_property_blob **blob,
> > > +u64 blob_id,
> > > +ssize_t expected_size,
> > > +
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, August 29, 2024 8:18 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Nikula, Jani ; Vivi, Rodrigo
> ;
> De Marchi, Lucas ; Sousa, Gustavo
>
> Subject: [PATCH v2 5/6] drm/i91
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [4/5] drm/i915/display: Add registers and compute the strength
>
> Add new registers
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [3/5] drm/i915/display: Enable the second scaler for sharpness
>
> As only second sc
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [v4 2/5] drm/i915/display: Compute the scaler filter coefficients
>
> The sharpness
> -Original Message-
> From: Intel-gfx On Behalf Of Nemesa
> Garg
> Sent: Monday, July 8, 2024 1:39 PM
> To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Garg, Nemesa
> Subject: [1/5] drm: Introduce sharpness mode property
>
> Introduces the new crtc property "S
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, August 27, 2024 1:41 PM
> To: Murthy, Arun R ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/i915/display: BMG supports UHBR13.5
>
> On Tue, 27 Aug 2024, Ja
> -Original Message-
> From: Jani Nikula
> Sent: Tuesday, August 27, 2024 1:11 PM
> To: Murthy, Arun R ; intel...@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: Re: [PATCH] drm/i915/display: BMG supports UHBR13.5
>
>
> -Original Message-
> From: Kulkarni, Vandita
> Sent: Thursday, August 22, 2024 4:24 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH 1/5] drm/i915/display: Add support for histogram
>
> > -Original Message-
> >
> -Original Message-
> From: Kulkarni, Vandita
> Sent: Monday, August 5, 2024 12:16 PM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: RE: [PATCH 1/5] drm/i915/display: Add support for histogram
>
> > -Original Messa
> > +static int intel_histogram_enable(struct intel_crtc *intel_crtc) {
> > + struct drm_i915_private *i915 = to_i915(intel_crtc->base.dev);
> > + struct intel_histogram *histogram = intel_crtc->histogram;
> > + int pipe = intel_crtc->pipe;
> > + u64 res;
> > + u32 gbandthreshold;
> > +
>
> -Original Message-
> From: Deak, Imre
> Sent: Tuesday, August 6, 2024 10:11 PM
> To: Murthy, Arun R
> Cc: intel...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/xe/pm: Change HPD to polling on runtime suspend
>
> On Tue, Au
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Wednesday, July 31, 2024 2:51 PM
> To: Murthy, Arun R
> Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] RFC: drm/drm_plane: Expose the plane capability and
> interop
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Wednesday, July 31, 2024 2:04 PM
> To: Murthy, Arun R
> Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] RFC: drm/drm_plane: Expose the plane capability and
> interoperab
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Tuesday, July 30, 2024 4:21 AM
> To: Murthy, Arun R
> Cc: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] RFC: drm/drm_plane: Expose the plane capability and
> interoperabi
> -Original Message-
> From: Deak, Imre
> Sent: Monday, July 29, 2024 8:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kandpal, Suraj ; Murthy, Arun R
>
> Subject: [PATCH v2 09/14] drm/i915/dp_mst: Reduce the link parameters in BW
> order after LT failures
>
Gentle Reminder!
Any comments?
Thanks and Regards,
Arun R Murthy
> -Original Message-
> From: Murthy, Arun R
> Sent: Tuesday, July 9, 2024 1:17 PM
> To: dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Murthy, Arun R
> Su
> -Original Message-
> From: Deak, Imre
> Sent: Thursday, July 25, 2024 5:15 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 06/14] drm/i915/dp: Send only a single modeset-retry
> uevent for a commit
>
> On Thu, Jul 2
> -Original Message-
> From: Deak, Imre
> Sent: Wednesday, July 24, 2024 4:50 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 07/14] drm/i915/dp: Add a separate function to reduce the
> link parameters
>
> On Wed, Jul 2
> -Original Message-
> From: Deak, Imre
> Sent: Wednesday, July 24, 2024 4:46 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 06/14] drm/i915/dp: Send only a single modeset-retry
> uevent for a commit
>
> On Wed, Jul 2
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Monday, July 22, 2024 10:25 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 07/14] drm/i915/dp: Add a separate function to reduce the link
> parameters
>
> A follow-up patch will add an alternative way to r
> -Original Message-
> From: Intel-gfx On Behalf Of Imre
> Deak
> Sent: Monday, July 22, 2024 10:25 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 06/14] drm/i915/dp: Send only a single modeset-retry uevent
> for a commit
>
> There are multiple failure cases a modeset-retry
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Thursday, July 4, 2024 1:57 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Deak, Imre
> ; Nikula, Jani
> Subject: [PATCH v2 1/1] drm/i915/display: Cache adpative sync caps to use it
> later
>
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Monday, June 10, 2024 12:52 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K
> Subject: [PATCH v16 2/9] drm/i915: Separate VRR related register definitions
>
> Move VRR related register definition
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Thursday, May 9, 2024 1:29 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nikula, Jani
>
> Subject: [PATCH v8 4/7] Add refresh rate divider to struct representing AS SDP
>
> Add target_rr_divider
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Thursday, May 9, 2024 1:28 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nikula, Jani
>
> Subject: [PATCH v8 3/7] drm/i915: Compute CMRR and calculate vtotal
>
> Compute Fixed Average Vtotal/CMRR
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Thursday, May 9, 2024 1:28 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nikula, Jani
>
> Subject: [PATCH v8 2/7] drm/i915: Add Enable/Disable for CMRR based on VRR
> state
>
> Add CMRR/Fixed Avera
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Thursday, May 9, 2024 1:28 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Shankar, Uma ; Nikula, Jani
>
> Subject: [PATCH v8 1/7] drm/i915: Define and compute Transcoder CMRR
> registers
>
> Add register definit
> -Original Message-
> From: Nikula, Jani
> Sent: Wednesday, May 8, 2024 5:18 PM
> To: Murthy, Arun R ; Ville Syrjälä
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/i915/display/dp: Remove UHBR13.5 for icl
>
> On Wed, 08 May 20
> -Original Message-
> From: Nikula, Jani
> Sent: Wednesday, May 8, 2024 3:29 PM
> To: Murthy, Arun R ; Ville Syrjälä
>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: RE: [PATCH] drm/i915/display/dp: Remove UHBR13.5 for icl
>
> On Wed, 08 May 2024, "
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, May 6, 2024 5:51 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [PATCH] drm/i915/display/dp: Remove UHBR13.5 for icl
>
> On Mon, May 06, 2024 at 12:15:13PM +00
> -Original Message-
> From: Ville Syrjälä
> Sent: Monday, May 6, 2024 5:36 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani
> Subject: Re: [PATCH] drm/i915/display/dp: Remove UHBR13.5 for icl
>
> On Mon, May 06, 2024 at 02:36:2
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Tuesday, April 30, 2024 3:27 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH v2 4/5] drm/i915: Eliminate extra frame from skl-glk sync-
> >async flip change
>
> From: Ville Syrjälä
>
> On bdw-glk th
> -Original Message-
> From: Kandpal, Suraj
> Sent: Tuesday, April 23, 2024 9:39 AM
> To: Murthy, Arun R ; intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Kumar, Naveen1 ;
> sebastian.w...@redhat.com
> S
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, April 19, 2024 10:12 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 4/6] drm/i915: Eliminate extra frame from skl-glk sync-
> >async flip change
>
> On Fri, Ap
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, April 19, 2024 9:56 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 2/6] drm/i915: Reject async flips if we need to change
> DDB/watermarks
>
> On Fri, Apr 19, 2024
> -Original Message-
> From: Ville Syrjälä
> Sent: Friday, April 19, 2024 9:38 PM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 1/6] drm/i915: Align PLANE_SURF to 16k on ADL for async
> flips
>
> On Fri, Apr 19, 2024 at 04:
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, April 22, 2024 9:03 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Murthy, Arun R ;
> Kumar, Naveen1 ; sebastian.w...@redhat.com;
> Kandpa
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, April 22, 2024 9:03 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Murthy, Arun R ;
> Kumar, Naveen1 ; sebastian.w...@redhat.com;
> Kandpa
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, April 22, 2024 9:03 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Murthy, Arun R ;
> Kumar, Naveen1 ; sebastian.w...@redhat.com;
>
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 20, 2024 9:34 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 6/6] drm/i915: Extract ilk_must_disable_lp_wm()
>
> From: Ville Syrjälä
>
> Pull the ilk/snb/ivb LP watermark disable ch
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 20, 2024 9:34 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 5/6] drm/i915:
> s/need_async_flip_disable_wa/need_async_flip_toggle_wa/
>
> From: Ville Syrjälä
>
> Rename need_async_f
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 20, 2024 9:34 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 4/6] drm/i915: Eliminate extra frame from skl-glk sync->async
> flip change
>
> From: Ville Syrjälä
>
> On bdw-glk the s
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 20, 2024 9:34 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 2/6] drm/i915: Reject async flips if we need to change
> DDB/watermarks
>
> From: Ville Syrjälä
>
> DDB/watermarks are a
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 20, 2024 9:34 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 1/6] drm/i915: Align PLANE_SURF to 16k on ADL for async flips
>
> From: Ville Syrjälä
>
> On ADL async flips apparently
> -Original Message-
> From: Kandpal, Suraj
> Sent: Thursday, April 11, 2024 11:39 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Shankar,
> Uma ; Nautiyal, Ankit K
> ; Murthy, Arun R ;
> Nikula, Jani ; Kumar, Naveen1
> ; Kandpal, S
Forgot to add my Rb
Reviewed-by: Arun R Murthy
Thanks and Regards,
Arun R Murthy
> -Original Message-
> From: Murthy, Arun R
> Sent: Friday, April 5, 2024 6:30 PM
> To: Hogander, Jouni ; ville.syrj...@linux.intel.com;
> intel-gfx@lists.freedesktop.or
> -Original Message-
> From: Intel-gfx On Behalf Of
> Hogander, Jouni
> Sent: Friday, April 5, 2024 12:29 PM
> To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
>
> On Fri, 2024-04-05 at 00
> -Original Message-
> From: Intel-gfx On Behalf Of
> Hogander, Jouni
> Sent: Friday, April 5, 2024 12:29 PM
> To: ville.syrj...@linux.intel.com; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v2 02/17] drm/i915/psr: Disable PSR when bigjoiner is used
>
> On Fri, 2024-04-05 at 00:
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, April 5, 2024 3:04 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH v2 01/17] drm/i915: Update pipes in reverse order for
> bigjoiner
>
> From: Ville Syrjälä
>
> With bigjoiner the master crt
Gentle Reminder!
Thanks and Regards,
Arun R Murthy
> -Original Message-
> From: Intel-gfx On Behalf Of Murthy,
> Arun R
> Sent: Thursday, March 28, 2024 10:34 AM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject:
> -Original Message-
> From: Ville Syrjälä
> Sent: Wednesday, April 3, 2024 1:20 AM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 18/22] drm/i915: Handle joined pipes inside
> hsw_crtc_disable()
>
> On Mon, Apr 01, 2024
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 03/22] drm/i915: Disable live M/N updates when using
> bigjoiner
>
> From: Ville Syrjälä
>
> All joined pipes share the sam
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 15/22] drm/i915: Introduce intel_crtc_joined_pipe_mask()
>
> From: Ville Syrjälä
>
> Add a small helper to compute the set
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 16/22] drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()
>
> From: Ville Syrjälä
>
> Extract the "not-MST" stuff from i
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 17/22] drm/i915: Utilize intel_crtc_joined_pipe_mask() more
>
> From: Ville Syrjälä
>
> Unify the master vs. slave handling
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 18/22] drm/i915: Handle joined pipes inside hsw_crtc_disable()
>
> From: Ville Syrjälä
>
> Reorganize the crtc disable path
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srinivas, Vidya
> Subject: [PATCH 20/22] drm/i915/mst: Add bigjoiner handling to MST modeset
> sequence
>
> From: Ville Syrjälä
>
> Loo
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manasi Navare ; Ville Syrjälä
>
> Subject: [PATCH 21/22] drm/i915: Allow bigjoiner for MST
>
> From: Vidya Srinivas
>
> We need bigjoi
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Friday, March 29, 2024 6:43 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 22/22] drm/i915: Use debugfs_create_bool() for
> "i915_bigjoiner_force_enable"
>
> From: Ville Syrjälä
>
> There is no reas
> -Original Message-
> From: Andi Shyti
> Sent: Thursday, March 28, 2024 4:38 PM
> To: Murthy, Arun R
> Cc: Andi Shyti ; Jani Nikula
> ; intel-gfx@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Subject: Re: [PATCHv2] drm/xe/display: check for
> -Original Message-
> From: Andi Shyti
> Sent: Thursday, March 28, 2024 4:16 PM
> To: Jani Nikula
> Cc: Andi Shyti ; Murthy, Arun R
> ; intel-gfx@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Subject: Re: [PATCHv2] drm/xe/display: check for
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Wednesday, March 27, 2024 11:16 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [PATCH 01/13] drm/i915/cdclk: Fix CDCLK programming order when
> pipes are active
>
> From: Ville Syrjälä
>
> Currently we alw
Any comments?
Thanks and Regards,
Arun R Murthy
> -Original Message-
> From: Murthy, Arun R
> Sent: Monday, March 18, 2024 4:31 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Murthy, Arun R
> Subject: [PATCH] d
> -Original Message-
> From: Hogander, Jouni
> Sent: Friday, March 15, 2024 1:32 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni
> Subject: [PATCH v4 1/5] drm/i915/psr: Add missing ALPM AUX-Les
> -Original Message-
> From: De Marchi, Lucas
> Sent: Wednesday, March 20, 2024 6:06 AM
> To: Murthy, Arun R
> Cc: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Subject: Re: [PATCH] drm/xe/display: check for error on drmm_mutex_init
>
> On
> -Original Message-
> From: Intel-gfx On Behalf Of Mitul
> Golani
> Sent: Monday, March 18, 2024 4:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Golani, Mitulkumar Ajitkumar
> Subject: [PATCH v19 8/9] drm/i915/display: Compute vrr_vsync params
>
> Compute vrr_vsync_start/end, whi
> -Original Message-
> From: Intel-gfx On Behalf Of Suraj
> Kandpal
> Sent: Tuesday, February 27, 2024 12:04 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Kandpal, Suraj
> Subject: [PATCH 1/4] drm/i915/hdcp: Move intel_hdcp_gsc_message def away
> from he
> -Original Message-
> From: Intel-gfx On Behalf Of Suraj
> Kandpal
> Sent: Thursday, February 15, 2024 11:43 AM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Ceraolo Spurio, Daniele ; Kandpal, Suraj
>
> Subject: [PATCH 4/5] drm/xe/hdcp: Enable HDCP for XE
> -Original Message-
> From: Intel-gfx On Behalf Of Daniele
> Ceraolo Spurio
> Sent: Wednesday, February 14, 2024 4:52 AM
> To: Kandpal, Suraj ; intel-gfx@lists.freedesktop.org;
> intel...@lists.freedesktop.org
> Subject: Re: [PATCH 3/5] drm/xe: Use gsc_proxy_init_done to check proxy
> st
> -Original Message-
> From: Intel-gfx On Behalf Of
> Kandpal, Suraj
> Sent: Wednesday, February 14, 2024 11:00 AM
> To: Ceraolo Spurio, Daniele ; intel-
> g...@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Jani Nikula (jani.nik...@linux.intel.com) ;
> Nautiyal, Ankit K
>
> -Original Message-
> From: Intel-gfx On Behalf Of Suraj
> Kandpal
> Sent: Friday, February 9, 2024 3:44 PM
> To: intel-gfx@lists.freedesktop.org; intel...@lists.freedesktop.org
> Cc: Ceraolo Spurio, Daniele ; Kandpal, Suraj
>
> Subject: [PATCH 1/5] drm/i915/hdcp: Move intel_hdcp_gsc_m
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