Add the new frl_dfm_helper file to drm Makefile
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 8675c2af7ae1..81fe3df8bfda 100644
--- a/drivers/gpu/drm
From: Ankit Nautiyal
Add helper functions for calculating FRL capacity and DFM
requirements with given compressed bpp.
Signed-off-by: Ankit Nautiyal
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 297 +++
include/drm/drm_frl_dfm_helper.h
Add helpers to compute DFM variables and to verify if the
DFM requirements are met or not in non dsc cases.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 161 +++
include/drm/drm_frl_dfm_helper.h | 2 +
2 files changed, 163 insertions
Add helper functions for computing non dsc frl
link characteristics
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 396 +++
1 file changed, 396 insertions(+)
create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c
diff --git a/drivers/gpu
Define frl_dfm structure to hold frl characteristics
needed for frl capacity computation in order to
meet the data flow metering requirement.
Signed-off-by: Vandita Kulkarni
---
include/drm/drm_frl_dfm_helper.h | 124 +++
1 file changed, 124 insertions(+)
create
unsigned int, corrected patch 4 to address build
issue, addressed checkpatch issues, moved the drm_frl_dfm_helper under
kms_helpers section for compilation in the Makefile.
Ankit Nautiyal (1):
drm/hdmi21: Add support for DFM calculation with DSC
Vandita Kulkarni (4):
drm/hdmi21: Define frl_dfm
Add the new frl_dfm_helper file to drm Makefile
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 8675c2af7ae1..4fa9b48995c8 100644
--- a/drivers/gpu/drm
Add helpers to compute DFM variables and to verify if the
DFM requirements are met or not in non dsc cases.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 161 +++
include/drm/drm_frl_dfm_helper.h | 2 +
2 files changed, 163 insertions
From: Ankit Nautiyal
Add helper functions for calculating FRL capacity and DFM
requirements with given compressed bpp.
Signed-off-by: Ankit Nautiyal
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 298 +++
include/drm/drm_frl_dfm_helper.h
Define frl_dfm structure to hold frl characteristics
needed for frl capacity computation in order to
meet the data flow metering requirement.
Signed-off-by: Vandita Kulkarni
---
include/drm/drm_frl_dfm_helper.h | 126 +++
1 file changed, 126 insertions(+)
create
Add helper functions for computing non dsc frl
link characteristics
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/drm_frl_dfm_helper.c | 396 +++
1 file changed, 396 insertions(+)
create mode 100644 drivers/gpu/drm/drm_frl_dfm_helper.c
diff --git a/drivers/gpu
/hdmi21: Add support for DFM calculation with DSC
Vandita Kulkarni (4):
drm/hdmi21: Define frl_dfm structure
drm/hdmi21: Add non dsc frl capacity computation helpers
drm/hdmi21: Add helpers to verify non-dsc DFM requirements
drm/hdmi21: Add frl_dfm_helper to Makefile
drivers/gpu/drm
This reverts commit 991d9557b0c457fb92bc49ddde24a7d9ce6144a8.
The Bspec was updated recently with the pll ungate sequence
similar to that of icl dsi enable sequence.
Hence reverting.
Bspec:49187
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 10 ++
1 file
DP 1.4 spec limits max compression bpp to
uncompressed bpp -1, which is supported from
XELPD onwards.
Instead of uncompressed bpp, max dsc input bpp
was being used to limit the max compression bpp.
Fixes: 831d5aa96c97 ("drm/i915/xelpd: Support DP1.4 compression BPPs")
Signed-off-b
after pll mapping") which gates the clocks much before,
as per the older spec. This commit nullifies its effect and makes
sure that the clocks are not gated while we enable the DDI
buffer.
v2: Bspec ref, add a comment wrt earlier clock gating sequence (Jani)
Signed-off-b
Update ADL_P device info to support DSI0, DSI1
v2: Re-define cpu_transcoder_mask only (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_pci.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm
: Align to the power domain ordering (Jani)
Add bspec references (Imre)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display_power.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display
v2: Fix the typo, move out the hardcoding from
macro(Jani, Ville)
Fixes: f87c46c43175 ("drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup
guardband")
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++-
drivers/gpu/drm/i915/i915_reg.h|
v2: Addressed the review comments on v1.
Vandita Kulkarni (4):
drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB
drm/i915/dsi/xelpd: Add DSI transcoder support
drm/i915/dsi/xelpd: Disable DC states in Video mode
drm/i915/dsi: Ungate clock before enabling the phy
drivers/gpu/drm/i915
For the PHY enable/disable signalling to propagate
between Dispaly and PHY, DDI clocks need to be running when
enabling the PHY.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
MIPI DSI transcoder cannot be in video mode to support any of the
display C states.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b
Update ADL_P device info to support DSI0, DSI1
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_pci.c | 31 ---
1 file changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index
Fixes: f87c46c43175 ("drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup
guardband")
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h| 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/d
Vandita Kulkarni (4):
drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB
drm/i915/dsi/xelpd: Add DSI transcoder support
drm/i915/dsi/xelpd: Disable DC states in Video mode
drm/i915/dsi: Ungate clock before enabling the phy
drivers/gpu/drm/i915/display/icl_dsi.c| 10
ned-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 9aec17b33819..3a1cdb3937aa 100644
--- a/drivers/gp
Each VDSC operates with 1ppc throughput, hence enable the second
VDSC engine when moderate is higher that the current cdclk.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_dp.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
field to account for the repeaters on the HS Request/Ready PPI signaling
between the Display engine and the DPHY.
v2: Fix build issue.
v3: Align to new naming (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: J
Enable MIPI DSI support on ADL-P platform.
The esc clock changes, WA changes are taken care
in the previous patches.
As per the Bspec the seq remains to be same as TGL.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
1 file
Vandita Kulkarni (2):
drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
drm/i915/dsi/xelpd: Enable mipi dsi support.
drivers/gpu/drm/i915/display/icl_dsi.c | 23
drivers/gpu/drm/i915/display/intel_display.c | 1 +
drivers/gpu/drm/i915/i915_reg.h
Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
field to account for the repeaters on the HS Request/Ready PPI signaling
between the Display engine and the DPHY.
v2: Fix build issue.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_
Enable MIPI DSI support on ADL-P platform.
The esc clock changes, WA changes are taken care
in the previous patches.
As per the Bspec the seq remains to be same as TGL.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff
Wa_16012360555 SW will have to program the "LP to HS Wakeup Guardband"
field to account for the repeaters on the HS Request/Ready PPI signaling
between the Display engine and the DPHY.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_
The delta from TGL is wrt the ESC clock, and an additional
WA needed. With that support in place, extend the support
for mipi dsi.
Vandita Kulkarni (2):
drm/i915/dsi/xelpd: Add WA to program LP to HS wakeup guardband
drm/i915/dsi/xelpd: Enable mipi dsi support.
drivers/gpu/drm/i915/display
Xelpd supports larger small joiner ram.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 75d4ebc66941
Though there is a write option available on fec_suport
debugfs file, so far it has been registering with read
permissions only.
Suggested-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed
debugfs node for DSC BPP
enable
Vandita Kulkarni (2):
drm/i915/display: Add write permissions for fec support
drm/i915/display/dsc: Force dsc BPP
.../drm/i915/display/intel_display_debugfs.c | 78 ++-
.../drm/i915/display/intel_display_types.h| 1 +
drivers/gpu/drm/i915
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
v2: Use default dsc bpp when we are just
doing force_dsc_en, use default dsc bpp
for invalid force_dsc_bpp values. (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915
sions (Jani)
Cc: Vandita Kulkarni
Cc: Navare Manasi D
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Signed-off-by: Patnana Venkata Sai
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
.../drm/i915/display/intel_display_debugfs.c | 76 ++-
.../drm/i915/di
Though there is a write option available on fec_suport
debugfs file, so far it has been registering with read
permissions only.
Suggested-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed
om v6, permissions (Jani)
Cc: Vandita Kulkarni
Cc: Navare Manasi D
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Signed-off-by: Patnana Venkata Sai
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
.../drm/i915/display/intel_display_debugfs.c | 76 ++-
.../drm
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
v2: Use default dsc bpp when we are just
doing force_dsc_en, use default dsc bpp
for invalid force_dsc_bpp values. (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915
Patnana Venkata Sai (1):
drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP
enable
Vandita Kulkarni (2):
drm/i915/display: Add write permissions for fec support
drm/i915/display/dsc: Force dsc BPP
.../drm/i915/display/intel_display_debugfs.c | 78
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
v2: Use default dsc bpp when we are just
doing force_dsc_en, use default dsc bpp
for invalid force_dsc_bpp values. (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_dp.c | 17
om v6, permissions (Jani)
Cc: Vandita Kulkarni
Cc: Navare Manasi D
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Signed-off-by: Patnana Venkata Sai
Signed-off-by: Vandita Kulkarni
---
.../drm/i915/display/intel_display_debugfs.c | 76 ++-
.../drm/i915/di
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_dp.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915
Though there is a write option available on fec_suport
debugfs file, so far it has been registering with read
permissions only.
Suggested-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
float them in a different
series.
Patnana Venkata Sai (1):
drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP
enable
Vandita Kulkarni (2):
drm/i915/display: Add write permissions for fec support
drm/i915/display/dsc: Force dsc BPP
.../drm/i915/display
)
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3537
Signed-off-by: Vandita Kulkarni
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
b
)
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3537
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
b/drivers/gpu/drm/i915/display
://gitlab.freedesktop.org/drm/intel/-/issues/3537
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index
/intel/-/issues/3537
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_vdsc.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 19cd9531c115..514e6267
There can be a chance that pre os has enabled
DSC and driver's compute config would not need
dsc to be enabled, in such case if we check on
compute config's compression state to disable,
we might end up in state mismatch.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i9
crtc_state mode_flags (Ville)
v6: Add platform and dsi checks (Ville)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26 +
drivers/gpu/drm/i915/display/intel_dsi.h| 1 +
drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++
3 files
crtc_state mode_flags (Ville)
v6: Add platform and dsi checks (Ville)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26 +
drivers/gpu/drm/i915/display/intel_dsi.h| 1 +
drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++
3 files
icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba
crtc_state mode_flags (Ville)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26 +
drivers/gpu/drm/i915/display/intel_dsi.h| 1 +
drivers/gpu/drm/i915/display/intel_sprite.c | 7 ++
3 files changed, 34 insertions(+)
diff --git a
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
Vandita Kulkarni (5):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE handler for dsi cmd mode.
drm/i915/dsi: Initiate
handler func (Jani)
Signed-off-by: Vandita Kulkarni
Reported-by: kernel test robot
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
update would have completed in
the first TE duration itself.
Hence switch to using software timestamp based
vblank counter.
v2: Use mode_flags from crtc_state (Ville)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 11 +++
drivers/gpu/drm/i915/i915_irq.c
frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
v4: Use icl_dsi in func names if non static,
fix code formatting issues. (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c
icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba
update would have completed in
the first TE duration itself.
Hence switch to using software timestamp based
vblank counter.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_display.c | 11 +++
drivers/gpu/drm/i915/i915_irq.c | 4
2 files changed, 15
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
v10: Address the review comments on patch 3 and 4
v11: fix compilation issue introduced in v10
v12: fix check patch errors on patch 3
v13: Use sw vblank counter (Ville)
Vandita Kulkarni (5):
drm
handler func (Jani)
Signed-off-by: Vandita Kulkarni
Reported-by: kernel test robot
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
v10: Address the review comments on patch 3 and 4
v11: fix compilation issue introduced in v10
v12: fix check patch errors on patch 3
Vandita Kulkarni (4):
drm/i915/dsi: Add details about TE in
frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
v4: Use icl_dsi in func names if non static,
fix code formatting issues. (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c
handler func (Jani)
Signed-off-by: Vandita Kulkarni
Reported-by: kernel test robot
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
v4: Use icl_dsi in func names if non static,
fix code formatting issues. (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
v10: Address the review comments on patch 3 and 4
v11: fix compilation issue introduced in v10
Vandita Kulkarni (4):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE
handler func (Jani)
Signed-off-by: Vandita Kulkarni
Reported-by: kernel test robot
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 66 +
1 file changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index
icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba
frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
v4: Use icl_dsi in func names if non static,
fix code formatting issues. (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
v10: Address the review comments on patch 3 and 4
Vandita Kulkarni (4):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE
should be static (Jani),
Signed-off-by: Vandita Kulkarni
Reported-by: kernel test robot
Acked-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_irq.c | 66 +
1 file changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915
icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30
immediately send the frame data to the panel.
We are not dealing with the periodic command mode here.
v2: Pass only relevant masked bits to the handler (Jani)
v3: Fix the check for cmd mode in TE handler function.
v4: Use intel_handle_vblank instead of drm_handle_vblank (Jani)
Signed-off-by: Vandita
: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 51 +++--
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f113fe44572b..de540194ce67 100644
--- a/drivers/gpu/drm/i915
We need details about enabling TE on which port
before we enable TE through vblank enable path.
This is based on the configuration that we receive
from the VBT wrt ports, dual_link.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 30 +++---
1
frame data is sent to the panel, we see
the frame counter updating.
v2: Use intel_de_read/write
v3: remove the usage of private_flags
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 26
drivers/gpu/drm/i915/display/intel_display.c | 13
This series contain interrupt handling part of cmd mode.
Configuration patches were merged already.
Vandita Kulkarni (4):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE handler for dsi cmd mode.
drm/i915/dsi: Initiate
For all ddi, encoder->type holds output type as ddi,
assigning it to individual o/p types is no more valid.
Fixes: 362bfb995b78 ("drm/i915/tgl: Add DKL PHY vswing table for HDMI")
v2: Rebase, no functional change.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Uma Shankar
---
dr
For all ddi, encoder->type holds output type as ddi,
assigning it to individual o/p types is no more valid.
Fixes: 362bfb995b78 ("drm/i915/tgl: Add DKL PHY vswing table for HDMI")
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++---
1 fi
Configure the transcoder to operate in TE GATE command mode
and take TE events from GPIO.
Also disable the periodic command mode, that GOP would have
programmed.
v2: Disable util pin (Jani)
v3: Use intel_de_write (Jani)
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu
In TE Gate mode, on every flip we need to set the
frame update request bit. After this bit is set
transcoder hardware will automatically send the
frame data to the panel when it receives the TE event.
v2: Use intel_de_read/write
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display
Adding TE flags and periodic command mode flags
as part of private flags to indicate what TE interrupts
we would be getting instead of vblanks in case of mipi dsi
command mode.
v2: Add TE flag description (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915
On dsi cmd mode we do not receive vblanks instead
we would get TE and these flags indicate TE is expected on
which port.
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/icl_dsi.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a
calculation, use afe_clk for
byte clock calculation, use intel_de_write/read (Jani)
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/display/icl_dsi.c | 48 +++---
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
In case of dual link, we get the TE on slave.
So clear the TE on slave DSI IIR.
v2: Pass only relevant masked bits to the handler (Jani)
v3: Fix the check for cmd mode in TE handler function.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 64
This series contain basic mipi dsi cmd mode enabling
patches. With comments fixed on V7.
Vandita Kulkarni (9):
drm/i915/dsi: Configure transcoder operation for command mode.
drm/i915/dsi: Add vblank calculation for command mode
drm/i915/dsi: Add cmd mode flags in display mode private flags
Clear the DSI IIR as part of interrupt configuration.
Signed-off-by: Vandita Kulkarni
---
drivers/gpu/drm/i915/i915_irq.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2e1418515c9f..89c8cabe24e0 100644
--- a
We need to configure TE interrupt in two places.
Port interrupt and DSI interrupt mask registers.
v2: Hide the private flags check inside configure_te (Jani)
v3: Fix the position of masking de_port_masked for DSI_TE.
v4: Simplify the caller of configure_te (Jani)
Signed-off-by: Vandita
If the GOP has programmed periodic command mode,
we need to disable that which would need a
deconfigure and configure sequence.
v2: Fix sparse error, pass only intel_dsi (Jani)
v3: Use intel_de_read
Signed-off-by: Vandita Kulkarni
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display
This series contain basic cmd mode enablement pacthes.
Fix comments on V6.
Vandita Kulkarni (9):
drm/i915/dsi: Configure transcoder operation for command mode.
drm/i915/dsi: Add vblank calculation for command mode
drm/i915/dsi: Add cmd mode flags in display mode private flags
drm/i915/dsi
We need to configure TE interrupt in two places.
Port interrupt and DSI interrupt mask registers.
v2: Hide the private flags check inside configure_te (Jani)
v3: Fix the position of masking de_port_masked for DSI_TE.
v4: Simplify the caller of configure_te (Jani)
Signed-off-by: Vandita
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